Memory device and manufacturing method thereof

Abstract

A method of manufacturing a memory element includes forming a stacked structure on a substrate, wherein the stacked structure includes a plurality of alternating stacked first insulating layers and a plurality of intermediate layers; forming a plurality of first openings and a plurality of second openings in the stacked structure; forming a plurality of first insulating pillars in the first openings and the second openings; replacing the first insulating pillars in the first openings with a plurality of channel pillars; removing the first insulating pillars in the second openings; replacing the intermediate layers with a plurality of conductive layers from the second openings; laterally etching the conductive layers such that the second openings are interconnected; and forming a slit structure in the second openings.

Claims

1. A method for manufacturing a memory element, comprising: forming a stacked structure on a substrate, wherein the stacked structure includes a plurality of alternating stacked first insulating layers and a plurality of intermediate layers; forming a plurality of first openings and a plurality of second openings in the stacked structure; forming a plurality of first insulating pillars in the first openings and the second openings; replacing the first insulating pillars in the first openings with a plurality of channel pillars; removing the first insulating pillars in the second openings; replacing the intermediate layers with a plurality of conductor layers from the second openings; laterally etching the conductor layers such that the second openings are interconnected; and forming a slit structure in the second openings.

2. The manufacturing method as claimed in claim 1 further comprises: forming a stop layer on the substrate before forming the stacked structure, wherein the stacked structure is formed on the stop layer, and the first openings and the second openings penetrate the stop layer when forming the first openings and the second openings.

3. The manufacturing method as described in claim 2, wherein the slit structure has a plurality of second insulating pillars separated by the stop layer.

4. The manufacturing method as claimed in claim 1 further comprises: after forming the first insulating pillars in the first openings and the second openings, forming a second insulating layer on the first insulating pillars and the stacked structure.

5. The manufacturing method as described in claim 1, wherein, in a top view, the first openings and the second openings are circular.

6. A memory element comprising: a semiconductor substrate; a stacked structure on the semiconductor substrate, wherein the stacked structure includes a plurality of alternately stacked insulating layers and a plurality of conductive layers, and the stacked structure has a first region and a second region adjacent to the second region; a plurality of channel pillars in the first region of the stacked structure; and a slit structure in the second region of the stacked structure, wherein, in a top view, a profile between the slit structure and one of the conductive layers of the stacked structure is composed of a plurality of arcs, and the slit structure has a plurality of wide portions and a plurality of narrow portions, and the wide portions and the narrow portions are staggered along a first direction in the top view.

7. The memory element as claimed in claim 6, wherein the slit structure includes a plurality of insulating pillars that are interconnected in a cross section along a direction perpendicular to a normal of one of the conductor layers, and the insulating pillars are arranged along a first direction that is perpendicular to a normal of one of the conductor layers.

8. The memory element as described in claim 7, wherein the diameter of the insulating pillars is larger than the diameter of the channel pillars.

9. The memory element as claimed in claim 7 further comprises: a polysilicon layer on the stacked structure, wherein the insulating pillars of the slot structure penetrate the polysilicon layer, and the insulating pillars are separated by the polysilicon layer.

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