Electronic device and associated control method

TWI941279BActive Publication Date: 2026-10-01FARADAY TECH CORP
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Patent Information

Application Number
TW114123877
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-06-25
Publication Date
2026-10-01
Estimated Expiration
2045-06-24

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Abstract

This invention discloses an electronic device comprising a first processor, a plurality of first description units and a first buffer configured on the first processor, a second processor, a plurality of second description units and a second buffer configured on the second processor, and a communication interface, wherein the communication interface is used to communicate with another electronic device located outside the electronic device. The first processor executes a first operating system and controls the communication interface to store packets from the other electronic device into the first buffer; and the second processor executes a second operating system different from the first operating system to perform other operations, in which case the second processor does not receive or process packets from the other electronic device through the communication interface.
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Claims

1. An electronic device comprising: a first processor; a plurality of first description units and a first buffer configured on the first processor; a second processor; a plurality of second description units and a second buffer configured on the second processor; and a communication interface for communicating with another electronic device located outside the electronic device; wherein the first processor executes a first operating system and controls the communication interface to store packets from the other electronic device into the first buffer; and the second processor executes a second operating system different from the first operating system to perform other operations, wherein the second processor does not receive or process packets from the other electronic device through the communication interface; The first operating system executed by the first processor includes a first task to process the received packets, and the second operating system executed by the second processor includes a second task to process the received packets. The first processor configures a first monitoring system in the second operating system executed by the second processor to monitor the status of the second processor and report back to the first processor; and the second processor configures a second monitoring system in the first operating system executed by the first processor to monitor the status of the first processor and report back to the second processor.

2. The electronic device as described in claim 1, wherein the first monitoring and the first task communicate through an inter-process communication (IPC) channel, and the second monitoring and the second task communicate through the IPC channel.

3. The electronic device as described in claim 1, wherein if the second monitor detects that the first processor is about to enter a power-saving mode, the second monitor will notify the second task so that the second processor executes the second task to control the communication interface to receive and process packets from the other electronic device, wherein the communication interface will temporarily store packets from the other electronic device in the second buffer.

4. The electronic device as described in claim 3, wherein after the first processor enters the power-saving mode, if it is determined that the first processor is about to leave the power-saving mode and enter a normal mode, the first monitoring wakes up the first processor and notifies the first task to restart the operation, and the first processor executes the first task to control the communication interface to receive and process packets from the other electronic device, and at this time the communication interface will temporarily store the packets from the other electronic device in the first buffer.

5. The electronic device as described in claim 4, wherein when the first processor begins to execute the first task, the second monitor notifies the second task to stop operating and enter a waiting state.

6. A method for controlling an electronic device, wherein the electronic device includes: a first processor executing a first operating system; a plurality of first description units and a first buffer configured on the first processor; a second processor executing a first operating system different from the first operating system; a plurality of second description units and a second buffer configured on the second processor; and a communication interface for communicating with another electronic device located outside the electronic device; and the control method includes the steps of: controlling the communication interface to store packets from the other electronic device in the first buffer; the first processor executing a first task of the first operating system to process the received packets; configuring a first monitor in the second operating system executed by the second processor to monitor the status of the second processor and report back to the first processor; and configuring a second monitor in the first operating system executed by the first processor to monitor the status of the first processor and report back to the second processor.

7. The control method as described in claim 6 further includes: if the second monitor detects that the first processor is about to enter a power-saving mode, the second monitor will notify the second task so that the second processor executes the second task to control the communication interface to receive and process packets from the other electronic device, at which time the communication interface will temporarily store the packets from the other electronic device in the second buffer.

8. The control method as described in claim 7 further includes: after the first processor enters the power-saving mode, if it is determined that the first processor is preparing to leave the power-saving mode and enter a normal mode, the first monitoring wakes up the first processor and notifies the first task to restart the operation, and the first processor executes the first task to control the communication interface to receive and process packets from the other electronic device, while at this time the communication interface temporarily stores the packets from the other electronic device in the first buffer.

9. The control method as described in claim 8 further includes: when the first processor starts executing the first task, the second monitor notifies the second task to stop operating and enter a waiting state.

Citation Information

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