Analysis method of electronic device

Abstract

An analysis method for an electronic device includes at least the following steps: providing a test specimen of the electronic device, wherein the test specimen includes a component under test (BUT); obtaining the internal location of the BUT; providing a test substrate, wherein the test substrate has a test assembly, the test assembly including an internal signal routing unit and an internal signal connector unit electrically connected to each other, and the internal signal routing unit including multiple signal lines corresponding to all interface signals of the BUT; placing the test specimen on the test substrate, wherein the BUT is electrically connected to the internal signal routing unit via multiple wire bonding; and electrically connecting the internal signal connector unit to an analysis tool.

Claims

1. A method for analyzing an electronic device, comprising: Provide the electronic device to be tested; The electronic device is irradiated with X-rays to obtain its internal location; A test substrate is provided, wherein the test substrate has a test assembly, the test assembly including an internal signal routing unit and an internal signal connector unit electrically connected to each other, and the internal signal routing unit including multiple signal lines corresponding to all interface signals of the electronic device; the electronic device is disposed on the test substrate, wherein the electronic device is electrically connected to the internal signal routing unit via multiple wire bonding; and the internal signal connector unit is electrically connected to an analysis tool.

2. The method for analyzing an electronic device as described in claim 1, wherein the electronic device is flash memory and the plurality of signal lines correspond to the ONFI or Toggle interface standard.

3. The analysis method for the electronic device as described in claim 2, wherein the ONFI or Toggle interface standard includes multiple power signal lines, multiple high-speed signal lines, and multiple low-speed signal lines, and the multiple power signal lines, the multiple high-speed signal lines, and the multiple low-speed signal lines are arranged sequentially outward along the side of the electronic device.

4. The method for analyzing an electronic device as claimed in claim 1, wherein a plurality of the test components surround the electronic device, and one of the plurality of test components adjacent to the electronic device is electrically connected to the electronic device.

5. The method for analyzing an electronic device as claimed in claim 4, wherein the electronic device has a plurality of sides, gold fingers of the electronic device extend from one of the plurality of sides, and the plurality of test components are respectively adjacent to the others of the plurality of sides.

6. The method for analyzing an electronic device as claimed in claim 1 further includes performing an opening process on the electronic device through the internal location to expose the top surface of the electronic device.

7. The method for analyzing an electronic device as claimed in claim 1, wherein the test substrate is subjected to laser processing to cut off the branch lines.

8. The method for analyzing an electronic device as claimed in claim 1, wherein the length of the internal signal wiring unit is greater than or equal to the length of the electronic device.

9. The method for analyzing an electronic device as claimed in claim 1, wherein the width of the internal signal wiring unit is less than or equal to the maximum extension distance of the material used for the plurality of wires.

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