Solid-state storage device and method for detecting idle state thereof

Abstract

A solid-state storage device is configured to be electrically connected to a host computer. The solid-state storage device includes: a controller; a non-volatile memory electrically connected to the controller; and a volatile memory electrically connected to the controller. In response to the controller recording a current input / output instruction fetched from the host computer into a commit queue in the volatile memory, the controller is configured to determine whether one or more predetermined conditions are met to determine when the controller transitions from an operating state to an active idle state.

Claims

1. A solid-state storage device configured to be electrically connected to a host computer, the solid-state storage device comprising: One controller; A non-volatile memory is electrically connected to the controller; And a volatile memory electrically connected to the controller; wherein, in response to the controller recording a current input / output instruction fetched from the host into a commit queue in the volatile memory, the controller is configured to determine whether one or more predetermined conditions are met to determine when the controller enters an active idle state from an operating state.

2. The solid-state storage device as claimed in claim 1, wherein the one or more predetermined conditions include a first predetermined condition indicating that the host has not yet sent a clear command to the controller.

3. The solid-state storage device as claimed in claim 2, wherein the one or more predetermined conditions further include a second predetermined condition indicating that the host write data is still stored in the volatile memory and the write data has not yet been written to the non-volatile memory.

4. A solid-state storage device as claimed in claim 3, wherein: When the controller determines that the first predetermined condition or the second predetermined condition is met, the controller maintains the working state; and when the controller determines that neither the first predetermined condition nor the second predetermined condition is met, the controller calculates an idle time from the start of the controller recording the current input / output instruction in the submission queue according to a timer.

5. The solid-state storage device as claimed in claim 4, wherein, In response to the idle time being greater than or equal to an idle time threshold, the controller is configured to transition from the operating state to the active idle state.

6. The solid-state storage device as claimed in claim 4, wherein the one or more predetermined conditions include a third predetermined condition indicating whether a characteristic value of a previously input / output instruction is within a predetermined range.

7. The solid-state storage device of claim 6, wherein the characteristic value is the time interval between the completion timestamp of the previous input / output instruction and the fetch timestamp of the current input / output instruction, wherein the previous input / output instruction and the current input / output instruction are of the same instruction type.

8. A solid-state storage device as claimed in claim 6, wherein: The controller is further configured to determine whether the feature value is within a predetermined range; in response to the feature value being within the predetermined range, the controller is configured to increase an idle time threshold; and in response to the feature value not being within the predetermined range, the controller is configured to maintain the idle time threshold.

9. A solid-state storage device as claimed in claim 8, wherein, In response to the idle time being greater than or equal to the idle time threshold, the controller is configured to transition from the operating state to the active idle state.

10. The solid-state storage device of claim 1, wherein the active idle state is the SOix state as defined by the Advanced Configuration and Power Interface (ACPI) standard.

11. An idle state detection method for a solid-state storage device, wherein the solid-state storage device is electrically connected to a host, and the solid-state storage device includes a controller, a volatile memory, and a non-volatile memory, the method comprising: The controller retrieves a current input / output instruction from the host; writes the current input / output instruction to a commit queue of the volatile memory; and determines when the controller enters an active idle state from an operating state by judging whether one or more predetermined conditions are met.

12. The method of request item 11, wherein the one or more predetermined conditions include a first predetermined condition indicating that the host has not yet sent a clear instruction to the controller.

13. The method of claim 12, wherein the one or more predetermined conditions further include a second predetermined condition indicating that the host write data is still stored in the volatile memory and the write data has not yet been written to the non-volatile memory.

14. The method of request item 13 further includes: When the controller determines that the first predetermined condition or the second predetermined condition is met, the controller is maintained in the working state. And when the controller determines that neither the first predetermined condition nor the second predetermined condition is met, the controller uses a timer to calculate an idle time from the start of the controller recording the current input / output instruction in the submission queue.

15. The method of request item 14 further includes: In response to the idle time being greater than or equal to an idle time threshold, the controller is controlled to switch from the working state to the active idle state.

16. The method of claim 14, wherein the one or more predetermined conditions include a third predetermined condition indicating whether a characteristic value of a previously input / output instruction is within a predetermined time range.

17. The method of claim 16, wherein the feature value is the time interval between the completion timestamp of the previous input / output instruction and the fetch timestamp of the current input / output instruction, wherein the previous input / output instruction and the current input / output instruction are of the same instruction type.

18. The method of request item 16 further includes: The controller is used to determine whether the feature value is within the predetermined range; In response to the feature value being within a predetermined range, the controller increases an idle time threshold; and in response to the feature value being outside the predetermined range, the controller maintains the idle time threshold.

19. The method of request item 18 further includes: In response to the idle time being greater than or equal to the idle time threshold, the controller is controlled to switch from the working state to the active idle state.

20. The method of request item 11, wherein the active idle state is the SOix state as defined by the Advanced Configuration and Power Interface (ACPI) standard.

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