Semiconductor structure including buffer layer under metal bump

Abstract

A semiconductor structure includes an interconnect layer disposed on a substrate. A metal buffer layer is disposed on the interconnect layer. A metal pad is disposed on the metal buffer layer. A metal bump is disposed on the metal pad and overlaps with a bump region of the substrate in a vertical direction. A plurality of first vias are disposed between the interconnect layer and the metal buffer layer. In a top view, the metal pad and the metal bump are surrounded by the metal buffer layer, and the first vias are all located outside the bump region.

Claims

1. A semiconductor structure, comprising: An interconnect structure layer is disposed on a substrate; A metal buffer layer is disposed on the interconnect structure layer; a metal pad is disposed on the metal buffer layer; a metal bump is disposed on the metal pad and overlaps with a bump area of ​​the substrate in the vertical direction; and a plurality of first through holes are disposed between the interconnect structure layer and the metal buffer layer, wherein, in a top view, the metal pad and the metal bump are surrounded by the metal buffer layer, and the first through holes are all located outside the bump area.

2. The semiconductor structure as described in claim 1, wherein the interconnect structure layer includes a plurality of metal layers and an interlayer dielectric layer between the metal layers, wherein the topmost metal layer of the plurality of metal layers is electrically connected to the metal buffer layer through the first via.

3. The semiconductor structure as described in claim 1, wherein the metal buffer layer and the metal pad comprise the same material.

4. The semiconductor structure as described in claim 3, wherein the materials of the metal buffer layer and the metal pad include aluminum (Al).

5. The semiconductor structure as described in claim 1, wherein the metal buffer layer and the metal pad comprise different materials.

6. The semiconductor structure as described in claim 5, wherein the material of the metal buffer layer includes copper (Cu) and the material of the metal pad includes aluminum (Al).

7. The semiconductor structure as described in claim 1, wherein, in the top view, the metal bump is surrounded by the metal pad.

8. The semiconductor structure as described in claim 1, wherein the first via is disposed on one side outside the bump region.

9. The semiconductor structure as described in claim 1, wherein the first via is disposed on opposite sides outside the bump region.

10. The semiconductor structure as described in claim 1 further includes a plurality of second vias disposed between the metal buffer layer and the metal pad, wherein, in the top view, a portion of the second vias is located within the bump region.

11. The semiconductor structure as described in claim 1 further includes a plurality of second vias disposed between the metal buffer layer and the metal pad, wherein, in the top view, the second vias are all located outside the bump area.

12. The semiconductor structure as described in claim 1 further includes a passivation layer covering the metal pad, wherein the metal bump is located on the passivation layer and is in direct contact with the metal pad through an opening in the passivation layer.

13. The semiconductor structure as described in claim 1, wherein the material of the metal bump includes gold.

Images