Thermal design for rack mount systems including optical communication modules

Abstract

An apparatus includes: a rack-mount device, wherein the rack-mount device includes: a housing configured in a server rack, wherein the housing has a width in the range of 16 to 20 inches and a height in the range of 1 to 12 inches, the housing including a front panel, a rear panel, and a bottom surface. The rack-mount device includes a first circuit board or a substrate having a first surface defining a length and a width of the first circuit board or substrate, wherein the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate forms an angle with respect to the bottom panel of the housing, the angle being in the range of 45° to 90°. It has at least one of the following: (i) the front panel of the housing is at least partially formed by the first circuit board or substrate, (ii) the first circuit board or substrate is attached to the front panel of the housing, or (iii) the first circuit board or substrate is substantially parallel to the front panel of the housing. The rack-mount device includes at least one data processor electrically coupled to the first circuit board or substrate and configured to process data; and at least one optical / electrical communication interface coupled to the first circuit board or substrate and configured to convert received optical signals into electrical signals, which are provided to the at least one data processor. The rack-mount device includes at least one of the following: (i) at least one inlet fan attached to the front panel of the housing, or (ii) at least one fan located near the front panel, wherein during operation of the at least one fan, at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

Description

Technical Field

[0001] This document describes a data processing system that includes an optical communication module. Prior Technology

[0002] This section provides information to help better understand this disclosure. Therefore, the statements in this section should be read in this context, and should not be construed as an admission of content in the prior art or not in the prior art.

[0003] As the input / output (I / O) capacity of electronic processing chips increases, electrical signals may no longer be able to provide sufficient I / O capacity within the limited size of practically feasible electronic chip packages. For example, some data centers include racks of data processing servers (e.g., switching servers) and use fiber optic cables to transmit optical signals between the data processing servers. Each data processing server receives a first optical signal from the fiber optic cable, converts the first optical signal into a first electrical signal, performs an operation (e.g., a switching operation) on the first electrical signal to generate a second electrical signal, converts the second electrical signal into a second optical signal, and outputs the second optical signal through the fiber optic cable. Since the data processing chips in the data processing servers generate a significant amount of heat, it is useful to provide an efficient method for dissipating the heat generated by the data processing chips. Summary of the Invention

[0004] In a general aspect, a system includes: a housing including a front panel, a rear panel, and a bottom panel, wherein the front panel includes an insertion portion that is rearwardly inserted relative to other portions of the front panel; a first circuit board or substrate attached to the insertion portion of the front panel, wherein the first circuit board or substrate has a first surface defining a length and a width, the first circuit board or substrate being positioned relative to the housing such that the first surface of the first circuit board or substrate forms an angle with the bottom panel of the housing, the angle being in the range of 45° to 90°; at least one data processor electrically coupled to the first circuit board or substrate and configured to process data; at least one heat sink thermally coupled to the at least one data processor and configured to remove heat from the at least one data processor during operation of the at least one data processor; at least one co-packaged optical module coupled to the first circuit board or substrate, wherein each co-packaged optical module is configured to convert an optical signal received from a corresponding optical fiber cable into an electrical signal provided to the at least one data processor; and at least one of the following: (i) At least one inlet fan is attached to a portion of the front panel other than the aforementioned insertion portion, or (ii) at least one fan is located near the front panel, wherein during operation of the at least one fan, at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a certain period of time, the first distance being less than one-quarter of a second distance between the front panel and the rear panel, and the at least one fan is used to blow air toward the at least one heatsink. The insertion distance is a non-zero value compared to the aforementioned insertion distance having zero, and is configured to improve the efficiency of the at least one heatsink in removing heat from the at least one data processor.

[0005] In another general aspect, a system includes: a housing including a front panel, a rear panel, and a bottom panel, wherein the front panel includes an insertion portion that is rearwardly inserted relative to other portions of the front panel; a first circuit board or substrate in a recessed position relative to the insertion portion of the front panel, wherein the first circuit board or substrate is spaced less than 12 inches from the insertion portion of the front panel, the first circuit board or substrate having a first surface defining a length and a width, the first circuit board or substrate being positioned relative to the housing such that the first circuit board... The first surface of the board or substrate forms an angle relative to a bottom panel of the housing, the angle being in the range of 45° to 90°; at least one data processor electrically coupled to the first board or substrate and configured to process data; at least one heat sink thermally coupled to the at least one data processor and configured to remove heat from the at least one data processor during operation of the at least one data processor; at least one co-packaged optical module coupled to the first board or substrate, wherein each co-packaged optical module is configured to convert an optical signal received from a corresponding optical fiber cable into an electrical signal provided to the at least one data processor; and at least one of the following: (i) at least one inlet fan attached to a portion of the front panel other than the aforementioned insertion portion, or (ii) at least one fan located near the front panel, wherein during operation of the at least one fan, at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time, the first distance being less than one-quarter of a second distance between the front panel and the rear panel. Compared to an insertion distance of zero, the aforementioned insertion distance is a non-zero value, configured to improve the efficiency of the at least one heat sink in removing heat from the at least one data processor. At least one fiber optic connector component is mounted on the insertion portion of the front panel, each fiber optic connector component being optically coupled to a corresponding co-packaged optical module via an optical connection path, and the fiber optic connector component is configured to be optically coupled to an external fiber optic cable. The insertion portion of the front panel is configured to be closed during system operation and opened during maintenance to allow user access to the at least one co-packaged optical module.

[0006] In another general aspect, an apparatus includes a rack-mount device. The rack-mount device includes: a housing configured in a server rack, wherein the housing has a width in the range of 16 to 20 inches and a height in the range of 1 to 12 inches, the housing including a front panel, a rear panel, and a bottom surface; a first circuit board or substrate having a first surface defining a length and a width of the first circuit board or substrate, wherein the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate forms an angle relative to the bottom panel of the housing, the angle being in the range of 45° to 90°. It has at least one of the following: (i) the front panel of the housing is at least partially formed by the first circuit board or substrate, (ii) the first circuit board or substrate is attached to the front panel of the housing, or (iii) the first circuit board or substrate is substantially parallel to the front panel of the housing. The rack-mount device includes at least one data processor electrically coupled to the first circuit board or substrate and configured to process data; at least one optical / electrical communication interface coupled to the first circuit board or substrate and configured to convert received optical signals into electrical signals, the electrical signals being provided to the at least one data processor; and at least one of the following: (i) at least one inlet fan attached to the front panel of the housing, or (ii) at least one fan located near the front panel, wherein during operation of the at least one fan, at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

[0007] In another general aspect, a system includes a server rack; and a plurality of rack-mounted servers mounted in the server rack. Each rack-mounted server includes: a housing having a width in the range of 18 to 20 inches and a height in the range of 1 to 8 inches, wherein the housing includes a front panel, a rear panel, and a bottom surface; a first circuit board or substrate having a first surface defining a length and a width of the first circuit board or substrate, wherein the first circuit board or substrate is positioned relative to the housing such that the first surface of the first circuit board or substrate forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed by the first circuit board or substrate; (ii) the first circuit board or substrate is attached to the front panel of the housing; or (iii) the first circuit board or substrate is substantially parallel to the front panel of the housing. The rack-mount server includes: at least one data processor electrically coupled to the first circuit board or substrate and configured to process data; at least one optical / electrical communication interface coupled to the first circuit board or substrate, wherein each first optical / electrical communication interface is configured to optically couple to an external optical fiber and configured to convert optical signals received from the external optical fiber into electrical signals provided to the at least one data processor; and at least one of the following: (i) at least one inlet fan attached to the front panel of the housing, or (ii) at least one fan located near the front panel, wherein at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time during operation of the at least one fan, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

[0008] In another general aspect, an apparatus includes an optical interconnect module, wherein the optical interconnect module includes: an optical input port for receiving an optical signal; a photonic integrated circuit configured to generate a first serial electrical signal based on the received optical signal; a first serializer / deserializer for generating a first parallel electrical signal group based on the first serial electrical signal and modulating the electrical signal; and a second serializer / deserializer configured to generate a second serial electrical signal based on the first parallel electrical signal group. The apparatus also includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a circuit board or substrate having a first surface defining a length and a width of the circuit board or substrate, wherein the circuit board or substrate is positioned relative to the housing such that the first surface of the circuit board or substrate forms an angle relative to the bottom surface of the housing, the angle being between 45° and 90°, wherein the optical interconnect module is coupled to the circuit board or substrate. The device comprises at least one of the following: (i) the front panel of the housing is at least partially formed by the circuit board or substrate; (ii) the circuit board or substrate is attached to the front panel of the housing; or (iii) the circuit board or substrate is substantially parallel to the front panel of the housing. The device includes at least one data processor electrically coupled to the circuit board or substrate and configured to process data derived from the second serial electrical signal; and at least one of the following: (i) at least one inlet fan attached to the front panel of the housing; or (ii) at least one fan located near the front panel, wherein at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time during operation of the at least one fan, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

[0009] In another general aspect, an apparatus includes an optical interconnect module, wherein the optical interconnect module includes: an optical input port for receiving optical signals from a plurality of channels; a photonic integrated circuit for processing the optical signals and generating a plurality of first serial electrical signals, wherein each first serial electrical signal is generated based on one of the optical signals from the channels; a first deserializer for converting the plurality of first serial electrical signals into a plurality of first parallel electrical signal groups and for modulating the electrical signals, wherein each first serial electrical signal is converted into a corresponding first parallel electrical signal group; and a first serializer for converting the plurality of first parallel electrical signal groups into a plurality of second serial electrical signals, wherein each first parallel electrical signal group is converted into a corresponding second serial electrical signal. The device includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a printed circuit board or substrate having a first surface defining a length and a width of the circuit board, wherein the printed circuit board or substrate is positioned relative to the housing such that the first surface of the printed circuit board or substrate forms an angle with respect to the bottom surface of the housing, the angle being between 45° and 90°, wherein the optical interconnect module is coupled to the printed circuit board or substrate. It has at least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board or substrate, (ii) the printed circuit board or substrate is attached to the front panel of the housing, or (iii) the printed circuit board or substrate is substantially parallel to the front panel of the housing. The aforementioned device includes at least one data processor electrically coupled to the aforementioned printed circuit board or substrate and configured to process data derived from the aforementioned second serial electrical signal; and at least one of the following: (i) at least one inlet fan attached to the aforementioned front panel of the housing, or (ii) at least one fan located near the aforementioned front panel, wherein at least a portion of a fan blade of the aforementioned at least one fan is within a first distance from the aforementioned front panel for at least a period of time during the operation of the aforementioned at least one fan, and the aforementioned first distance is less than one-quarter of a second distance between the aforementioned front panel and the aforementioned rear panel.

[0010] In another general aspect, an apparatus includes: an optical interconnect module, wherein the optical interconnect module includes: an optical input port for receiving an optical signal; a photonic integrated circuit configured to generate a first serial electrical signal based on the received optical signal; a first deserializer configured to generate a first parallel electrical signal group based on the first serial electrical signal and to modulate the electrical signal; and a first serializer configured to generate a second serial electrical signal based on the first parallel electrical signal group. The apparatus also includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a printed circuit board or substrate having a first surface defining a length and a width of the circuit board or substrate, wherein the printed circuit board or substrate is positioned relative to the housing such that the first surface of the printed circuit board or substrate forms an angle with the bottom surface of the housing, the angle being in the range of 45° to 90°, wherein the optical interconnect module is coupled to the printed circuit board or substrate. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board or substrate, (ii) the printed circuit board or substrate is attached to the front panel of the housing, or (iii) the printed circuit board or substrate is substantially parallel to the front panel of the housing. The device includes at least one data processor electrically coupled to the printed circuit board or substrate and configured to process data derived from the second serial electrical signal; and at least one of the following: (i) at least one inlet fan coupled to the front panel of the housing, or (ii) at least one fan located near the front panel, wherein at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time during operation of the at least one fan, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

[0011] In another general aspect, an apparatus includes an optical interconnect module, wherein the optical interconnect module includes: a first deserializer for receiving a plurality of first serial electrical signals and generating a plurality of first parallel electrical signal groups based on the plurality of first serial electrical signals, wherein each first parallel electrical signal group is generated based on a corresponding first serial electrical signal; a first serializer for generating a plurality of second serial electrical signals based on the plurality of first parallel electrical signal groups, wherein each second serial electrical signal is generated based on a corresponding first parallel electrical signal group; a photonic integrated circuit configured to generate a plurality of channels of optical signals based on the plurality of second serial electrical signals; and an optical output port for outputting the plurality of channels of optical signals. The aforementioned device includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a printed circuit board or substrate having a first surface defining a length and a width of the circuit board or substrate, wherein the printed circuit board or substrate is positioned relative to the housing such that the first surface of the printed circuit board or substrate forms an angle with the bottom surface of the housing, the angle being in the range of 45° to 90°, wherein the optical interconnect module is coupled to the printed circuit board or substrate. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board or substrate, (ii) the printed circuit board or substrate is attached to the front panel of the housing, or (iii) the printed circuit board or substrate is substantially parallel to the front panel of the housing. The aforementioned device includes at least one data processor electrically coupled to the aforementioned printed circuit board or substrate and configured to process data and generate an output signal, wherein the plurality of first serial electrical signals are derived from the output signal from the aforementioned at least one data processor; and at least one of the following: (i) at least one inlet fan mounted on the aforementioned front panel of the housing, or (ii) at least one fan located near the aforementioned front panel, wherein at least a portion of a fan blade of the aforementioned at least one fan is within a first distance from the aforementioned front panel for at least a period of time during the operation of the aforementioned at least one fan, and the first distance is less than one-quarter of a second distance between the aforementioned front panel and the aforementioned rear panel.

[0012] In another general aspect, an apparatus includes: an optical interconnect module, wherein the optical interconnect module includes: a first circuit board or substrate having a length, a width, and a thickness, wherein the length is at least twice the thickness, and the width is at least twice the thickness, the first circuit board or substrate having a first surface defined by the length and the width; an optical input port for receiving a plurality of optical signal channels; a photonic integrated circuit coupled to the first circuit board or substrate and configured to generate a plurality of first serial electrical signals based on the received optical signals; and a first electrical terminal array disposed on the first surface of the first circuit board or substrate, wherein the first electrical terminal array includes at least two electrical terminals distributed along the length direction and at least two electrical terminals distributed along the width direction, the first electrical terminals being used to output the first serial electrical signals. The aforementioned device includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a second printed circuit board or substrate having a first surface defining a length and a width of the second printed circuit board or substrate, wherein the second printed circuit board or substrate is positioned relative to the housing such that the first surface of the second printed circuit board or substrate forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°, wherein the optical interconnect module is coupled to the second printed circuit board or substrate. At least one of the following: (i) the front panel of the housing is at least partially formed by the second printed circuit board or substrate, (ii) the second printed circuit board or substrate is attached to the front panel of the housing, or (iii) the second printed circuit board or substrate is substantially parallel to the front panel of the housing. The aforementioned device includes at least one data processor electrically coupled to the aforementioned printed circuit board or substrate and configured to process data derived from the aforementioned first serial electrical signal; and at least one of the following: (i) at least one inlet fan coupled to the aforementioned front panel of the housing, or (ii) at least one fan located near the aforementioned front panel, wherein at least a portion of a fan blade of the aforementioned at least one fan is within a first distance from the aforementioned front panel for at least a period of time during the operation of the aforementioned at least one fan, and the aforementioned first distance is less than one-quarter of a second distance between the aforementioned front panel and the aforementioned rear panel.

[0013] In another general aspect, a system includes: a housing including a bottom surface and a front panel; a first circuit board or substrate including a first surface at an angle relative to the bottom surface of the housing, wherein the angle is in the range of 30° to 150°; at least one data processor electrically coupled to the first circuit board or substrate; and at least one optical interconnect module coupled to the first surface of the first circuit board or substrate, wherein each optical interconnect module includes a first optical connector configured to connect to an external optical link, and each optical interconnect module includes a first serial electrical signal configured to generate a first serial electrical signal based on an optical signal received from the first optical connector. The at least one data processor is used to process data carried in the first serial electrical signal. The system includes at least one of the following: (i) at least one inlet fan coupled to the front panel of the housing, or (ii) at least one fan located near the front panel, wherein at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time during operation of the at least one fan, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel.

[0014] In another general aspect, a system includes: a housing including a front panel, wherein the front panel includes a first circuit board or substrate; at least one data processor electrically coupled to the first circuit board or substrate; at least one optical / electrical communication interface coupled to the first circuit board or substrate; and at least one inlet fan mounted on the front panel of the housing.

[0015] In another general aspect, a system includes: a plurality of rack-mounted systems, each rack-mounted system including: a housing including a front panel, wherein the front panel includes a first circuit board or substrate; at least one data processor electrically coupled to the first circuit board or substrate; at least one optical / electrical communication interface coupled to the first circuit board or substrate; and at least one inlet fan mounted on the front panel of the housing.

[0016] In another general aspect, a system includes: a housing including a front panel; a first circuit board or substrate oriented at a first angle relative to the front panel, wherein the first angle is in the range of -30° to 30°; at least one data processor electrically coupled to the first circuit board or substrate; at least one optical / electrical communication interface coupled to the first circuit board or substrate; and at least one inlet fan mounted on the front panel of the housing.

[0017] In another general aspect, a system includes: a plurality of rack-mount systems, each rack-mount system including: a housing including a front panel; a first circuit board or substrate oriented relative to the front panel at a first angle, wherein the first angle is in the range of -30° to 30°; at least one data processor electrically coupled to the first circuit board or substrate; at least one optical / electrical communication interface coupled to the first circuit board or substrate; and at least one inlet fan mounted on the front panel of the housing.

[0018] In another general aspect, a system includes: a first optical interconnect module, comprising: a first optical input / output port configured to: (i) receive a first optical signal with multiple channels from a first complex optical fiber, or (ii) transmit a second optical signal with multiple channels to the first complex optical fiber; and a first photonic integrated circuit configured to: (i) generate a plurality of first serial electrical signals based on the first optical signals, or (ii) generate the second optical signal based on a plurality of second serial electrical signals. The first optical interconnect module includes a plurality of first serializers / deserializers configured to: (i) generate a plurality of third parallel electrical signal groups based on the plurality of first serial electrical signals and modulate the electrical signals, wherein each third parallel electrical signal group is generated based on a corresponding first serial electrical signal, or (ii) generate the plurality of second serial electrical signals based on a plurality of fourth parallel electrical signal groups, wherein each second serial electrical signal is generated based on a corresponding fourth parallel electrical signal group. The aforementioned first optical interconnect module includes a plurality of second serializers / deserializers configured to: (i) generate a plurality of fifth serial signals based on the plurality of third parallel electrical signal groups, wherein each fifth serial signal is generated based on a corresponding third parallel electrical signal group; or (ii) generate the plurality of fourth parallel electrical signal groups based on a plurality of sixth serial electrical signals, wherein each fourth parallel electrical signal group is generated based on a corresponding sixth serial signal. The aforementioned system includes a plurality of third serializers / deserializers configured to: (i) generate a plurality of seventh parallel electrical signal groups based on the plurality of fifth serial electrical signals and adjust the signals, wherein each seventh parallel electrical signal group is generated based on a corresponding fifth serial electrical signal; or (ii) generate the plurality of sixth serial electrical signals based on a plurality of eighth parallel electrical signal groups, wherein each sixth serial electrical signal is generated based on a corresponding eighth parallel electrical signal group. The system includes a data processor configured to: (i) process the plurality of seventh parallel electrical signal groups, or (ii) output the plurality of eighth parallel electrical signal groups. A housing is configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; a printed circuit board or substrate having a first surface defining a length and a width of the circuit board or substrate, wherein the printed circuit board or substrate is positioned relative to the housing such that the first surface of the printed circuit board or substrate forms an angle with the bottom surface of the housing, the angle being in the range of 45° to 90°, wherein the first optical interconnect module, the plurality of third serializers / deserializers, and the data processor are coupled to the printed circuit board or substrate.At least one of the following: (i) the front panel of the housing is at least partially formed of the printed circuit board or substrate; (ii) the printed circuit board or substrate is attached to the front panel of the housing; or (iii) the printed circuit board or substrate is substantially parallel to the front panel of the housing. The system includes at least one inlet fan mounted on the front panel of the housing.

[0019] In another general aspect, an apparatus includes a first substrate, wherein the first substrate includes: a first main surface and a second main surface; a first electrical contact array disposed on the first main surface and having a first minimum spacing between the contacts; a second electrical contact array disposed on the second main surface and having a second minimum spacing between the contacts, wherein the first minimum spacing is greater than the second minimum spacing; and an electrical connection between the first electrical contact array and the second electrical contact array. The apparatus includes a photonic integrated circuit having the first main surface and the second main surface; a first optical connector component configured to couple light to the first main surface of the photonic integrated circuit; an electronic integrated circuit having a first main surface having a first portion and a second portion, wherein the first portion of the first main surface is electrically coupled to the second main surface of the photonic integrated circuit, and the second portion of the first main surface is electrically coupled to the second electrical contact array disposed on the second main surface of the first substrate; and a housing configured to be mounted on a server. In the frame, the housing includes a front panel, a rear panel, and a bottom surface; a printed circuit board or a second substrate having a first surface defining a length and a width of the circuit board or the second substrate, wherein the printed circuit board or the second substrate is positioned relative to the housing such that the first surface of the printed circuit board or the second substrate forms an angle with the bottom surface of the housing, the angle ranging from 45° to 90°, wherein the first substrate, the photonic integrated circuit, the first optical connector component, and the electronic integrated circuit are coupled to the printed circuit board or the second substrate. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board or the second substrate, (ii) the printed circuit board or the second substrate is attached to the front panel of the housing, or (iii) the printed circuit board or the second substrate is substantially parallel to the front panel of the housing. The aforementioned device includes at least one of the following: (i) at least one inlet fan mounted on the front panel of the housing, or (ii) at least one fan located near the front panel, wherein at least a portion of a fan blade of the at least one fan is within a first distance from the front panel for at least a period of time during operation of the at least one fan, and the first distance is less than one-quarter of a second distance between the front panel and the rear panel, and the at least one fan is configured to blow air toward the integrated circuit or a heat dissipation device thermally coupled to the integrated circuit.

[0020] In another general aspect, an apparatus includes: a printed circuit board having a first main surface and a second main surface; and a substrate. The substrate includes: a first main surface and a second main surface; a first electrical contact array disposed on the first main surface and having a first minimum spacing between the contacts; a second electrical contact array disposed on the second main surface and having a second minimum spacing between the contacts, wherein the first minimum spacing is greater than the second minimum spacing; and an electrical connection between the first electrical contact array and the second electrical contact array. The first main surface of the substrate is configured to be detachably connected to the second main surface of the printed circuit board. The aforementioned device includes a photonic integrated circuit having a second main surface; a first optical connector component optically coupled to the second main surface of the photonic integrated circuit; an electronic integrated circuit electrically coupled to the second main surface of the photonic integrated circuit and the array of second electrical contacts disposed on the second main surface of the substrate; and a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface. The printed circuit board is positioned relative to the housing such that the surface of the printed circuit board forms an angle with the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board, (ii) the printed circuit board is attached to the front panel of the housing, or (iii) the printed circuit is substantially parallel to the front panel of the housing. The aforementioned device includes at least one inlet fan mounted on the front panel of the housing.

[0021] In another general aspect, an apparatus includes: a complex serializer unit; a complex deserializer unit; and a bus processing unit electrically coupled to the serializer unit and the deserializer unit. The bus processing unit is configured to switch signals at the serializer unit and the deserializer unit. The apparatus includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; and a printed circuit board positioned relative to the housing such that the surface of the printed circuit board forms an angle with respect to the bottom surface of the housing, and the angle is in the range of 45° to 90°, wherein the complex serializer unit, the complex deserializer unit, and the bus processing unit are coupled to the printed circuit board. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board, (ii) the printed circuit board is attached to the front panel of the housing, or (iii) the printed circuit board is substantially parallel to the front panel of the housing. The aforementioned device includes at least one inlet fan mounted on the aforementioned front panel of the aforementioned housing.

[0022] In another general aspect, an apparatus includes: a first serializer / deserializer array configured to convert one or more first serial signals into one or more parallel signal groups; a second serializer / deserializer array configured to convert one or more parallel signal groups into one or more second serial signals; a bus processing unit electrically coupled to the first serializer / deserializer array and the second serializer / deserializer array, wherein the bus processing unit is configured to process the one or more parallel signal groups and transmit one or more processed parallel signal groups to the second serializer / deserializer array; a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface; and a printed circuit board positioned relative to the housing such that the surface of the printed circuit board forms an angle with respect to the bottom surface of the housing, and the angle is in the range of 45° to 90°, wherein the first serializer / deserializer array, the second serializer / deserializer array, and the bus processing unit are coupled to the printed circuit board. At least one of the following: (i) the front panel of the housing is at least partially formed by the printed circuit board; (ii) the printed circuit board is attached to the front panel of the housing; or (iii) the printed circuit board is substantially parallel to the front panel of the housing. The device includes at least one inlet fan mounted on the front panel of the housing.

[0023] In another general aspect, an apparatus includes: a printed circuit board having a first main surface and a second main surface; and a substrate. The substrate includes: a first main surface and a second main surface; a first electrical contact array disposed on the first main surface and having a first minimum spacing between the contacts; a second electrical contact array disposed on the second main surface and having a second minimum spacing between the contacts, wherein the first minimum spacing is greater than the second minimum spacing; a third electrical contact array disposed on the first main surface; a first electrical connection between the first electrical contact array and the second electrical contact array, and a second electrical connection between the third electrical contact array and the second electrical contact array, and a second electrical connection between the third electrical contact array and the second electrical contact array, wherein the first main surface of the substrate is configured to be detachably connected to the second main surface of the printed circuit board. The device includes an electronic integrated circuit electrically coupled to a second electrical contact array disposed on a second main surface of the substrate; a photonic integrated circuit having a second main surface and electrical contacts disposed on the second main surface, the electrical contacts being electrically coupled to a third electrical contact array disposed on a first main surface of the substrate; a first optical connector component optically coupled to the photonic integrated circuit; and a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface. The printed circuit board is positioned relative to the housing such that the first main surface of the printed circuit board forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following is true: (i) the front panel of the housing is at least partially formed by the printed circuit board, (ii) the printed circuit board is attached to the front panel of the housing, or (iii) the printed circuit board is substantially parallel to the front panel of the housing. The device includes at least one inlet fan mounted on the front panel of the housing.

[0024] In another general aspect, a method includes: receiving a plurality of first optical signals from a plurality of optical fibers through a plurality of channels; generating a plurality of first serial electrical signals based on the received optical signals, wherein each first serial electrical signal is generated based on one channel of the plurality of first optical signals; generating a plurality of first parallel electrical signal groups based on the plurality of first serial electrical signals, and adjusting the electrical signals, wherein each first parallel electrical signal group is generated based on a corresponding first serial electrical signal; generating a plurality of second serial electrical signals based on the plurality of first parallel electrical signal groups, wherein each second serial electrical signal is generated based on a corresponding first parallel electrical signal group; and removing heat generated by at least one data processor configured to process the plurality of second serial electrical signals or electrical signals derived from the plurality of second serial electrical signals, wherein heat removal includes using at least one of: (i) at least one inlet fan coupled to the front panel of the housing, the housing housing accommodating the at least one data processor to increase airflow in the housing, or (ii) At least one inlet fan is located near the aforementioned front panel, wherein during operation of the at least one inlet fan, at least a portion of a fan blade of the at least one inlet fan is within a first distance from a front panel of a housing housing the at least one data processor for at least a period of time, the first distance being less than one-third of a second distance between the front panel and a rear panel of the housing, to increase airflow within the housing.

[0025] In another general aspect, an apparatus includes: a circuit board; a first structure attached to the circuit board, wherein the first structure is configured to allow a light module to be detachably coupled to the first structure, and the light module is configured to allow a fiber optic connector to be detachably coupled to the light module; a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface. The circuit board is positioned relative to the housing such that a surface of the circuit board forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed by the circuit board, (ii) the circuit board is attached to the front panel of the housing, or (iii) the circuit board is substantially parallel to the front panel of the housing; and at least one inlet fan mounted on the front panel of the housing.

[0026] In another general aspect, an apparatus includes: an optical module configured to be removably coupled to a first structure attached to a circuit board, wherein the optical module includes a photonic integrated circuit, the optical module being configured to hold the photonic integrated circuit in place when the optical module is coupled to the first structure, and to enable electrical signals from the photonic integrated circuit to be transmitted to the circuit board. The optical module is configured to allow a fiber optic connector to be detachably coupled to the optical module, wherein the optical module is configured to enable optical signals from the fiber optic connector to be transmitted to the photonic integrated circuit. The apparatus includes a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, and a bottom surface. The circuit board is positioned relative to the housing such that a surface of the circuit board forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed of the circuit board; (ii) the circuit board is attached to the front panel of the housing; or (iii) the circuit board is substantially parallel to the front panel of the housing. The device includes at least one inlet fan mounted on the front panel of the housing.

[0027] In another general aspect, an apparatus includes: a rack-mount device, wherein the rack-mount device includes: a housing configured for mounting in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, and a top panel; a first circuit board having a first surface defining a length and a width of the first circuit board, wherein the first circuit board is positioned relative to the housing such that the first surface of the first circuit board forms an angle with respect to the bottom panel of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed by the first circuit board, (ii) the first circuit board is attached to the front panel of the housing, (iii) the first circuit board is substantially parallel to the front panel of the housing, or (iv) the first circuit board is spaced apart from the front panel and the distance between the first circuit board and the front panel does not exceed 12 inches. The rack-mounted device includes at least one data processor mounted on the first circuit board for processing data; a heat dissipation module thermally coupled to the at least one data processor; at least one communication interface for the at least one data processor, wherein the at least one communication interface is coupled to the first circuit board; and an active airflow control module for guiding intake air to the heat dissipation module, wherein the active airflow control module includes an inlet fan and an outlet fan, the inlet fan being located in a front half of the housing and the outlet fan being located in a rear half of the housing.

[0028] In another general aspect, a system includes: a server rack; and a plurality of rack-mounted servers mounted in the server rack. Each rack-mounted server includes: a housing having a width in the range of 16 to 20 inches and a height in the range of 1 to 12 inches, wherein the housing includes a front panel, a rear panel, and a bottom surface; and a first circuit board having a first surface defining a length and a width of the first circuit board, wherein the first circuit board is positioned relative to the housing such that the first surface of the first circuit board forms an angle with respect to the bottom surface of the housing, the angle being in the range of 45° to 90°. At least one of the following: (i) the front panel of the housing is at least partially formed by the first circuit board; (ii) the first circuit board is attached to the front panel of the housing; (iii) the first circuit board is substantially parallel to the front panel of the housing; or (iv) the first circuit board is spaced apart from the front panel and the distance between the first circuit board and the front panel does not exceed 12 inches; the rack-mount server includes at least one data processor mounted on the first circuit board for processing data; at least one communication interface coupled to the first circuit board, wherein each communication interface is used to couple an external cable; and at least one inlet fan mounted in a front half of the housing, the inlet fan having a rotation axis at an angle θ relative to a plane of the front panel, the angle θ being measured along a plane parallel to the bottom panel, and θ ≤ 45°.

[0029] In another general aspect, an apparatus includes: a rack-mount device comprising: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region.

[0030] Other aspects include other combinations of the features described above and other features, expressed as methods, apparatus, systems, program products, and other means.

[0031] Using optical signal interconnects in electronic chip packaging offers the advantage that optical signals can be transmitted with a higher input / output capacity per unit area compared to electrical inputs / outputs.

[0032] Specific embodiments of the subject matter described in this specification can be implemented to achieve one or more of the following advantages: The data processing system features high power efficiency, low construction costs, low operating costs, and high flexibility in reconfiguring optical network connections. The heat dissipation solutions described herein allow for the effective dissipation of heat generated by the data processor handling large amounts of data carried by fiber optic cables.

[0033] Details of one or more embodiments of the subject matter described in this specification will be set forth in the following drawings and description. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims.

[0034] Unless otherwise specified, all technical and scientific terms used herein have the same meaning as understood by one of ordinary skill in the art to which this invention pertains. In the event of any conflict with any patent application or patent application disclosure incorporated herein by reference, this specification, including its definitions, shall prevail. Simple Explanation of the Diagram

[0035] This disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be emphasized that, by convention, the various features in the drawings are not drawn to scale. For clarity, the dimensions of the various features may be arbitrarily enlarged or reduced. Figure 1 is a block diagram of an example optical communication system. Figure 2 is a schematic side view of an example of a data processing system. Figure 3 is a schematic side view of an example of an integrated optical device. Figure 4 is a schematic side view of an example of a data processing system. Figure 5 is a schematic side view of an example of an integrated optical device. Figures 6 and 7 are schematic side views of an example of a data processing system. Figure 8 is a schematic side view of an example of an integrated optical communication device. Figures 9 and 10 are schematic diagrams illustrating examples of the layout patterns of the optical and electrical terminals of an integrated optical communication device. Figures 11, 12, 13 and 14 are schematic side views of examples of data processing systems. Figures 15 and 16 are bottom views of an example of an integrated light device. Figure 17 is a schematic diagram of various integrated optical communication devices that can be used in data processing systems. Figure 18 is a diagram of an example of an octal serializer / deserializer block. Figure 19 is a diagram of an example of an electronic communication integrated circuit. Figure 20 is a functional block diagram of an example data processing system. Figure 21 shows an example of a rack-mounted data processing system. Figures 22, 23, 24, 25, 26A, 26B, 26C, 27, 28A, and 28B are top views of examples of rack-mounted data processing systems incorporating optical interconnect modules. Figures 29A and 29B are top views of an example rack-mounted data processing system incorporating multiple optical interconnect modules. Figures 30 and 31 are block diagrams illustrating examples of data processing systems. Figure 32 is a schematic side view of an example of a data processing system. Figure 33 is a diagram of an electronic communication integrated circuit including an octal serializer / deserializer block. Figure 34 is a flowchart illustrating an example process of using a data processing system to process optical and electrical signals. Figure 35A is a diagram of an optical communication system. Figures 35B and 35C are schematic diagrams of a co-packaged optical interconnect module. Figures 36 and 37 are schematic diagrams of examples of optical communication systems. Figures 38 and 39 are schematic diagrams of serializer / deserializer block examples. Figures 40A, 40B, 41A, 41B and 42 are schematic diagrams of examples of bus processing units. Figure 43 is an exploded view of an example of a front-end module of a data processing system. Figure 44 is an exploded view of an example of the internal structure of an optical module. Figure 45 shows the internal assembly diagram of the optical module. Figure 46 is an exploded view of the optical module. Figure 47 shows the assembly diagram of the optical module. Figure 48 is a schematic diagram of a grid structure and a portion of a circuit board. Figure 49 shows the lower mechanical part before the mesh structure is inserted. Figure 50 is an example of a filled front view of a part of an assembly system. Figure 51A is a front view of an example of module installation. Figure 51B is a side view of an example of module installation. Figure 52A is a front view of an example of a mechanical connector structure and an optical module installed within a mesh structure. Figure 52B is a side view of an example of a mechanical connector structure and an optical module installed within a mesh structure. Figures 53 and 54 are examples of components including cables, fiber optic connectors, mechanical connector modules, and mesh structures. Figures 55A and 55B are perspective views of the mechanism shown in Figures 53 and 54 before the fiber optic connector is inserted into the mechanical connector structure. Figure 56 shows a perspective view of the optical module and mechanical connector structure inserted into the mesh structure. Figure 57 shows a perspective view of the structural fit between the fiber optic connector and the mechanical connector. Figures 58A to 58D are illustrations of an example optical module including a latching mechanism. Figure 59 is a diagram of another example of a light module. Figures 60A and 60B are illustrations of example embodiments of lever and latching mechanisms in an optical module with connectors. Figure 61 is a cross-sectional view of a module installed in an assembly with a connector, viewed from the front. Figures 62 to 65 show cross-sectional views of examples of fiber optic cable connection designs. Figure 66 is a diagram of an electrical contact pad. Figure 67 is a top view of an example of a rack-mounted server. Figure 68A is a top view of an example of a rack-mounted server. Figure 68B shows an example of the front panel of a rack-mounted server. Figure 68C is a perspective view of an example heat sink. Figure 69A is a top view of an example of a rack-mounted server. Figure 69B shows an example of the front panel of a rack-mounted server. Figure 70 is a top view of an example of a rack-mounted server. Figure 71A is a top view of an example of a rack-mounted server. Figure 71B is a front view of a rack-mounted server. Figure 72 is a top view of an example of a rack-mounted server. Figure 73A is a top view of an example of a rack-mounted server. Figure 73B is a front view of an example of a rack-mounted server. Figure 74A is a top view of an example of a rack-mounted server. Figure 74B is a front view of an example of a rack-mounted server. Figure 75A is a top view of an example of a rack-mounted server. Figure 75B is a front view of an example of a rack-mounted server. Figure 75C is a front view of an example of a rack-mounted server. Figure 76 is a diagram of a network rack including multiple rack servers. Figure 77A is a side view of an example of a rack-mounted server. Figure 77B is a top view of a rack-mounted server. Figure 78 is a top view of an example of a rack-mounted server. Figure 79 is a block diagram of an example of an optical communication system. Figure 80A is a diagram of an example optical communication system. Figure 80B is an example of the use of fiber optic cable assemblies in the optical communication system shown in Figure 80A. Figure 80C is an enlarged view of the fiber optic cable assembly in Figure 80B. Figure 80D is an enlarged view of the portion above the fiber optic cable assembly in Figure 80B. Figure 80E is an enlarged view of the lower part of the fiber optic cable assembly in Figure 80B. Figure 81 is a block diagram of an example of an optical communication system. Figure 82A is a block diagram of an example optical communication system. Figure 82B shows an example of an optical fiber cable assembly. Figure 82C is an enlarged view of the fiber optic cable assembly in Figure 82B. Figure 82D is an enlarged view of the portion above the fiber optic cable assembly in Figure 82B. Figure 82E is an enlarged view of the lower part of the fiber optic cable assembly in Figure 82B. Figure 83 is a block diagram of an example of an optical communication system. Figure 84A is a block diagram of an example optical communication system. Figure 84B is a diagram of an example of an optical fiber cable assembly. Figure 84C is an enlarged view of the fiber optic cable assembly in Figure 84B. Figures 85, 86, 87A, and 87B are examples of data processing systems. Figure 88 is an example of port mapping for fiber optic interconnect cable connectors. Figures 89 and 90 are examples of port mapping for fiber optic interconnect cable connectors. Figures 91 and 92 are examples of feasible port mapping for fiber optic interconnect cable connectors in general fiber optic interconnect cables. Figure 93 shows an example of fiber optic connector port mapping that is not applicable to general fiber optic interconnect cables. Figures 94 and 95 are examples of feasible port mapping for fiber optic connectors in general fiber optic interconnect cables. Figure 96 is a top view of a rack-mounted server. Figure 97A is a perspective view of the rack-mounted server in Figure 96. Figure 97B is a perspective view of the rack-mounted server in Figure 96 with the top panel removed. Figure 98 is a view of the front part of the rack-mounted server in Figure 96. Figure 99 includes the perspective front and rear views of the rack-mounted server front panel shown in Figure 96. Figure 100 is a top view of an example of a rack-mounted server. Figures 101, 102, 103A, and 103B are example diagrams of fiber optic connectors. Figures 104 and 105 are top and front views, respectively, of an example rack-mount assembly including a co-packaged optical module mounted on a vertical printed circuit board. Figure 106 is a diagram of an example of an optical fiber cable assembly. Figure 107 is a front view of a rack-mounted assembly with fiber optic cable assemblies. Figure 108 is a top view of an example of a rack-mount assembly including a co-packaged optical module mounted on a vertical printed circuit board. Figure 109 is a front view of a rack-mounted assembly with fiber optic cable assemblies. Figures 110 and 111 are top and front views, respectively, of an example of a rack-mounted device. Figure 112 is an example of a rack-mounted device with example parameter values. Figures 113 and 114 show another example of a rack-mounted assembly with example parameter values. Figures 115 and 116 are top and front views, respectively, of an example of a rack-mounted device. Figures 117 to 122 are examples of systems including co-packaged optical modules. Figure 123 shows an example of a vertically mounted processor chip. Figure 124 is a top view of an example rack system including several vertically mounted processor chips. Figure 125A is a side view of an example rack-mounted server with a hinged front panel. Figure 125B is an example of a rack-mounted server with pluggable modules. Figures 126A, 126B, and 127 are examples of rack-mounted servers with pluggable modules. Figure 128 is a diagram of an example of an optical fiber guide that includes one or more photon suppliers. Figure 129 includes an example of a rack-mounted server with rails / cages to assist in the insertion of fiber optic guides. Figure 130 shows an example of a CPO module with a compression plate. Figure 131 is a diagram of an example of a compression plate. Figure 132 shows an example of a U-bolt. Figure 133 shows an example of a wave spring. Figures 134 and 135A to 135C are examples of compression plates fixed to the front lattice structure. Figure 136 is an exploded front perspective view of an example of components in a rack-mount system, wherein the rack-mount system includes a substrate, a printed circuit board, a front grid structure, a rear grid structure, and a heat dissipation device. Figure 137 is an exploded perspective view of an example of the component shown in Figure 136. Figure 138 is an exploded top view of an example of the component shown in Figure 136. Figure 139 is an exploded side view of an example of the component shown in Figure 136. Figure 140 is a front perspective view of an example of components that have been secured together. Figure 141 is a front perspective view of an example of an assembled component without a front lattice structure. Figure 142 is a front perspective view of an example of a substrate, rear grid structure, and heat dissipation device that have been fixed together. Figure 143 is a front perspective view of an example of a rear lattice structure and heat dissipation device that has been fixed together. Figure 144 is a front perspective view of an example of a heat dissipation device and screws. Figure 145 is a rear perspective view of an example of components that have been fastened together. Figure 146 is a rear perspective view of an example component without a back grid structure. Figure 147 is a rear perspective view of an example of a front lattice structure, printed circuit board, and substrate that have been fastened together. Figure 148 is a rear perspective view of an example of a front grid structure and printed circuit board that have been fastened together. Figure 149 is a rear perspective view of an example of the front lattice structure. Figure 150 shows an example configuration for connecting a data processing chip to a CPO module. Figures 151 to 153 are example diagrams of components in a rack-mount system, wherein the rack-mount system includes a substrate, a printed circuit board, a front grid structure, a rear grid structure, and a heat dissipation device. Figure 154 is an example of a CPO module. Figures 155A and 155B are perspective views of examples of LGA sockets, optical modules, and compression boards. Figure 156 is a front view of an example of a compression plate array. Figure 157 is a front perspective view of an example of an assembly including a substrate, an optical module, and a compression plate. Figure 158 is a top view of an example of an assembly including a substrate, data processing integrated circuitry, an optical module, and a compression board. Figure 159 is a side view of an example of a rack-mounted server with a hinged front panel. Figure 160 is a top view of an example of a rack-mounted server with a hinged front panel. Figure 161 shows an example of an optical fiber cable. Figures 162 to 166 are examples of systems that can provide memory groups or memory pools. Figures 167, 168, 169A, 169B, 170, 171A, 171B, 171C, and 171D are example diagrams of the packaging configuration of a compact co-packaged optical module. Figure 172 is a perspective view of an example of a rack-mounted server. Figures 173 to 175 are perspective views of an example of a rack-mounted server. Figure 176 shows a top and side view of a rack-mounted server with a hinged front panel. Figure 177 shows a top view, a front view of the VASIC panel, and a front view of the front panel of an example rack-mounted server. Figure 178 shows a top view, a front view of the VASIC panel, and a front view of the front panel of another example of a rack-mounted server. Implementation

[0036] This document describes a novel system for high-bandwidth data processing, including a novel input / output interface module for coupling an optical fiber bundle to data processing integrated circuitry (e.g., a network switch, central processing unit, graphics processing unit, tensor processing unit, digital signal processor, and / or other application-specific integrated circuitry (ASIC)) to process data transmitted through the optical fiber. In some embodiments, the data processing integrated circuitry is mounted on a circuit board located close to the input / output interface module via a relatively short electrical signal path on the circuit board. The input / output interface module includes a first connector that allows a user to easily connect or disconnect the input / output interface module from the circuit board. The input / output interface module also includes a second connector that allows a user to easily connect or disconnect the optical fiber bundle from the input / output interface module. In some embodiments, a rack-mount system with a front panel is provided, wherein the circuit board (which supports the input / output interface module and the data processing integrated circuitry) is mounted vertically in a direction substantially parallel to and near the front panel. In some examples, the circuit board serves as the front panel or part of the front panel. The second connector of the input / output interface module faces the front of the rack-mounted system to allow users to easily connect or disconnect fiber optic bundles from the system.

[0037] In some implementations, a key feature of the high-bandwidth data processing system is that optical signals can be routed from optical fibers through the input / output interface modules to the data processing integrated circuitry via a relatively short electrical signal path by vertically mounting the circuit board supporting the input / output interface modules and the data processing integrated circuitry near the front panel, or by configuring the circuit board as part of the front panel. This allows signals transmitted to the data processing integrated circuitry to have high bit rates (e.g., exceeding 50 Gbps) while maintaining low crosstalk, low distortion, and low noise, thereby reducing the power consumption and footprint of the data processing system.

[0038] In some implementations, a key feature of high-bandwidth data processing systems is the lower cost of maintenance and repair compared to conventional systems. For example, input / output interface modules and fiber optic cables are configured to be detachable, allowing defective modules to be replaced without disassembling the data processing system or rerouting any fiber optic cables. Another characteristic of high-bandwidth data processing systems is the flexibility and ease of modification in routing high-bit-rate signals through fiber optic cables to various data processing integrated circuits, as users can easily connect or disconnect fiber optic bundles from the front panel of the rack-mounted system. For instance, connecting hundreds of fiber optic bundles to the optical connectors of a rack-mounted system is almost as simple as plugging a USB cable into a USB port. Furthermore, the input / output interface modules can be manufactured using relatively standard, low-cost, and energy-efficient components, resulting in relatively lower initial hardware and ongoing operating costs compared to conventional systems.

[0039] In some implementations, optical interconnects can co-package and / or co-integrate optical transponders with electronic processing chips. Such transponder solutions, which consume relatively low power and are sufficiently robust against significant temperature variations, are useful for electronic processing chip packaging. In some implementations, high-speed and / or high-bandwidth data processing systems can include large-scale spatially parallel optical interconnect solutions that multiplex messages onto a relatively small number of wavelengths and use a relatively large number of parallel spatial paths for chip-to-chip interconnects. For example, a relatively large number of parallel spatial paths can be arranged in a two-dimensional array using connector structures, such as those disclosed in U.S. Patent Application 16 / 816,171, filed March 11, 2020, which is incorporated herein by reference in its entirety.

[0040] Figure 1 illustrates a block diagram of a communication system 100, which incorporates one or more novel features described herein. In some embodiments, system 100 includes nodes 101_1 to 101_6 (collectively referred to as 101), and in some embodiments, each node may include one or more of the following: optical communication devices, electronic and / or optical switching devices, electronic and / or optical path routing devices, network control devices, flow control devices, synchronization devices, computing devices, and data storage devices. Nodes 101_1 to 101_6 may be suitably interconnected via fiber optic links 102_1 to 102_12 (collectively referred to as 102) to establish communication paths between communication devices within the nodes. Fiber optic link 102 may include fiber optic cables as described in U.S. Patent Application 16 / 822,103, filed March 18, 2020, which is incorporated herein by reference in its entirety. System 100 may also include one or more optical power supply modules 103 that generate one or more optical outputs, each optical output including one or more continuous wave (CW) optical fields and / or one or more optical pulse sequences for one or more optical communication devices at nodes 101_1 to 101_6. For illustrative purposes, only one such optical power supply module 103 is shown in FIG1. ​​It will be understood by those skilled in the art that some embodiments may have more than one optical power supply module 103 suitably distributed across system 100, and that such multiple power supply modules may be synchronized, for example, using some of the techniques disclosed in U.S. Patent Application 16 / 847,705, filed April 14, 2020, which is incorporated herein by reference in its entirety.

[0041] Some inter-terminal communication paths may be established via optical power supply module 103 (e.g., see the communication path between nodes 101_2 and 101_6). For example, the communication path between nodes 101_2 and 101_6 may be jointly established by optical fiber links 102_7 and 102_8, whereby light from optical power supply module 103 is multiplexed onto optical fiber links 102_7 and 102_8.

[0042] Some inter-terminal communication paths can be established through one or more optical multiplexing units 104 (e.g., see the communication path between nodes 101_2 and 101_6). For example, the communication path between nodes 101_2 and 101_6 can be established by optical fiber links 102_10 and 102_11. Optical multiplexing unit 104 is also connected via link 102_9 to receive light from optical power supply module 103, and can therefore multiplex the received light onto optical fiber links 102_10 and 102_11.

[0043] Some inter-terminal communication paths can be established through one or more optical switching units 105 (e.g., see the communication path between nodes 101_1 and 101_4). For example, the communication path between nodes 101_1 and 101_4 can be jointly established by optical fiber links 102_3 and 102_12, whereby light from optical fiber links 102_3 and 102_4 is statically or dynamically directed to optical fiber link 102_12.

[0044] As used herein, the term "network element" refers to any element within system 100 that generates, modulates, processes, or receives light for communication purposes. Example network elements include node 101, optical power supply module 103, optical multiplexing unit 104, and optical switching unit 105.

[0045] Some optical distribution paths can pass through one or more network elements. For example, optical power supply module 103 can provide light to node 101_4 through fiber optic links 102_7, 102_4 and 102_12, allowing the light to pass through network elements 101_2 and 105.

[0046] Various components of the communication system 100 can benefit from the use of optical interconnects, which can use photonic integrated circuits containing optoelectronic devices, co-packaged and / or co-integrated with electronic chips including integrated circuits.

[0047] As used herein, the term "photonic integrated circuit" (or PIC) should be interpreted to encompass planar optical circuits (PLCs), integrated optoelectronic devices, wafer-level products on a substrate, individual photonic chips and dies, and hybrid devices. The substrate may be made of one or more ceramic materials or organic "high-density stacked units (HDBUs)". Example material systems that can be used to fabricate various photonic integrated circuits include, but are not limited to, III-V semiconductor materials, silicon photonics, silicon-based silicon products, planar optical circuits based on silicon glass, polymer integrated platforms, lithium niobate and its derivatives, nonlinear optical materials, etc. Packaged devices (e.g., links and / or packaged chips) and unpackaged devices (e.g., dies) can both be referred to as planar optical circuits.

[0048] Photonic integrated circuits are used in a variety of applications in telecommunications, instrumentation control, and signal processing. In some implementations, photonic integrated circuits use optical waveguides to realize and / or interconnect various circuit components, such as optical switches, couplers, routers, splitters, multiplexers / demultiplexers, filters, modulators, phase splitters, lasers, amplifiers, wavelength converters, optoelectronic (O / E) and electro-optic (E / O) signal converters, etc. For example, the waveguide in a photonic integrated circuit can be a solid-state optical conductor on a wafer, which can guide light due to the refractive index contrast between the waveguide core and the cladding. Photonic integrated circuits can include planar substrates on which optoelectronic devices are grown using additive manufacturing processes and / or etched onto the substrate using subtractive manufacturing processes, such as a multi-step sequence of photolithography and chemical processing steps.

[0049] In some embodiments, the "optoelectronic device" can operate on light and current (or voltage) and may include one or more of the following components: (i) an electrically driven light source, such as a laser diode; (ii) an optical amplifier; (iii) a photoelectric converter, such as a photodiode; (iv) an optoelectronic component capable of controlling the propagation of light and / or certain characteristics (e.g., amplitude, phase, polarization), such as an optical modulator or switch. The corresponding optoelectronic circuit may further include one or more optical elements and / or one or more electronic components, enabling the optoelectronic device to be used in a manner consistent with the circuit's intended function. Some optoelectronic devices may be implemented using one or more photonic integrated circuits.

[0050] The term "integrated circuit" (IC) as used herein should be interpreted to include both unpackaged dies and packaged dies. In a typical integrated circuit manufacturing process, dies (chips) are produced in relatively large batches using silicon wafers or other suitable materials. Circuits and optical circuits can be progressively created on the wafer using a multi-step sequence of steps such as photolithography and chemical processing, and then each wafer is diced ("diced") into many pieces (wafers, dies), each containing a corresponding copy of the circuit being manufactured. Each individual die may be appropriately packaged before being incorporated into a larger circuit, or it may not be packaged at all.

[0051] The term "hybrid circuit" can refer to a multi-component circuit consisting of multiple monolithic integrated circuits and possibly some discrete circuit components, all of which are attached to each other and electrically mounted on a common base, carrier, or substrate. A representative hybrid circuit may include (i) one or more packaged or unpackaged dies, some or all of which include optical, optoelectronic, and / or semiconductor devices, and (ii) one or more optional discrete components, such as connectors, resistors, capacitors, and inductors. Electrical connections between integrated circuits, dies, and discrete components can be exemplarily achieved using patterned conductive (e.g., metallic) layers, ball grid arrays, solder bumps, wire bonding, etc. Electrical connections are detachable, for example, by using planar grid arrays and / or compression inserters. Individual integrated circuits may include any combination of one or more corresponding substrates, one or more redistribution layers (RDLs), one or more interposers, one or more laminates, etc.

[0052] In some embodiments, individual wafers may be stacked. As used herein, the term "stack" refers to an ordered arrangement of packaged or unpackaged dies, wherein the main planes of the stacked dies are substantially parallel to each other. Stacks may typically be mounted on a carrier with the main planes of the stacked dies parallel to each other and / or parallel to the main plane of the carrier.

[0053] The "principal plane" of an object, such as a die, photonic integrated circuit, substrate, or integrated circuit, is parallel to its substantially flat surface and has the largest dimension, such as length and width, among all the object's outer surfaces. This substantially flat surface can be called the principal surface. The outer surfaces of an object with a relatively large dimension (e.g., length) and a relatively small dimension (e.g., height) are usually referred to as the object's edges.

[0054] Figure 2 is a schematic cross-sectional view of a data processing system 200, which includes an integrated optical communication device 210 (also referred to as an optical interconnect module), a fiber optic connector assembly 220, a packaging substrate 230, and an electronic processor integrated circuit 240. The data processing system 200 can be used in one or more of the devices 101_1 to 101_6 of the embodiment shown in Figure 1. Figure 3 shows an enlarged cross-sectional view of the integrated optical communication device 210.

[0055] Referring to Figures 2 and 3, the integrated optical communication device 210 includes a substrate 211 having a first main surface 211_1 and a second main surface 211_2. The main surfaces 211_1 and 211_2 respectively include arrays of electrical contacts 212_1 and 212_2. In some embodiments, the minimum spacing d1 between any two contacts in the array of electrical contacts 212_1 is greater than the minimum spacing d2 between any two contacts in the array of electrical contacts 212_2. In some embodiments, the minimum spacing between any two electrical contacts in the array of electrical contacts 212_2 is between 40 and 200 micrometers. In some embodiments, the minimum spacing between any two electrical contacts in the array of electrical contacts 212_1 is between 200 micrometers and 1 millimeter. At least some contacts 212_1 are electrically connected to at least some electrical contacts 212_2 through the substrate 211. In some embodiments, contacts 212_1 may be permanently attached to a corresponding array of electrical contacts 232_1 on a packaging substrate 230. In some embodiments, contact 212_1 may include a mechanism that allows device 210 to be detachably connected to package substrate 230, as indicated by double arrow 233. For example, the system may include mechanical mechanisms (e.g., one or more snap-fit ​​or screw-in mechanisms) to hold various modules in place. In some embodiments, contacts 212_1, 212_2, and / or 232_1 may include one or more of solder balls, metal pillars, and / or metal pads. In some embodiments, contacts 212_1 and / or 232_1 may include one or more additional spring-loaded elements, compression interposers, and / or planar grid arrays.

[0056] In some embodiments, the integrated optical communication device 210 can be connected to the electronic processor integrated circuit 240 using traces 231 embedded in one or more layers of the package substrate 230. In some embodiments, the processor integrated circuit 240 may include a monolithically embedded serializer / deserializer (SerDes) array 247 electrically coupled to the traces 231. In some embodiments, the processor integrated circuit 240 may include electronic switching circuitry, electronic routing circuitry, network control circuitry, flow control circuitry, computing circuitry, synchronization circuitry, time stamping circuitry, and data storage circuitry. In some embodiments, the processor integrated circuit 240 may be a network switch, a central processing unit, a graphics processing unit, a tensor processing unit, a digital signal processor, or an application-specific integrated circuit (ASIC).

[0057] Because both the electronic processor integrated circuit 240 and the integrated communication device 210 are mounted on the package substrate 230, mounting them on the package substrate 230 allows for shorter electrical connectors or traces 231 compared to mounting them on separate circuit boards. Shorter electrical connectors or traces 231 can transmit signals with higher data rates, lower noise, lower distortion, and / or lower crosstalk.

[0058] In some implementations, the electrical connectors or traces can be configured as differential pairs of transmission lines, such as a ground-signal-ground-signal-ground configuration. In some examples, the speed of such signal lines can be 10 Gbps or higher; 56 Gbps or higher; 112 Gbps or higher; or 224 Gbps or higher.

[0059] In some embodiments, the integrated optical communication device 210 further includes a first optical connector component 213 having a first surface 213_1 and a second surface 213_2. Connector component 213 receives a second optical connector component 223 from the fiber optic connector assembly 220, the second optical connector component 223 being optically coupled to connector component 213 through surfaces 213_1 and 223_2. In some embodiments, connector component 213 is detachably attached to connector component 223, as indicated by double arrows 234, for example through holes 235 in the encapsulation substrate 230. In some embodiments, connector component 213 may be permanently attached to connector component 223. In some embodiments, connector components 213 and 223 may be implemented as a single connector element combining the functions of both connector components 213 and 223.

[0060] In some embodiments, optical connector component 223 is attached to an array of optical fibers 226. In some embodiments, the optical fiber array may include one or more of the following: single-mode fiber, multimode fiber, multi-core fiber, polarization-maintaining fiber, dispersion-compensating fiber, hollow-core fiber, or photonic crystal fiber. In some embodiments, the optical fiber array 226 may be a linear (1D) array. In some other embodiments, the optical fiber array 226 may be a two-dimensional (2D) array. For example, the optical fiber array 226 may include 2 or more optical fibers, 4 or more optical fibers, 10 or more optical fibers, 100 or more optical fibers, 500 or more optical fibers, or 1000 or more optical fibers. Each optical fiber may include, for example, 2 or more cores, or 10 or more cores, wherein each core provides a different optical path. Each optical path may include, for example, multiplexing of 2 or more, 4 or more, 8 or more, or 16 or more serial optical signals, for example, through the use of wavelength division multiplexing channels, polarization multiplexing channels, or coherent orthogonal multiplexing channels. Connector components 213 and 223 are configured to establish an optical path through the first main surface 211_1 of the substrate 211. For example, the fiber optic array 226 may include n1 optical fibers, each fiber may include n2 cores, and connector components 213 and 223 may establish an n1×n2 optical path through the first main surface 211_1 of the substrate 211. Each optical path may include the multiplexing of n3 serial optical signals, resulting in a total of n1×n2×n3 serial optical signals passing through connector components 213 and 223. In some embodiments, connector components 213 and 223 may be implemented, for example, as disclosed in U.S. Patent Application 16 / 816,171.

[0061] In some embodiments, the integrated optical communication device 210 further includes a photonic integrated circuit 214 having a first main surface 214_1 and a second main surface 214_2. The photonic integrated circuit 214 is optically coupled to a connector component 213 via its first main surface 214_1, for example, as disclosed in U.S. Patent Application 16 / 816,171. For example, the connector component 213 may be configured to optically couple light to the photonic integrated circuit 214 using an optical coupling interface (e.g., a vertical grating coupler or a steering mirror). In the example above, a total of n1×n2×n3 serial optical signals can be coupled to the photonic integrated circuit 214 via connector components 213 and 223. Each serial optical signal is converted into a serial electrical signal by the photonic integrated circuit 214, and each serial electrical signal is transmitted from the photonic integrated circuit 214 to a deserializer unit or a serializer / deserializer unit, as described below.

[0062] In some embodiments, connector component 213 may be mechanically connected (e.g., glued) to photonic integrated circuit 214. Photonic integrated circuit 214 may include activated and / or passive optical and / or optoelectronic components, including optical modulators, optical detectors, optical phase splitters, optical power splitters, optical wavelength splitters, optical polarization splitters, filters, optical waveguides, or lasers. In some embodiments, photonic integrated circuit 214 may also include monolithically integrated activated or passive electronic components, such as resistors, capacitors, inductors, heaters, or transistors.

[0063] In some embodiments, the integrated optical communication device 210 further includes an electronic communication integrated circuit 215 configured to facilitate communication between the fiber optic 226 array and the electronic processor integrated circuit 240. A first main surface 215_1 of the electronic communication integrated circuit 215 is, for example, electrically coupled to a second main surface 214_2 of the photonic integrated circuit 214 via solder bumps, copper pillars, etc. The first main surface 215_1 of the electronic communication integrated circuit 215 is further electrically connected to a second main surface 211_2 of the substrate 211 via an array of electrical contacts 212_2. In some embodiments, the electronic communication integrated circuit 215 may include an electrically preamplifier and / or an electrically driven amplifier (see also Figure 14) electrically coupled to a photodetector and a modulator within the photonic integrated circuit 214, respectively. In some embodiments, the electronic communication integrated circuit 215 may include: a first serializer / deserializer (SerDes) array 216 (also referred to as a serializer / deserializer module) whose serial inputs / outputs are electrically connected to the photodetector and modulator of the photonic integrated circuit 214; and a second serializer / deserializer array 217 whose serial inputs / outputs are electrically coupled to electrical contacts 212_1 via substrate 211. Parallel inputs of the serializer / deserializer array 216 may be connected to parallel outputs of the serializer / deserializer array 217 via a bus processing unit 218, and vice versa. The bus processing unit 218 may be, for example, a parallel bus of channels, a cross-connection device, or a remapping device (gearbox). For example, the bus processing unit 218 may be configured to enable signal switching, thereby allowing remapping of signal routing. For example, an Nx50Gbps channel may be remapped to an N / 2x100Gbps channel, where N is a positive even number. An example of bus processing unit 218 is shown in Figure 40A.

[0064] For example, the electronic communication integrated circuit 215 includes: a first serializer / deserializer module comprising multiple serializer units and multiple deserializer units, and a second serializer / deserializer module comprising multiple serializer units and multiple deserializer units. The first serializer / deserializer module includes a first serializer / deserializer array 216. The second serializer / deserializer module includes a second serializer / deserializer array 217.

[0065] In some embodiments, the first and second serializer / deserializer modules have hard-linked functional units, such that which units function as serializers and which units function as deserializers are fixed. In some embodiments, the functional units may be configurable. For example, the first serializer / deserializer module can operate as a serializer unit when it receives a first control signal and as a deserializer unit when it receives a second control signal. Similarly, the second serializer / deserializer module can operate as a serializer unit when it receives a first control signal and as a deserializer unit when it receives a second control signal.

[0066] Signals can be transmitted between optical fiber 226 and electronic processor integrated circuit 240. For example, signals can be transmitted from optical fiber 226 to photonic integrated circuit 214, first serializer / deserializer array 216, second serializer / deserializer array 217, and electronic processor integrated circuit 240. Similarly, signals can be transmitted from electronic processor integrated circuit 240 to second serializer / deserializer array 217, first serializer / deserializer array 216, photonic integrated circuit 214, and optical fiber 226.

[0067] In some embodiments, the electronic communication integrated circuit 215 is implemented as a first integrated circuit and a second integrated circuit electrically coupled to each other. For example, the first integrated circuit includes a serializer / deserializer array 216, and the second integrated circuit includes a serializer / deserializer array 217.

[0068] In some embodiments, the integrated optical communication device 210 is configured to receive optical signals from the fiber optic array 226, generate electrical signals based on the optical signals, and transmit the electrical signals to the electronic processor integrated circuit 240 for processing. In some examples, signals can also flow from the electronic processor integrated circuit 240 to the integrated optical communication device 210. For example, the electronic processor integrated circuit 240 can transmit electronic signals to the integrated optical communication device 210, which generates optical signals based on the received electrical signals and transmits the optical signals to the fiber optic array 226.

[0069] In some implementations, the photodetector of photonic integrated circuit 214 converts the optical signal transmitted in optical fiber 226 into an electrical signal. In some examples, photonic integrated circuit 214 may include a transimpedance amplifier for amplifying the current generated by the photodetector, and a driver for driving output circuitry (e.g., driving an optical modulator). In some examples, the transimpedance amplifier and driver are integrated with electronic communication integrated circuit 215. For example, the optical signal in each optical fiber 226 may be converted into one or more serial electrical signals. For example, a single optical fiber may carry multiple signals using wavelength division multiplexing. The optical signals (and serial electrical signals) may have high data rates, such as 50 Gbps, 100 Gbps, or higher. The first serializer / deserializer module 216 converts the serial electrical signals into a group of parallel electrical signals. For example, each serial electrical signal may be converted into a group of N parallel electrical signals, where N may be, for example, 2, 4, 8, 16, or more. The first serializer / deserializer module 216 modulates the serial electrical signal when converting it into a set of parallel electrical signals. This signal modulation may include, for example, clock and data recovery, and signal equalization, or one or more of these. The first serializer / deserializer module 216 sends the set of parallel electrical signals to the second serializer / deserializer module 217 via the bus processing unit 218. The second serializer / deserializer module 217 converts the set of parallel electrical signals into high-speed serial electrical signals, which are output to electrical contacts 212_2 and 212_1.

[0070] The serializer / deserializer modules (e.g., 216, 217) can perform functions such as fixed or adaptive signal predistortion on the serial signal. Furthermore, the parallel-to-serial mapping can use a serialization factor M different from N; for example, 50 Gbps at the input of the first serializer / deserializer module 216 can be converted to 50 x 1 Gbps on the parallel bus, and two such parallel buses from two serializer / deserializer modules 216 with a total of 100 x 1 Gbps can be mapped to a single 100 Gbps serial signal by the serializer / deserializer module 217. An example of a bus processing unit 218 for performing this mapping is shown in Figure 40B. Additionally, the high-speed modulation on the serial side can differ; for example, the serializer / deserializer module 216 can use 50 Gbps non-return-to-zero (NRZ) modulation, while the serializer / deserializer module 217 can use 100 Gbps pulse-amplitude modulation level 4 (PAM4) modulation. In some implementations, encoding (line encoding or error correction encoding) can be performed at bus processing unit 218. The first and second serializer / deserializer modules 216 and 217 can be commercially available high-quality, low-power serializers / deserializers, which can be purchased in bulk at a low cost.

[0071] In some embodiments, the package substrate 230 may include a connector on its bottom side that connects the package substrate 230 to another circuit board, such as a motherboard. This connection may be, for example, fixed (e.g., by using a solder joint) or detachable (e.g., by using one or more snap-fit ​​or screw-in mechanisms). In some examples, another substrate may be provided between the electronic processor integrated circuit 240 and the package substrate 230.

[0072] As shown in Figure 4, in some embodiments, the data processing system 250 includes an integrated optical communication device 252 (also referred to as an optical interconnect module), a fiber optic connector assembly 220, a packaging substrate 230, and an electronic processor integrated circuit 240. The data processing system 250 can be used, for example, to implement one or more of the devices 101_1 to 101_6 of Figure 1. The integrated optical communication device 252 is used to receive optical signals, generate electrical signals based on the optical signals, and transmit the electrical signals to the electronic processor integrated circuit 240 for processing. In some examples, signals can also flow from the electronic processor integrated circuit 240 to the integrated optical communication device 252. For example, the electronic processor integrated circuit 240 can transmit electronic signals to the integrated optical communication device 252, which generates optical signals based on the received electrical signals and transmits the optical signals to the fiber optic array 226.

[0073] System 250 is similar to data processing system 200 in Figure 2, except that in system 250, a portion 254 of the top surface of photonic integrated circuit 214 is not covered by the first serializer / deserializer module 216 and the second serializer / deserializer module 217 in the cross-sectional direction of the figure. For example, portion 254 can be used to couple to other electronic, optical, or electro-optical components from the bottom (as shown in Figure 4) or from the top (as shown in Figure 6). In some examples, the first serializer / deserializer module 216 may have high temperatures during operation. The portion 254, not being covered by the first serializer / deserializer module 216, can be less thermally coupled to it. In some examples, photonic integrated circuit 214 may include a modulator that changes the refractive index of the waveguide by modifying the temperature of the phase waveguide that modulates the optical signal. In such a device, using the design shown in the example of Figure 4 allows the modulator to operate in a more thermally stable environment.

[0074] Figure 5 shows an enlarged cross-sectional view of the integrated optical communication device 252. In some embodiments, substrate 211 includes a first plate 256 and a second plate 258. The first plate 256 provides a power connector to fan out electrical contacts, and the second plate 258 provides a detachable connection to package substrate 230. The first plate 256 includes a first set of contacts disposed on a top surface and a second set of contacts disposed on a bottom surface, wherein the first set of contacts has a fine pitch and the second set of contacts has a coarse pitch. The minimum distance between contacts in the second set of contacts is greater than the minimum distance between contacts in the first set of contacts. The second plate 258 may include, for example, spring-loaded contacts 259.

[0075] As shown in Figure 6, in some embodiments, the data processing system 260 includes an integrated optical communication device 262 (also referred to as an optical interconnect module), a fiber optic connector assembly 270, a packaging substrate 230, and an electronic processor integrated circuit 240. The data processing system 260 can be used, for example, to implement one or more of the devices 101_1 to 101_6 of Figure 1. The integrated optical communication device 262 includes a photonic integrated circuit 264. The photonic integrated circuit 264 may include components that perform functions similar to those of the photonic integrated circuit 214 of Figures 2-5. The integrated optical communication device 262 also includes a first optical connector component 266 configured to receive a second optical connector component 268 of the fiber optic connector assembly 270. For example, snap-fit ​​or screw-in mechanisms can be used to hold the first and second optical connector components 266 and 268 together.

[0076] Connector components 266 and 268 may be similar to connector components 213 and 223 of Figure 4, respectively. In some examples, optical connector component 268 is attached to an array of optical fibers 272, which may be similar to optical fiber 226 of Figure 4.

[0077] Photonic integrated circuit 264 has a top main surface and a bottom main surface. The terms "top" and "bottom" refer to the orientation shown in the figures. It is understood that the device described herein can be positioned in any orientation; for example, the "top surface" of the device can face down or sideways, and the "bottom surface" of the device can face up or sideways. The difference between photonic integrated circuit 264 and photonic integrated circuit 214 (Figure 4) is that photonic integrated circuit 264 is optically coupled to connector component 268 through the top main surface, while photonic integrated circuit 214 is optically coupled to connector component 268 through the bottom main surface. For example, connector component 266 can be configured to couple light to photonic integrated circuit 214 using an optical coupling interface such as a vertical grating coupler or a steering mirror, in a manner similar to how connector component 213 optically couples light to photonic integrated circuit 214.

[0078] The integrated optical communication devices 252 (Figure 4) and 262 (Figure 6) provide flexibility in the design of data processing systems, allowing the fiber optic connector assembly 220 or 270 to be positioned on either side of the packaging substrate 230.

[0079] As shown in Figure 7, in some embodiments, the data processing system 280 includes an integrated optical communication device 282 (also referred to as an optical interconnect module), a fiber optic connector assembly 270, a packaging substrate 230, and an electronic processor integrated circuit 240. The data processing system 280 can be used, for example, to implement one or more of the devices 101_1 to 101_6 of Figure 1.

[0080] The integrated optical communication device 282 includes a photonic integrated circuit 284, a circuit board 286, a first serializer / deserializer module 216, a second serializer / deserializer module 217, and a control circuit 287. The photonic integrated circuit 284 may include elements performing functions similar to those of photonic integrated circuits 214 (Figures 2-5) and 264 (Figure 6). The control circuit 287 controls the operation of the photonic integrated circuit 284. For example, the control circuit 287 may statically or adaptively control one or more photodetectors and / or modulator bias voltages, heater voltages, etc., based on one or more sensor voltages received by the control circuit 287 from the photonic integrated circuit 284. The integrated optical communication device 282 also includes a first optical connector component 288 configured to receive a second optical connector component 268 from an optical fiber connector assembly 270. The optical connector component 268 is attached to an array of optical fibers 272.

[0081] Circuit board 286 has a top main surface 290 and a bottom main surface 292. Photonic integrated circuit 284 has a top main surface 294 and a bottom main surface 296. First and second serializer / deserializer modules 216, 217 are mounted on the top main surface 290 of circuit board 286. The top main surface 294 of photonic integrated circuit 284 has electrical terminals electrically connected to corresponding electrical terminals on the bottom main surface 292 of circuit board 286. In this example, photonic integrated circuit 284 is mounted on one side of circuit board 286, opposite the side of circuit board 286 on which the first and second serializer / deserializer modules 216, 217 are mounted. Photonic integrated circuit 284 is electrically coupled to the first serializer / deserializer 216 through an electrical connector 300 passing through circuit board 286 in the thickness direction. In some embodiments, the electrical connector 300 may be implemented as a through-hole.

[0082] The connector component 288 is sized such that the fiber optic connector assembly 270 can be coupled to the connector component 288 without interfering with other components of the integrated optical communication device 282. The connector component 288 can be configured to couple light to the photonic integrated circuit 284 using an optical coupling interface such as a vertical grating coupler or a steering mirror, in a manner similar to how connector components 213 or 266 couple light to photonic integrated circuits 214 or 264, respectively.

[0083] When the integrated optical communication device 282 is coupled to the packaging substrate 230, the photonic integrated circuit 284 and the control circuit 287 are located between the circuit board 286 and the packaging substrate 230. The integrated optical communication device 282 includes a contact array 298 disposed on the bottom main surface 292 of the circuit board 286. The contact array 298 is configured such that after the circuit board 286 is coupled to the packaging substrate 230, the contact array 298 maintains a thickness d3 between the circuit board 286 and the packaging substrate 230, wherein the thickness d3 is slightly greater than the thickness of the photonic integrated circuit 284 and the control circuit 287.

[0084] Figure 8 is an exploded perspective view of the integrated optical communication device 282 in Figure 7. The photonic integrated circuit 284 includes an array of optical coupling components 310, such as a vertical grating coupler or steering mirror disclosed in U.S. Patent Application 16 / 816,171, configured to optically couple light from optical connector component 288 to the photonic integrated circuit 214. The optical coupling components 310 are densely packed and have fine spacing, allowing optical signals from a plurality of optical fibers to be coupled to the photonic integrated circuit 284. For example, the minimum distance between adjacent optical coupling components 310 can be as small as, for example, 5µm, 10µm, 50µm, or 100µm.

[0085] An array of electrical terminals 312 disposed on the top main surface 294 of the photonic integrated circuit 284 is electrically coupled to an array of electrical terminals 314 disposed on the bottom main surface 292 of the circuit board 286. The electrical terminal arrays 312 and 314 have a fine pitch, wherein the minimum distance between two adjacent electrical terminals can be as small as, for example, 10 μm, 40 μm, or 100 μm. An array of electrical terminals 316 disposed on the bottom main surface of the first serializer / deserializer 216 is electrically coupled to an array of electrical terminals 318 disposed on the top main surface 290 of the circuit board 286. An array of electrical terminals 320 is disposed on the top main surface 290 of the circuit board 286. An array of electrical terminals 322 disposed on the bottom main surface of the second serializer / deserializer module 217 is electrically coupled to an array of electrical terminals 322 disposed on the top main surface 290 of the circuit board 286.

[0086] For example, terminal arrays 312, 314, 316, 318, 320, and 322 have a fine pitch (or several fine pitches). For simplicity, in the example of Figure 8, for each terminal array 312, 314, 316, 318, 320, and 322, the minimum distance between adjacent terminals is d2, which can range from, for example, 10 μm to 200 μm. In some examples, the minimum distance between adjacent terminals can be different for different terminal arrays. For example, the minimum distance between adjacent terminals of terminal array 314 (which is disposed on the bottom surface of circuit board 286) can be different from the minimum distance between adjacent terminals of terminal array 318 disposed on the top surface of circuit board 286. The minimum distance between adjacent terminals of terminal array 316 of the first serializer / deserializer 216 can be different from the minimum distance between adjacent terminals of terminal array 320 of the second serializer / deserializer module 217.

[0087] An array of electrical terminals 324 disposed on the bottom main surface of circuit board 286 is electrically coupled to contact array 298. The electrical terminal array 324 may have a coarse pitch. For example, the minimum distance between adjacent electrical terminals is d1, which may be in the range of, for example, 200 μm to 1 mm. Contact array 298 may be configured as a module that, after the integrated optical communication device 282 is coupled to the packaging substrate 230, maintains a distance between the integrated optical communication device 282 and the packaging substrate 230 slightly greater than the thickness of the photonic integrated circuit 284 and the control circuit 287 (not shown in Figure 8). Contact array 298 may include, for example, a substrate with an embedded spring-loaded connector.

[0088] Figure 9 is an example layout design of the optical and electrical terminals of the integrated optical communication device 282 shown in Figures 7 and 8. Figure 9 illustrates the layout of the optical and electrical terminals when viewed from the top or bottom side of the device 282. In this example, the photonic integrated circuit 284 has a width of approximately 5 mm and a length of approximately 2.2 mm to 18 mm. For the example where the length of the photonic integrated circuit 284 is approximately 2.2 mm, the optical signal provided to the photonic integrated circuit 284 can have a total bandwidth of approximately 1.6 Tbps. For the example where the length of the photonic integrated circuit is approximately 18 mm, the optical signal provided to the photonic integrated circuit can have a total bandwidth of approximately 12.8 Tbps. The width of the integrated optical communication device 282 can be approximately 8 mm.

[0089] An array 330 of optical coupling components 310 is provided to allow optical signals to be provided in parallel to photonic integrated circuit 284. A first serializer / deserializer 216 includes an array 332 of electrical terminals 316 disposed on the bottom surface of the first serializer / deserializer 216. A second serializer / deserializer module 217 includes an array 334 of electrical terminals 320 disposed on the bottom surface of the second serializer / deserializer module 217. The arrays 332 and 334 of electrical terminals 316 and 320 have fine pitch, and the minimum distance between adjacent terminals can be, for example, in the range of 40 μm to 200 μm. An array 336 of electrical terminals 324 is disposed on the bottom main surface of circuit board 286. The array 336 of electrical terminals 324 has coarse pitch, and the minimum distance between adjacent terminals can be, for example, in the range of 200 μm to 1 mm. For example, the array 336 of electrical terminals 324 may be part of a compression insert having a pitch of approximately 400 μm between terminals.

[0090] Figure 10 is a diagram illustrating an example layout design of the optical and electrical terminals of the integrated optical communication device 210 in Figure 2. Figure 10 shows the layout of the optical and electrical terminals when viewed from the top or bottom side of the device 210. In this embodiment, the photonic integrated circuit 214 is implemented as a single chip. In some embodiments, the photonic integrated circuit 214 may be tiled across multiple chips. Similarly, in this embodiment, the electronic communication integrated circuit 215 is implemented as a single chip. In some embodiments, the electronic communication integrated circuit 215 may be tiled across multiple chips. In this embodiment, the electronic communication integrated circuit 215 is implemented as 16 serializer / deserializer blocks 216_1 to 216_16 electrically connected to the photonic integrated circuit 214 and 16 serializer / deserializer blocks 217_1 to 217_16, which are electrically connected to the contact array 212_1 via electrical connectors passing through the substrate 211 in the thickness direction. The 16 serializer / deserializer blocks 216_1 to 216_16 are electrically coupled to the 16 serializer / deserializer blocks 217_1 to 217_16 through bus processing units 218_1 to 218_16, respectively. In this embodiment, each serializer / deserializer block (216 or 217) is implemented using 8 serial differential transmitters (TX) and 8 serial differential receivers (RX). To transmit electrical signals from the serializer / deserializer block 217 to the ASIC 240, a total of 8x16x2=256 differential signal contacts 212_1 can be used, in addition to the 8x17x2=272 ground (GND) contacts 212_1. As those skilled in the art will understand, other contact arrangements that advantageously reduce crosstalk can also be used, for example, placing a ground contact between each pair of TX and RX contacts. The transmitter contacts are collectively referred to as 340, the receiver contacts as 342, and the ground contacts as 344.

[0091] The electrical contacts of serializer / deserializer blocks 216_1 to 216_12 and 217_1 to 217_12 have fine pitch, and the minimum distance between adjacent terminals can be in the range of, for example, 40 μm to 200 μm. Electrical contact 212_1 has coarse pitch, and the minimum distance between adjacent terminals can be in the range of, for example, 200 μm to 1 mm.

[0092] Figure 11 is a schematic side view of an example data processing system 350, which includes an integrated optical communication device 374, a package substrate 230, and a host-specific application integrated circuit 240. The integrated optical communication device 374 is mounted on the top surface of the package substrate 230. The integrated optical communication device 374 includes a first optical connector 356 that allows optical signals transmitted in an optical fiber to be coupled to the integrated optical communication device 374, wherein a portion of the optical fiber connected to the first optical connector 356 is located in a region facing the bottom side of the package substrate 230.

[0093] The integrated optical communication device 374 includes a combination of photonic integrated circuitry 352, a driver and transimpedance amplifier (D / T) 354, a first serializer / deserializer module 216, a second serializer / deserializer module 217, a first optical connector 356, a control module 358, and a substrate 360. The host-specific application integrated circuitry 240 includes an embedded third serializer / deserializer module 247.

[0094] In this example, the photonic integrated circuit 352, driver and transimpedance amplifier 354, first serializer / deserializer module 216, and second serializer / deserializer module 217 are mounted on the top side of the substrate 360. In some embodiments, the driver and transimpedance amplifier 354, the first serializer / deserializer module 216, and the second serializer / deserializer module 217 can be monolithically integrated into a single electronic chip. A first optical connector 356 is optically coupled to the bottom side of the photonic integrated circuit 352. A control module 358 is electrically coupled to electrical terminals disposed on the bottom side of the substrate 360, while the photonic integrated circuit 352 is connected to the electrical terminals. The control module 358 is disposed on the top side of the substrate 360. The control module 358 is electrically coupled to the photonic integrated circuit 352 through an electrical connector 362 that passes through the substrate 360 ​​in the thickness direction. In some embodiments, the substrate 360 ​​can be detachably connected to the package substrate 230, for example, using a compression inserter or a planar grid array.

[0095] Photonic integrated circuit 352 is electrically coupled to driver and transimpedance amplifier 354 via electrical connector 364 on or in substrate 360. Driver and transimpedance amplifier 354 are electrically coupled to first serializer / deserializer module 216 via electrical connector 366 on or in substrate 360. Second serializer / deserializer module 216 has electrical terminals 370 on its bottom side, which are electrically coupled to electrical terminals 366 disposed on the bottom side of substrate 360 ​​via electrical connector 368, which passes through substrate 360 ​​in the thickness direction. Electrical terminals 370 have fine pitch, while electrical terminals 366 have coarse pitch. Electrical terminals 366 are electrically coupled to third serializer / deserializer module 247 via electrical connectors or traces 372 on or in packaging substrate 230.

[0096] In some implementations, the optical signal is converted into an electrical signal by the photonic integrated circuit 352, the electrical signal is modulated by the first serializer / deserializer module 216 (or the second serializer / deserializer module 217), and processed by the host-specific application integrated circuit 240. The host-specific application integrated circuit 240 generates the electrical signal converted into the optical signal by the photonic integrated circuit 352.

[0097] Figure 12 is a schematic side view of an example data processing system 380, which includes an integrated optical communication device 382, ​​a package substrate 230, and host-specific application integrated circuitry 240. The integrated optical communication device 382 is similar to the integrated optical communication device 374 (Figure 11), except that the transimpedance amplifier and driver are implemented in a separate chip 384 from the chips housing the serializer / deserializer modules 216 and 217.

[0098] Figure 13 is a schematic side view of an example data processing system 390, which includes an integrated optical communication device 402, a package substrate 230, and host-specific application integrated circuitry (not shown). The integrated optical communication device 402 includes a photonic integrated circuit 392, a first serializer / deserializer module 394, a second serializer / deserializer module 396, a third serializer / deserializer module 398, and a fourth serializer / deserializer module 400, all mounted on a substrate 410. The photonic integrated circuit 392 may include a transimpedance amplifier and a driver, or such an amplifier and / or driver may be included in the serializer / deserializer modules 394 and 398. The first serializer / deserializer module 394 and the second serializer / deserializer module 396 are located to the right of the photonic integrated circuit 392. The third serializer / deserializer module 398 and the fourth serializer / deserializer module 400 are located to the left of the photonic integrated circuit 392. Here, the terms "left" and "right" refer to the relative positions shown in the figure. It can be understood that system 390 can be positioned in any orientation, such that the first serializer / deserializer module 394 and the second serializer / deserializer module 396 are not necessarily to the right of photonic integrated circuit 392, and the third serializer / deserializer module 392, module 398, and the fourth serializer / deserializer module 400 are not necessarily to the left of photonic integrated circuit 392.

[0099] The photonic integrated circuit 392 receives an optical signal from the first optical connector 404, generates a serial electrical signal based on the optical signal, and sends the serial electrical signal to the first and second serializer / deserializer modules 394 and 398. The first and second serializer / deserializer modules 394 and 398 generate parallel electrical signals based on the received serial electrical signals and send the parallel electrical signals to the third and fourth serializer / deserializer modules 396 and 400, respectively. The third and fourth serializer / deserializer modules 396 and 400 generate serial electrical signals based on the received parallel electrical signals and send the serial electrical signals to the electrical terminals 406 and 408 arranged on the bottom side of the substrate 410, respectively.

[0100] The first optical connector 404 is optically coupled to the bottom side of the photonic integrated circuit 392. In some embodiments, the optical connector 404 may also be placed on top of the photonic integrated circuit 392 and optically coupled to the top side of the photonic integrated circuit 392 (not shown). The first optical connector 404 is optically coupled to a second optical connector, which in turn is optically coupled to a plurality of optical fibers. As shown in FIG13, the first optical connector 404, the second optical connector, and / or the optical fibers pass through an opening 412 in the encapsulation substrate 230. An electrical terminal 406 is arranged to the right of the first optical connector 404, and an electrical terminal 408 is arranged to the left of the first optical connector 404. The electrical terminals 406 and 408 are configured such that the substrate 410 can be detachably coupled to the encapsulation substrate 230.

[0101] Figure 14 is a schematic side view of an example data processing system 420, which includes an integrated optical communication device 428, a package substrate 230, and host-specific application integrated circuitry (not shown). The integrated optical communication device 428 includes a photonic integrated circuit 422 (excluding transimpedance amplifiers and drivers), a first serializer / deserializer module 394, a second serializer / deserializer module 396, a third serializer / deserializer module 398, and a fourth serializer / deserializer module 400, all mounted on a substrate 410. The integrated optical communication device 428 includes a first set of transimpedance amplifier and driver circuitry 424 located to the right of the photonic integrated circuit 422, and a second set of transimpedance amplifier and driver circuitry 426 located to the left of the photonic integrated circuit 422. The first set of transimpedance amplifier and driver circuitry 424 is located between the photonic integrated circuit 422 and the first serializer / deserializer module 394. The second set of transimpedance amplifier and driver circuits 424 is located between the photonic integrated circuit 422 and the third serializer / deserializer module 398.

[0102] In some implementations, the integrated optical communication device 402 (or 408) may be modified such that the first optical connector 404 couples the optical signal to the top side of the photonic integrated circuit 392 (or 422).

[0103] Figure 32 is a schematic side view of an example data processing system 510, which includes an integrated optical communication device 512, a package substrate 230, and host-specific application integrated circuitry (not shown). The integrated optical communication device 512 includes a substrate 514, which includes a first plate 516 and a second plate 518. The first plate 516 provides a power connector to fan out electrical contacts. The first plate 516 includes a first set of contacts disposed on a top surface and a second set of contacts disposed on a bottom surface, wherein the first set of contacts has a fine pitch and the second set of contacts has a coarse pitch. The second plate 518 provides a detachable connection to the package substrate 230. A photonic integrated circuitry 524 is mounted on the bottom side of the first plate 516. A first optical connector 520 passes through an opening in the substrate 514 and couples an optical signal to the top surface of the photonic integrated circuitry 524.

[0104] First serializer / deserializer module 394, second serializer / deserializer module 396, third serializer / deserializer module 398, and fourth serializer / deserializer module 400 are mounted on the top side of first board 516. Photonic integrated circuit 524 is electrically coupled to the first and third serializer / deserializer modules 394 and 398 via electrical connectors 522 passing through the substrate 514 in the thickness direction. For example, electrical connector 522 can be implemented as a through-hole. In some examples, drivers and transimpedance amplifiers can be integrated into photonic integrated circuit 524, or into serializer / deserializer modules 394 and 398. In some examples, drivers and transimpedance amplifiers can be implemented in a separate chip (not shown) located between photonic integrated circuit 524 and serializer / deserializer modules 394 and 398, similar to the example in Figure 14. A control chip (not shown) can be provided to control the operation of photonic integrated circuit 512.

[0105] Figure 15 is a bottom view of an example of the integrated optical communication device 428 in Figure 14. The photonic integrated circuit 422 includes modulators and photodetector blocks on either side of the centerline 432 in the longitudinal direction. The photonic integrated circuit 422 includes an optical fiber coupling region 430 disposed on the bottom side of the photonic integrated circuit 392 or on the top side of the photonic integrated circuit (see Figure 32), wherein the optical fiber coupling region 430 includes a plurality of optical coupling elements 310, such as receiver optical coupling elements (RX), transmitter optical coupling elements (TX), and remote optical power supply (e.g., 103 in Figure 1) optical coupling elements (PS).

[0106] Complementary metal-oxide-semiconductor (CMOS) transimpedance amplifier (TIA) and driver block 424 are arranged to the right of photonic integrated circuit 424, and CMOS transimpedance amplifier and driver block 426 are arranged to the left of photonic integrated circuit 424. First serializer / deserializer module 394 and second serializer / deserializer module 396 are arranged to the right of CMOS transimpedance amplifier and driver block 424. Third serializer / deserializer module 398 and fourth serializer / deserializer module 400 are arranged to the left of CMOS transimpedance amplifier and driver block 426.

[0107] In this example, each of the first, second, third, and fourth serializer / deserializer modules 394, 396, 398, and 400 includes eight serial differential transmitter blocks and eight serial differential receiver blocks. The integrated optical communication device 428 has a width of approximately 3.5 mm and a length slightly greater than approximately 3.6 mm.

[0108] Figure 16 is a bottom view of an example of the integrated optical communication device 428 in Figure 14, which also shows electrical terminals 406 and 408. As shown, electrical terminals 406 and 408 have a coarse pitch, and the minimum distance between terminals in the array of electrical terminals 406 or 408 is much greater than the minimum distance between terminals in the electrical terminal arrays of the first, second, third, and fourth serializer / deserializer modules 394, 396, 398, and 400. For example, the array of electrical terminals 406 and 408 may be part of a compression inserter with a spacing of approximately 400 μm between terminals.

[0109] In some implementations, the electrical terminals (e.g., 406 and 408) can be arranged as shown in Figure 66. Figure 66 shows pad diagram 1020, which illustrates the location of various contact pads as viewed from the bottom of the package. The contact pads occupy an area of ​​approximately 9.8 mm × 9.8 mm, using pads with a 400 µm pitch.

[0110] The middle rectangle 1022 is a cutout connecting the photonic integrated circuitry to the optical device exiting from the top of the module. The larger rectangle 1024 represents the photonic integrated circuitry. The two gray rectangles 1026a and 1026b represent circuitry in the serializer / deserializer chip 1028a. The two gray rectangles 1026c and 1026d represent circuitry in another serializer / deserializer chip 1028b. The serializer / deserializer chip is located on top of the package, and the photonic integrated circuitry is located at the bottom of the package. The overlapping design between the photonic integrated circuitry and the serializer / deserializer chips 1028a and 1028b allows vias (not shown) to directly connect these integrated circuits through the package. In some embodiments, the serializer / deserializer chips 1028a and 1028b and / or other electronic integrated circuitry may be placed around three or four sides of the optical connector (represented by rectangle 1022), similar to the example shown in Figures 168 and 170.

[0111] In the examples of the data processing systems shown in Figures 2-8, 11-14, and 32, integrated optical communication devices (e.g., 210, 252, 262, 282, 374, 382, ​​402, 428, 512, which include photonic integrated circuits and serializer / deserializer modules) are mounted on a package substrate 230 on the same side (top side in the example shown) as the electronic processor integrated circuit (or host-specific application integrated circuit) 240. The data processing system can also be modified such that the integrated optical communication devices are mounted on the package substrate 230 on the side opposite to the electronic processor integrated circuit (or host-specific application integrated circuit) 240. For example, the electronic processor integrated circuit 240 may be mounted on the top side of the package substrate 230, while one or more integrated optical communication devices, as disclosed in Figures 2-8, 11-14, and 32, may be mounted on the bottom side of the package substrate 230.

[0112] Figure 17 illustrates four types of integrated optical communication devices that can be used in the data processing system 440. In these examples, the integrated optical communication devices do not include a serializer / deserializer module. At least some signal conditioning is performed by the serializer / deserializer module in the digital application-specific integrated circuit. The integrated optical communication device is mounted on the side of the printed circuit board opposite to the side where the digital application-specific integrated circuit is mounted, thereby allowing connector shorting.

[0113] In a first example, the data processing system includes a digital application-specific integrated circuit 444 mounted on the top side of substrate 442 and an integrated optical communication device 448 mounted on the bottom side of a first circuit board. In some embodiments, the integrated optical communication device 448 includes a photonic integrated circuit 450 and a set of transimpedance amplifiers and drivers 452 mounted on the bottom side of substrate 454 (e.g., a second circuit board). The top side of the photonic integrated circuit 450 is electrically coupled to the bottom side of substrate 454. A first optical connector component 456 is optically coupled to the bottom side of the photonic integrated circuit 450. The first optical connector component 456 is configured to optically couple to a second optical connector component 458, which is optically coupled to multiple optical fibers (not shown). An electrical terminal array 460 is disposed on the top side of substrate 454 and configured to allow the integrated optical communication device 448 to be detachably coupled to substrate 442.

[0114] The optical signal from the optical fiber is processed by a photonic integrated circuit 450, which generates a serial electrical signal based on the optical signal. The serial electrical signal is amplified by a set of transimpedance amplifiers and a driver 452, which drives the output signal, which is sent to a serializer / deserializer module 446 embedded in a digital application-specific integrated circuit 444.

[0115] In the second example, the integrated optical communication device 462 can be mounted on the bottom side of substrate 442 to provide an optical / electrical communication interface between optical fiber and digital application-specific integrated circuit 444. The integrated optical communication device 462 includes photonic integrated circuit 464 mounted on the bottom side of substrate 454 (e.g., a second circuit board). The top surface of photonic integrated circuit 464 is electrically coupled to the bottom surface of substrate 454. A first optical connector component 456 is optically coupled to the bottom surface of photonic integrated circuit 450. An array of electrical terminals 460 is arranged on the top side of substrate 454 and configured to allow the integrated optical communication device 462 to be detachably coupled to substrate 442. The integrated optical communication device 462 is similar to the integrated optical communication device 448, except that the photonic integrated circuit 464 or serializer / deserializer module 446 includes a set of transimpedance amplifiers and driver circuitry. In some examples, the serializer / deserializer module 446 is configured to directly receive electrical signals from the photonic integrated circuit 464, for example, by having a sufficiently high receiver input impedance to convert the photocurrent generated within the photonic integrated circuit 464 into a suitable voltage swing for further electrical processing. For example, the serializer / deserializer module 446 is configured to have a low transmitter output impedance and provide an output voltage swing that allows direct driving of the optical modulator embedded within the photonic integrated circuit 464.

[0116] In a third example, an integrated optical communication device 466 may be mounted on the bottom side of substrate 442 to provide an optical / electrical communication interface between optical fiber and digital application-specific integrated circuit 444. The integrated optical communication device 466 includes a photonic integrated circuit 468 mounted on the top surface of substrate 470 (e.g., a second circuit board). The bottom surface of the photonic integrated circuit 468 is electrically coupled to the top surface of substrate 470. A first optical connector component 456 is optically coupled to the bottom surface of the photonic integrated circuit 468. An array of electrical terminals 460 is arranged on the top side of substrate 470 and configured to allow the integrated optical communication device 466 to be detachably coupled to substrate 442. In some examples, the photonic integrated circuit 468 or serializer / deserializer module 446 includes a set of transimpedance amplifiers and driver circuitry. In some examples, the serializer / deserializer module 446 is configured to directly receive electrical signals originating from the photonic integrated circuit 464.

[0117] In the fourth example, an integrated optical communication device 472 can be mounted on the bottom side of a substrate 442 to provide an optical / electrical communication interface between an optical fiber and a digital application-specific integrated circuit 444. The integrated optical communication device 472 includes a photonic integrated circuit 474 and a set of transimpedance amplifiers and drivers 476, which are mounted on the top surface of a substrate 470 (e.g., a second circuit board). The bottom surface of the photonic integrated circuit 474 is electrically coupled to the top surface of the substrate 470. A first optical connector component 456 is optically coupled to the bottom surface of the photonic integrated circuit 468. An array of electrical terminals 460 is arranged on the top side of the substrate 470 and configured to allow the integrated optical communication device 466 to be detachably coupled to the substrate 442. The integrated optical communication device 472 is similar to the integrated optical communication device 466, except that neither the photonic integrated circuit 464 nor the serializer / deserializer module 446 includes a set of transimpedance amplifier and driver circuitry, and the set of transimpedance amplifiers and drivers 476 is implemented as separate integrated circuits.

[0118] Figure 18 is a diagram of an octal serializer / deserializer block 480, including an example of eight serial differential transmitters (TX) 482 and eight serial differential receivers (RX) 484. Each serial differential receiver 484 receives a serial differential signal, generates a parallel signal based on the serial differential signal, and provides the parallel signal on a parallel bus 488. Each serial differential transmitter 482 receives a parallel signal from the parallel bus 488, generates a serial differential signal based on the parallel signal, and provides the serial differential signal on an output terminal 490. The serializer / deserializer block 480 outputs and / or receives the parallel signal through the parallel bus interface 492.

[0119] In the examples above, such as those shown in Figures 2-14, the integrated optical communication device (e.g., 210, 252, 262, 282, 374, 382, ​​402, 428) includes a first serializer / deserializer module (e.g., 216, 394, 398) and a second serializer / deserializer module (e.g., 217, 396, 400). The first serializer / deserializer module has a serial interface with a photonic integrated circuit, and the second serializer / deserializer module has a serial interface with an electronic processor integrated circuit or a host-specific application integrated circuit (e.g., 240). In some embodiments, the electronic communication integrated circuit 215 includes a serializer / deserializer array, which can be logically divided into a first subarray of serializers / deserializers and a second subarray of serializers / deserializers. The first subarray of the serializer / deserializer corresponds to the serializer / deserializer module (e.g., 216, 394, 398), while the second subarray of the serializer / deserializer corresponds to the second serializer / deserializer module (e.g., 217, 396, 400).

[0120] Figure 38 is a diagram of an example octal serializer / deserializer block 480 coupled to bus processing unit 218. Octal serializer / deserializer block 480 includes eight serial differential transmitters (TX1 to TX8) 482 and eight serial differential receivers (RX1 to RX4) 484. In some embodiments, the transmitters and receivers are partitioned such that transmitters TX1, TX2, TX3, TX4 and receivers RX1, RX2, RX3, RX4 form a first serializer / deserializer module 840, and transmitters TX5, TX6, TX7, TX8 and receivers RX5, RX6, RX7, RX8 form a second serializer / deserializer module 842. Serial electrical signals received at receivers RX1, RX2, RX3, RX4 are converted into parallel electrical signals and routed by bus processing unit 218 to transmitters TX5, TX6, TX7, TX8, converting the parallel electrical signals into serial electrical signals. For example, photonic integrated circuits can send serial electrical signals to receivers RX1, RX2, RX3, and RX4, while transmitters TX5, TX6, TX7, and TX8 can send serial electrical signals to electronic processor integrated circuits or host application-specific integrated circuits.

[0121] For example, bus processing unit 218 can remap signal lanes and encode the signals so that the bit rate and / or modulation format of the serial signals output from transmitters TX5, TX6, TX7, and TX8 can be different from the bit rate and / or modulation format of the serial signals received at receivers RX1, RX2, RX3, and RX4. For example, the four T Gbps NRZ serial signal channels received by receivers RX1, RX2, RX3, and RX4 can be recoded and routed to transmitters TX5 and TX6 to output two 2×T ​​Gbps PAM4 serial signal channels.

[0122] Similarly, the serial electrical signals received at receivers RX5, RX6, RX7, and RX8 are converted into parallel electrical signals and routed by bus processing unit 218 to transmitters TX1, TX2, TX3, and TX4, which convert the parallel electrical signals back into serial electrical signals. For example, an electronic processor integrated circuit or a host-specific application integrated circuit can transmit serial electrical signals to receivers RX5, RX6, RX7, and RX8, and transmitters TX1, TX2, TX3, and TX4 can transmit serial electrical signals to photonic integrated circuits.

[0123] For example, bus processing unit 218 can remap signal lanes and encode the signals so that the bit rate and / or modulation format of the serial signals output from transmitters TX1, TX2, TX3, and TX4 can be different from the bit rate and / or modulation format of the serial signals received at receivers RX5, RX6, RX7, and RX8. For example, the two 2×T ​​Gbps PAM4 serial signal channels received by receivers RX5 and RX6 can be recoded and routed to transmitters TX5, TX6, TX7, and TX8 to output four T Gbps NRZ serial signal channels.

[0124] Figure 39 is a diagram of another example octal serializer / deserializer block 480 coupled to bus processing unit 218, wherein transmitters and receivers are configured such that transmitters TX1, TX2, TX5, TX6 and receivers RX1, RX2, RX5, RX6 form a first serializer / deserializer module 850, and transmitters TX3, TX4, TX7, TX8 and receivers RX3, RX4, RX7, RX8 form a second serializer / deserializer module 852. Serial electrical signals received at receivers RX1, RX2, RX5, RX6 are converted into parallel electrical signals and routed by bus processing unit 218 to transmitters TX3, TX4, TX7, TX8, which convert the parallel electrical signals into serial electrical signals. For example, photonic integrated circuits can send serial electrical signals to receivers RX1, RX2, RX5, and RX6, while transmitters TX3, TX4, TX7, and TX8 can send serial electrical signals to electronic processor integrated circuits or host application-specific integrated circuits.

[0125] Similarly, the serial electrical signals received at receivers RX3, RX4, RX7, and RX8 are converted into parallel electrical signals and routed by bus processing unit 218 to transmitters TX1, TX2, TX5, and TX6, which convert the parallel electrical signals back into serial electrical signals. For example, an electronic processor integrated circuit or a host-specific application integrated circuit can transmit serial electrical signals to receivers RX3, RX4, RX7, and RX8, while transmitters TX1, TX2, TX5, and TX6 can transmit serial electrical signals to photonic integrated circuits.

[0126] In some implementations, bus processing unit 218 can remap signal channels and encode signals such that the bit rate and / or modulation format of the serial signals output from transmitters TX3, TX4, TX7, and TX8 can be different from the bit rate and / or modulation format of the serial signals received by receivers RX1, RX2, RX5, and RX6. Similarly, bus processing unit 218 can remap signal channels and encode signals such that the bit rate and / or modulation format of the serial signals output from transmitters TX1, TX2, TX5, and TX6 can be different from the bit rate and / or modulation format of the serial signals received by receivers RX4, RX5, and RX6.

[0127] Figures 38 and 39 illustrate two examples of how the receiver and transmitter can be partitioned to form a first serializer / deserializer module and a second serializer / deserializer module. The partitioning can be arbitrarily determined according to the application and is not limited to the examples shown in Figures 38 and 39. The partitioning can be programmable and can be dynamically changed by the system.

[0128] Figure 19 is a diagram of an example electronic communication integrated circuit 480 including a first octal serializer / deserializer block 482 electrically coupled to a second octal serializer / deserializer block 484. For example, the electronic communication integrated circuit 480 can be used as the electronic communication integrated circuit 215 of Figures 2 and 3. The first octal serializer / deserializer block 482 can be used as a first serializer / deserializer module 216, and the second octal serializer / deserializer block 484 can be used as a second serializer / deserializer module 217. For example, the first octal serializer / deserializer block 482 can receive eight serial differential signals through, for example, electrical terminals located at the bottom of the block, and generate eight parallel signal groups based on the eight serial differential signals, wherein each parallel signal group is generated based on a corresponding serial differential signal. The first octal serializer / deserializer block 482 can adjust the serial electrical signals when converting to eight parallel signal groups, for example, performing clock and data recovery, and / or signal equalization. The first octal serializer / deserializer block 482 transmits eight parallel signal groups to the second octal serializer / deserializer block 484 via parallel buses 485 and 486. The second octal serializer / deserializer block 484 can generate eight serial differential signals based on the eight parallel signal groups, where each serial differential signal is generated from a corresponding parallel signal group. The second octal serializer / deserializer block 484 can output the eight serial differential signals, for example, through electrical terminals arranged on the bottom side of the block.

[0129] Multiple serializer / deserializer blocks can be electrically coupled to multiple serializer / deserializer blocks via a bus processing unit, which can be, for example, a parallel bus of an electrical channel, a statically or dynamically reconfigurable cross-connect device, or a remapping device (gearbox). See Figure 33. Figure 33 is a diagram of an example electronic communication integrated circuit 530, which includes a first octal serializer / deserializer block 532 and a second octal serializer / deserializer block 534 electrically coupled to a third octal serializer / deserializer block 536 via a bus processing unit 538. In this example, bus processing unit 538 is configured to enable signal switching, allowing rerouting of signals, wherein an 8x50 Gbps serial signal modulated and serialized to the first and second octal serializer / deserializer blocks 532 and 534 is rerouted or combined into an 8×100 Gbps serial signal modulated and serialized to the third octal serializer / deserializer block 536. An example of bus processing unit 538 is shown in Figure 41A. In some examples, bus processing unit 538 enables N channels of a T Gbps serial signal to be remapped to N / M channels of an M×T Gbps serial signal, where N and M are positive integers and T is a real value, wherein the aforementioned N serial interface signals can be modulated using a first modulation format, while the serial interface signals can be modulated using a second modulation format.

[0130] In some other examples, bus processing unit 538 can allow redundancy to increase reliability. For example, first and second serializer / deserializer blocks 532 and 534 can be jointly configured as N channels for a serial interface to a T × N / (Nk) Gbps electrical signal, while third serializer / deserializer block 536 can be configured as N channels for a serial interface to a T Gbps electrical signal. Bus processing unit 538 can be configured to remap data (carrying a total of (Nk) × T × N / (Nk) = T × N) from N channels of the serial interface to the first and second serializer / deserializer blocks 532 and 534 to the third serializer / deserializer block 536. Thus, bus processing unit 538 allows for the retention of a total of T × NGbps of data to the serial interface with third serializer / deserializer block 536 even if k of the N serial interface electrical links to the first and second serializer / deserializer blocks 532 and 534 fail. The number k is a positive integer. In some embodiments, k can be approximately 1% of N. In some other embodiments, k can be approximately 10% of N. In some embodiments, the bus processing unit 538 can dynamically select Nk of the N serial interface electrical links to the first and second serializer / deserializer blocks 532 and 534 to be remapped to the third serializer / deserializer block 536 based on signal integrity and signal performance information extracted from the serial interface signals by serializer / deserializer blocks 532 and 534. An example of bus processing unit 538 is shown in Figure 41B, where N = 16, k = 2, and T = 50 Gbps.

[0131] In some instances, using the redundancy techniques discussed above, bus processing unit 538 remaps the T×N / (NK)Gbps of the N channels to an M×TGbps serial electrical signal of the N / M channels. Bus processing unit 538 allows k of the N serial interface electrical links to fail while still maintaining the total number of bits of T×NGbps data with the serial interface of the third serializer / deserializer block 536.

[0132] Figure 20 is a functional block diagram illustrating an example of a data processing system 200, which can be used to implement one or more of the devices 101_1 to 101_6 as shown in Figure 1. For illustrative purposes, without implied limitations, the data processing system 200 is shown as part of node 101_1. The data processing system 200 can be part of any other network element in system 100. The data processing system 200 includes an integrated communication device 210, a fiber optic connector assembly 220, a packaging substrate 230, and an electronic processor integrated circuit 240.

[0133] Connector assembly 220 includes connector 223 and fiber array 226. Connector 223 may include multiple individual fiber connectors 423_i (i belongs to {R1…RM;S1…SK;T1…TN}, where K, M, and N are positive integers). In some embodiments, some or all of the individual connectors 423_i may form a single physical entity. In some embodiments, some or all of the individual connectors 423_i may be separate physical entities. When operating as part of network element 101_1 in system 100, (i) connectors 423_S1 to 423_SK can be connected to optical power supply 103, for example, via fiber optic link 102_6, to receive supply light; (ii) connectors 423_R1 to 423_RM can be connected to transmitter of node 101_2, for example, via communication path 102_1, to receive optical communication signals from node 101_2; and (iii) connectors 423_T1 to 423_TN can be connected to receiver of node 101_2, for example, via communication path 102_1, to transmit optical communication signals to node 101_2.

[0134] In some embodiments, the communication device 210 includes an electronic communication integrated circuit 215, a photonic integrated circuit 214, a connector component 213, and a substrate 211. The connector component 213 may be included in the photonic integrated circuit 214 (i ∈ {R1…RM; S1…SK; T1…TN} where K, M, and N are positive integers). In some embodiments, some or all of the individual connectors 413_i may form a single physical entity. In some embodiments, some or all of the individual connectors 413_i may be separate physical entities. As disclosed in U.S. Patent Application No. 16 / 816,171, the optical connector 413_i is configured to optically couple light to the photonic integrated circuit 214 through an optical coupling interface 414 (e.g., a vertical grating coupler, a steering mirror, etc.).

[0135] In operation, light entering the photonic integrated circuit 214 from the fiber optic link 102_6 via coupling interfaces 414_S1 to 414_SK can be split using a beam splitter 415. The beam splitter 415 can be an optical power splitter, an optical polarization splitter, an optical wavelength demultiplexer, or any combination or series thereof, for example, as disclosed in U.S. Patent Application Nos. 16 / 847,705 and 16 / 888,890, filed June 1, 2020, the entire contents of which are incorporated herein by reference. In some embodiments, one or more splitting functions of the splitter 415 can be integrated into the optical coupling interface 414 and / or the optical connector 413. For example, in some embodiments, a polarization diversity vertical grating coupler can be configured to simultaneously function as part of both the polarization beam splitter 415 and the optical coupling interface 414. In some other embodiments, an optical connector including a polarization diversity arrangement can simultaneously function as both the optical connector 413 and the polarization splitter 415.

[0136] In some embodiments, receiver 416 may be used to detect light at one or more outputs of splitter 415 to extract synchronization messages as disclosed in U.S. Patent Application No. 16 / 847,705. In various embodiments, receiver 416 may include one or more PIN photodiodes, one or more avalanche photodiodes, one or more automodulation receivers, or one or more analog (heterodyne / neutral) or digital (endodyne) automodulation receivers. In some embodiments, one or more optomodulators 417 may be used to modulate light at one or more outputs of splitter 415 for communication with other network components.

[0137] Before leaving the photonic integrated circuit 214 via optical coupling interfaces 414_T1 to 414_TN, the modulated light at the output of modulator 417 can be multiplexed by a multiplexer (MUX) 418 via polarization or wavelength. In some embodiments, the multiplexer 418 is not used, i.e., the output of each modulator 417 can be directly coupled to the corresponding optical coupling interface 414.

[0138] At the receiver end, light entering the photonic integrated circuit 214 via coupling interfaces 414_R1 to 414_RM from, for example, communication path 101_2 can be demultiplexed in polarization and / or wavelength using an optical demultiplexer 419. The output of the demultiplexer 419 is then individually detected using a receiver (RX) 421. In some embodiments, the demultiplexer 419 is not used; that is, the output of each coupling interface 414_R1 to 414_RM can be directly coupled to the corresponding receiver 421. In various embodiments, the receiver 421 may include one or more PIN photodiodes, one or more avalanche photodiodes, one or more auto-tuning receivers, or one or more analog (heterodyne / homogeneous) or digital (endodyne) co-tuning receivers.

[0139] Photonic integrated circuit 214 is electrically coupled to integrated circuit 215. In some embodiments, photonic integrated circuit 214 provides a plurality of serial electrical signals to a first serializer / deserializer module 216. The first serializer / deserializer module 216 generates a plurality of parallel electrical signal groups based on the serial electrical signals, wherein each parallel electrical signal is generated based on a corresponding serial electrical signal. The first serializer / deserializer module 216 modulates the serial electrical signals, demultiplexes them into a plurality of parallel electrical signal groups, and sends the plurality of parallel electrical signal groups to a second serializer / deserializer module 217 through bus processing unit 218. In some embodiments, bus processing unit 218 performs signal switching and performs line coding and / or error correction coding functions. An example of bus processing unit 218 is shown in Figure 42.

[0140] The second serializer / deserializer module 217 generates a plurality of serial electrical signals based on parallel electrical signal groups, wherein each serial electrical signal is generated based on a corresponding parallel electrical signal group. The second serializer / deserializer module 217 transmits the serial electrical signals through an electrical connector passing through the substrate 211 in the thickness direction to an array of electrical terminals 500 disposed on the bottom surface of the substrate 211. For example, the electrical terminals 500 are configured to allow the integrated communication device 210 to be easily coupled to or detached from the package substrate 230.

[0141] In some embodiments, the electronic processor integrated circuit 240 includes a data processor 502 and an embedded third serializer / deserializer module 504. The third serializer / deserializer module 504 receives serial electrical signals from the second serializer / deserializer module 217 and generates a set of parallel electrical signals based on the serial electrical signals, wherein each parallel electrical signal is generated based on a corresponding serial electrical signal. The data processor 502 processes the set of parallel signals generated by the third serializer / deserializer module 504.

[0142] In some embodiments, data processor 502 generates parallel signal groups, and third serializer / deserializer module 504 generates serial signals based on the parallel signal groups, wherein each serial signal is generated based on a corresponding parallel signal group. The serial signals are sent to second serializer / deserializer module 217, which generates parallel signal groups based on the serial signals, wherein each parallel signal group is generated based on a corresponding serial signal. Second serializer / deserializer module 217 sends the parallel signal groups to first serializer / deserializer module 216 via bus processing unit 218. First serializer / deserializer module 216 generates serial signals based on the parallel signal groups, wherein each serial signal is generated based on a corresponding parallel signal group. First serializer / deserializer module 216 sends the serial signals to photonic integrated circuit 214. The photoelectric modulator (Mod.) 417 modulates the optical signal based on the serial electrical signal. The modulated optical signal is output from the photonic integrated circuit 214 through the optical coupling interfaces 414_T1 to 414_TN.

[0143] In some embodiments, the supply light from the optical power supply 103 comprises an optical pulse train, and the synchronization message extracted by the receiver (RX) 416 can be used by the serializer / deserializer module 216 to align the electrical output signal of the serializer / deserializer module 216 with the respective copies of the corresponding optical pulse train at the output of the splitter 415 in the modulator 417. For example, the optical pulse train can be used as the optical power supply at the optical modulator. In some such embodiments, the first serializer / deserializer module 216 may include an interpolator or other electrical phase adjustment element.

[0144] Please refer to Figure 21. As shown in Figure 21, in some embodiments, the data processing system 540 includes a housing or enclosure 542 having a front panel 544, a bottom panel 546, side panels 548 and 550, a rear panel 552, and a top panel (not shown). The system 540 includes a printed circuit board (PCB) 558 extending substantially parallel to the direction of extension of the bottom panel 546. A data processing chip 554 is mounted on the PCB 558, wherein the chip 554 may be, for example, a network switch, a central processing unit, a graphics processing unit, a tensor processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller, or an application-specific integrated circuit (ASIC).

[0145] On the front panel 544 is a pluggable input / output interface 556 that allows the data processing chip 554 to communicate with other systems and devices. For example, the input / output interface 556 can receive optical signals from outside the system 540 and convert them into electrical signals for processing by the data processing chip 554. The input / output interface 556 can also receive electrical signals from the data processing chip 554 and convert them into optical signals for transmission to other systems or devices. For example, the input / output interface 556 may include one or more small form factor (SFP), SFP+, SFP28, QSFP, QSFP28, or QSFP56 transceivers. Electrical signals output from the transceivers are routed to the data processing chip 554 via electrical connectors on or within the printed circuit board 558.

[0146] As shown in Figures 21 and 29B, examples 69A, 70, 71A, 72, 72A, 74A, 75A, 75C, 76, 77A, 77B, 78, 96 to 98, 100, 110, 112, 113, 115, 117 to 122, 125A to 127, 129, 136 to 149, 159, and 160, various embodiments can have various shapes and sizes. For example, in some embodiments, the top and bottom panels 546 can have the largest area; in other embodiments, the side panels 548 and 550 can have the largest area; and in other embodiments, the front panel 544 and the rear panel 552 can have the largest area. In various embodiments, the printed circuit board 558 can be substantially parallel to the two side panels, for example, in the data processing system 540 shown in Figure 21. During normal operation, it can stand upright on one of its side panels (with side panel 550 at the bottom and bottom panel 546 at the side). In various embodiments, the data processing system 540 may include two or more printed circuit boards, some of which may be substantially parallel to the bottom panel and some of which may be substantially parallel to the side panels. For example, vertical board insertion systems are used in some computer systems for machine learning / artificial intelligence applications. As used herein, the distinction between "front" and "rear" is based on the location of most of the input / output interfaces 556, rather than on what a user might perceive as the front or rear of the data processing system 540.

[0147] Figure 22 is a top view of an example data processing system 560, which includes a housing 562 with side panels 564 and 566 and a rear panel 568. System 560 includes a vertically mounted printed circuit board 570, which may also serve as a front panel. The surface of the printed circuit board 570 is substantially perpendicular to the bottom panel of the housing 562. The term "substantially perpendicular" means that, taking into account manufacturing and assembly tolerances, the angle between the first surface and the second surface ranges from 85° to 95° if the first surface is perpendicular to the second surface. A data processing chip 572 and an integrated communication device 574 are mounted on the printed circuit board 570. In some examples, the data processing chip 572 and the integrated communication device 574 are mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached (e.g., electrically coupled) to the printed circuit board 570. The data processing chip 572 may be, for example, a network switch, a central processing unit, a graphics processing unit, a tensor processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller, or an application-specific integrated circuit (ASIC). Heat sink 576 is mounted on data processing chip 572.

[0148] In some embodiments, the integrated communication device 574 includes a photonic integrated circuit 586 and an electronic communication integrated circuit 588 mounted on a substrate 594. The electronic communication integrated circuit 588 includes a first serializer / deserializer module 590 and a second serializer / deserializer module 592. The printed circuit board 570 may be similar to the package substrate 230 (as shown in Figures 2, 4, 11 to 14), the data processing chip 572 may be similar to an electronic processor integrated circuit or an application-specific integrated circuit 240, and the integrated communication device 574 may be similar to integrated communication devices 210, 252, 374, 382, ​​402, 428. In some embodiments, the integrated communication device 574 is soldered to the printed circuit board 570. In some other embodiments, the integrated communication device 574 is detachably connected to the printed circuit board 570, for example, through a planar grid array or a compression inserter. Related fastening devices, including snap-fit ​​or screw-in mechanisms, are not shown in the figures.

[0149] In some examples, the integrated communication device 574 does not include the photonic integrated circuitry of the serializer / deserializer module and provides a separate driver / transimpedance amplifier (TIA). In some examples, the integrated communication device 574 includes both photonic integrated circuitry and a driver / transimpedance amplifier, but does not include the serializer / deserializer module.

[0150] The integrated communication device 574 includes a first optical connector 578 configured to receive a bundle of optical fibers 582 coupled to a second optical connector 580. The integrated communication device 574 is electrically connected to the data processing chip 572 via an electrical connector or trace 584 on or within the printed circuit board 570. Because both the data processing chip 572 and the integrated communication device 574 are mounted on the printed circuit board 570, the electrical connector or trace 584 can be made shorter compared to the electrical connector that electrically couples the transceiver 556 to the data processing chip 554 in Figure 21. Using a shorter electrical connector or trace 584 allows for higher data rates, lower noise, lower distortion, and / or lower crosstalk. Mounting the printed circuit board 570 perpendicular to the bottom panel of the housing makes the integrated communication device 574 more accessible, meaning it can be disassembled and reconnected without removing the housing from the rack.

[0151] In some examples, the fiber bundle 582 can be securely attached to the photonic integrated circuit 586 without using the first and second optical connectors 578, 580.

[0152] The printed circuit board 570 can be secured to the side panels 564 and 566, as well as the bottom and top panels of the housing, using fasteners such as brackets, screws, clips, and / or other types of fastening mechanisms. The surface of the printed circuit board 570 can be perpendicular to the bottom panel of the housing, or at an angle (e.g., between -60° and 60°) relative to the vertical direction (which is perpendicular to the bottom panel). The printed circuit board 570 can have multiple layers, with the outermost layer (i.e., the user-facing layer) having an aesthetically pleasing outer surface construction.

[0153] The first optical connector 578, the second optical connector 580, and the fiber bundle 582 can be similar to those in Figures 2, 4, and 11-16. As described above, the fiber bundle 582 can include 10 or more optical fibers, 100 or more optical fibers, 500 or more optical fibers, or 1000 or more optical fibers. The optical signal provided to the photonic integrated circuit 586 can have a high total bandwidth, for example, approximately 1.6 Tbps or approximately 12.8 Tbps or more.

[0154] Although Figure 22 shows an integrated communication device 574, additional integrated communication devices 574 electrically coupled to the data processing chip 572 may be present. The data processing system 560 may include a second printed circuit board (not shown) parallel to the bottom panel of the housing 562. The second printed circuit board may support other optical and / or electronic devices, such as storage devices, memory chips, controllers, power modules, fans, and other cooling devices.

[0155] In some examples of data processing system 540 (as shown in Figure 21), transceiver 556 may include circuitry (e.g., integrated circuitry) that performs some type of processing on signals and / or data contained in the signals. Signals output from transceiver 556 require a longer signal path to reach data processing chip 554, thus limiting the data rate. In some data processing systems, data processing chip 554 outputs processed data, which is routed to a transceiver and transmitted to another system or device. Again, signals output from data processing chip 554 require a longer signal path to reach transceiver 556, thus limiting the data rate. In contrast, in data processing system 560 (as shown in Figure 22), the signal path for electrical signal transmission between integrated communication device 574 and data processing chip 572 is shorter, thereby supporting higher data rates.

[0156] Figure 23 is a top view of an example data processing system 600, which includes a housing 602 with side panels 604 and 606 and a rear panel 608. System 600 includes a vertically mounted printed circuit board 610 used as a front panel. The surface of the printed circuit board 610 is substantially perpendicular to the bottom panel of the housing 602. A data processing chip 572 is mounted inside the printed circuit board 610, and an integrated communication device 612 is mounted on the outside. In some examples, the data processing chip 572 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the printed circuit board 610. In some embodiments, the integrated communication device 612 is soldered to the printed circuit board 610. In some other embodiments, the integrated communication device 612 is detachably connected to the printed circuit board 610, for example, through a planar grid array or a compressed interposer. Related fastening devices, including snap-fit ​​or screw-in mechanisms, are not shown in the figure. A heat sink 576 is disposed on the data processing chip 572.

[0157] In some embodiments, the integrated communication device 612 includes a photonic integrated circuit 614 and an electronic communication integrated circuit 588 mounted on a substrate 618. The electronic communication integrated circuit 588 includes a first serializer / deserializer module 590 and a second serializer / deserializer module 592. The integrated communication device 612 includes a first optical connector 578 configured to receive a second optical connector 580 coupled to an optical fiber 582. The integrated communication device 612 is electrically coupled to an electrical connector processing chip 572 via an electrical connector or a trace 616 passing through the printed circuit board 610 in the thickness direction. Since both the data processing chip 572 and the integrated communication device 612 are mounted on the printed circuit board 610, the electrical connector or trace 616 can be made shorter, resulting in higher data rates, lower noise, lower distortion, and / or lower crosstalk. Mounting the integrated communication device 612 on the outside of the printed circuit board 610 perpendicular to the bottom panel of the housing allows it to be accessed from outside the housing, making the integrated communication device 612 easier to access, such as for disassembly and reconnection, without having to remove the housing from the rack.

[0158] In some examples, the photonic integrated circuitry of the integrated communication device 612 does not include a serializer / deserializer module, and the driver and transimpedance amplifier (TIA) are provided separately. In some examples, the integrated communication device 612 includes photonic integrated circuitry and a driver / transimpedance amplifier, but no serializer / deserializer module. In some examples, the fiber bundle 582 can be securely attached to the photonic integrated circuitry 614 without using the first and second optical connectors 578, 580.

[0159] In some examples, the data processing chip 572 is mounted on the back side of the substrate, while the integrated communication device 612 is detachably attached to the front side of the substrate, wherein the substrate provides a high-speed connection between the data processing chip 572 and the integrated communication device 612. For example, the substrate may be attached to the front side of a printed circuit board, wherein the printed circuit board includes an opening that allows the data processing chip 572 to be mounted on the back side. The printed circuit board can supply power from the motherboard to the substrate (and consequently to the data processing chip 572 and the integrated communication device 612), and allows the data processing chip 572 and the integrated communication device 612 to connect to the motherboard using a low-speed electrical link.

[0160] The printed circuit board 610 can be secured to the side panels 604 and 606, as well as the bottom and top panels of the housing, using fasteners such as brackets, screws, clips, and / or other types of fastening mechanisms. The surface of the printed circuit board 610 can be perpendicular to the bottom panel of the housing, or at an angle (e.g., between -60° and 60°) relative to the vertical direction (which is perpendicular to the bottom panel). The printed circuit board 610 can have multiple layers, with the outermost layer (i.e., the user-facing layer) having an aesthetically pleasing surface finish on the portion not covered by the integrated communication device 612.

[0161] Figures 24 through 27 illustrate four general designs in which the data processing chip is located near the input / output communication interface. Figure 24 is a top view of an example data processing system 630, in which the data processing chip 640 is mounted near the optical / electrical communication interface 644 to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 640 and the optical / electrical communication interface 644. In this example, the data processing chip 640 and the optical / electrical communication interface 644 are mounted on a circuit board 642, which serves as the front panel of the housing 632 in system 630, thus allowing easy coupling of optical fiber to the optical / electrical communication interface 644. In some examples, the data processing chip 640 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 642.

[0162] The housing 632 has side panels 634 and 636, a rear panel 638, a top panel, and a bottom panel. In some examples, the circuit board 642 is perpendicular to the bottom panel. In some examples, the angle of the circuit board 642 relative to the vertical direction of the bottom panel is between -60° and 60°. The side of the circuit board 642 facing the user has an aesthetically pleasing outer surface.

[0163] Optical / electrical communication interface 644 is electrically coupled to data processing chip 640 via electrical connectors or traces 646 on or within circuit board 642. Circuit board 642 may have one or more printed circuit boards. Electrical connectors or traces 646 may be signal lines printed on one or more layers of printed circuit board 642 and enable high-bandwidth data paths (e.g., one or more gigabits per second per data path) between data processing chip 640 and data processing chip 640.

[0164] In the first example, the data processing chip 640 receives electrical signals from the optical / electrical communication interface 644 but does not transmit electrical signals to the optical / electrical communication interface 644. In the second example, the data processing chip 640 receives electrical signals from the optical / electrical communication interface 644 and transmits electrical signals to the optical / electrical communication interface 644. In the first example, the optical / electrical communication interface 644 receives optical signals from the optical fiber, generates electrical signals based on the optical signals, and transmits the electrical signals to the data processing chip 640. In the second example, the optical / electrical communication interface 644 also receives electrical signals from the data processing chip, generates optical signals based on the electrical signals, and transmits the optical signals to the optical fiber.

[0165] Optical connector 648 is used to couple optical signals from optical fibers to optical / electrical communication interface 644. In this example, optical connector 648 passes through an opening in circuit board 642. In some examples, optical connector 648 is securely attached to optical / electrical communication interface 644. In some examples, optical connector 648 is detachably configured to couple to optical / electrical communication interface 644, for example, by using insertable and releasable mechanisms, which may include one or more snap-fit ​​or screw-in mechanisms. In some other examples, arrays of 10 or more optical fibers are securely or permanently attached to optical connector 648.

[0166] The optical / electrical communication interface 644 can be similar to integrated communication devices such as 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), and 428 (Figure 14). In some examples, the optical / electrical communication interface 644 can be similar to integrated optical communication devices 448, 462, 466, and 472 (Figure 17), except that the optical / electrical communication interface 644 is mounted on the same side of the circuit board 642 as the data processing chip 640. The optical connector 648 can be similar to first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), and first optical connector component 456 (Figure 17). In some examples, a portion of the optical connector 648 can be a portion of the optical / electrical communication interface 644. In some examples, optical connector 648 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17) optically coupled to an optical fiber. Figure 24 shows optical connector 648 passing through circuit board 642. In some examples, optical connector 648 may be very short, allowing the optical fiber to pass entirely or partially through circuit board 642. In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 644, but rather can be attached coplanarly to the photonic integrated circuit using methods such as V-groove fiber attachments, tapered or non-tapered fiber edge coupling, followed by a mechanism that directs light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc. Any such solution is conceptually included in the vertical optical coupling attachments schematically visualized in Figures 24 through 27.

[0167] Figure 25 is a top view of an example data processing system 650, wherein a data processing chip 670 is mounted near an optical / electrical communication interface 652 to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 670 and the optical / electrical communication interface 652. In this example, the data processing chip 670 and the optical / electrical communication interface 652 are mounted on a circuit board 654 located near the front panel 656 of the housing 658 in system 630, thus allowing easy coupling of optical fiber to the optical / electrical communication interface 652. In some examples, the data processing chip 670 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 654.

[0168] The housing 658 has side panels 660 and 662, a rear panel 664, a top panel, and a bottom panel. In some examples, the circuit board 654 and the front panel 656 are perpendicular to the bottom panel. In some examples, the angle between the circuit board 654 and the front panel 656 and the vertical direction relative to the bottom panel is in the range of -60° to 60°. In some examples, the circuit board 654 is substantially parallel to the front panel 656; for example, the angle between the surface of the circuit board 654 and the surface of the front panel 656 may be in the range of -5° to 5°. In some examples, the circuit board 654 forms an angle relative to the front panel 656, wherein the angle is in the range of -45° to 45°.

[0169] Optical / electrical communication interface 652 is electrically coupled to data processing chip 670 via electrical connectors or traces 666 on or within circuit board 654. Similar to system 630, the signal path between data processing chip 670 and optical / electrical communication interface 652 can be unidirectional or bidirectional.

[0170] Similar to system 630, optical connector 668 is used to couple optical signals from optical fiber to optical / electrical communication interface 652. In this example, optical connector 668 passes through an opening in front panel 656 and an opening in circuit board 654. Optical connector 668 can be securely or releasably connected to optical / electrical communication interface 652.

[0171] The optical / electrical communication interface 652 can be similar to integrated communication devices such as 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), and 428 (Figure 14). In some examples, the optical / electrical communication interface 652 can be similar to integrated optical communication devices 448, 462, 466, and 472 (Figure 17), except that the optical / electrical communication interface 652 is mounted on the same side of the circuit board 654 as the data processing chip 640. The optical connector 668 can be similar to first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), and first optical connector component 456 (Figure 17). In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 652. Instead, it can be attached to the photonic integrated circuit in a planar manner using methods such as V-groove fiber attachments, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc. In some examples, a portion of the optical connector 668 can be part of the optical / electrical communication interface 652. In some examples, the optical connector 668 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17), which are optically coupled to the optical fiber. Figure 25 shows the optical connector 668 passing through the front panel 656 and the circuit board 654. In some examples, the optical connector 668 can be very short, such that the optical fiber passes through all or part of the front panel 656. The optical fiber can also pass through all or part of the circuit board 654.

[0172] In the examples of Figures 24 and 25, only one optical / electrical communication interface (544, 652) is shown. Systems 630 and 650 can be understood to include multiple optical / electrical communication interfaces mounted on the same circuit board as the data processing chip to implement high-bandwidth data paths (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip and each optical / electrical communication interface.

[0173] Figure 26A is a top view of an example of a data processing system 680, wherein a data processing chip 681 is mounted near optical / electrical communication interfaces 682a, 682b, 682c (collectively referred to as 682) to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 681 and each optical / electrical communication interface 682. The data processing chip 681 is mounted on a first side of a circuit board 683 to serve as the front panel of a housing 684 in the system 680. In some examples, the data processing chip 681 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 683. The optical / electrical communication interface 682 is mounted on a second side of the circuit board 683, with the second side facing outwards from the housing 684. In this example, the optical / electrical communication interface 682 is mounted on the outside of the housing 685, allowing optical fibers to be easily coupled to the optical / electrical communication interface 682.

[0174] The housing 684 has side panels 685 and 686, a rear panel 687, a top panel, and a bottom panel. In some examples, the circuit board 683 is perpendicular to the bottom panel. In some examples, the angle of the circuit board 683 relative to the vertical direction of the bottom panel is in the range of -60° to 60° (or -30° to 30°, -10° to 10°, or -1° to 1°).

[0175] Each optical / electrical communication interface 682 is electrically coupled to the data processing chip 681 via an electrical connector or trace 688 passing through the thickness direction of the circuit board 683. For example, the electrical connector or trace 688 may be configured as a through-hole of the circuit board 683. Similar to systems 630 and 650, the signal path between the data processing chip 681 and each optical / electrical communication interface 682 can be unidirectional or bidirectional.

[0176] For example, system 680 can be configured to transmit signals unidirectionally between one of data processing chip 681 and optical / electrical communication interface 682, and to transmit signals bidirectionally between data processing chip 681 and the other optical / electrical communication interface 682. For instance, system 680 can be configured such that signals are transmitted unidirectionally from optical / electrical communication interface 682a to data processing chip 681, and unidirectionally from data processing chip to optical / electrical communication interface 682b and / or optical / electrical communication interface 682c.

[0177] Optical connectors 689a, 689b, and 689c (collectively referred to as 689) are used to couple optical signals from optical fibers to optical / electrical communication interfaces 682a, 682b, and 682c, respectively. Similar to systems 630 and 650, optical connectors 689 can be securely or detachably connected to optical / electrical communication interfaces 682.

[0178] The optical / electrical communication interface 682 can resemble the structure of integrated communication devices such as 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), 428 (Figure 14), and 512 (Figure 32), except that the optical / electrical communication interface 682 is mounted on the side of the circuit board 683 opposite to the data processing chip 681. In some examples, the optical / electrical communication interface 682 can resemble integrated optical communication devices 448, 462, 466, and 472 (Figure 17). The optical connector 689 can resemble first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), first optical connector component 456 (Figure 17), and first optical connector component 520 (Figure 32). In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 682. Instead, it is attached to the photonic integrated circuit in a planar manner, such as using a V-groove fiber accessory, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc. In some examples, a portion of the optical connector 689 may be part of the optical / electrical communication interface 682. In some examples, the optical connector 689 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17), which are optically coupled to an optical fiber.

[0179] In some examples, the optical / electrical communication interface 682 is securely fixed (e.g., by soldering) to the circuit board 683. In some examples, the optical / electrical communication interface 682 is detachably connected to the circuit board 683, for example, by means of a mechanical mechanism using one or more snap-fit ​​or screw-in mechanisms. An advantage of system 680 is that, in the event of a failure of one of the optical / electrical communication interfaces 682, the faulty optical / electrical communication interface 682 can be replaced without opening the housing 684.

[0180] Figure 26B is a top view of an example data processing system 690b, wherein a data processing chip 691b is mounted near optical / electrical communication interfaces 692a, 692b, and 692c (collectively referred to as 692) to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 691b and each optical / electrical communication interface 692. The data processing chip 691b is mounted on a first side of a circuit board 693b as a front panel of a housing 694b in the system 690b. In this example, optical / electrical communication interface 692a is mounted on the first side of the circuit board 693b, and optical / electrical communication interfaces 692b and 692c are mounted on a second side of the circuit board 693b, wherein the second side faces outwards from the housing 694b. In this example, optical / electrical communication interfaces 692b and 692c are mounted on the outside of housing 694b, such that the optical fiber is connected to the front of housing 694b, while optical / electrical communication interface 692a is located inside housing 694b, for example, such that the optical fiber is connected to the rear of housing 694b. In some examples, two or more optical / electrical communication interfaces 692 may be located inside housing 694b and connect the optical fiber to the rear of housing 694b.

[0181] The housing 694b has side panels 695b and 696b, a rear panel 697b, a top panel, and a bottom panel. In some examples, the circuit board 693b is perpendicular to the bottom panel. In some examples, the angle of the circuit board 693b relative to the vertical direction of the bottom panel is in the range of -60° to 60° (or -30° to 30°, -10° to 10°, or -1° to 1°).

[0182] Each optical / electrical communication interface 692 is electrically coupled to the data processing chip 691b via an electrical connector or trace 698b passing through the thickness direction of the circuit board 693b. For example, the electrical connector or trace 698b may be configured as a through-hole of the circuit board 693b. In this example, the electrical connector or trace 698b extends to both sides of the circuit board 693b (e.g., for connecting the internal optical / electrical communication interface 692 to the outside of the housing 694b). Similar to systems 630, 650, and 680, the signal path between the data processing chip 691b and each optical / electrical communication interface 692 can be unidirectional or bidirectional.

[0183] For example, system 690b can be configured to transmit signals unidirectionally between data processing chip 691b and optical / electrical communication interface 692, and to transmit signals bidirectionally between data processing chip 691b and the other optical / electrical communication interface 692. For instance, system 690b can be configured such that signals are transmitted unidirectionally from optical / electrical communication interface 692a to data processing chip 691b, and unidirectionally from data processing chip 691b to optical / electrical communication interface 692b and / or optical / electrical communication interface 692c.

[0184] Optical connectors 699a, 699b, and 699c (collectively referred to as 699) are used to couple optical signals from optical fibers to optical / electrical communication interfaces 692a, 692b, and 692c, respectively. Similar to systems 630, 650, and 680, optical connectors 699 can be securely or detachably connected to optical / electrical communication interfaces 692. In this example, optical connectors 699b and 699c can be connected to the optical fiber at the front of housing 694b, and optical connector 699a can be connected to the optical fiber at the rear of housing 694b. In this example, optical connector 699a can be connected to the optical fiber 1000b of a rear panel interface 1001b (e.g., a backplane) and then to the optical fiber at the rear of housing 694b, where the rear panel interface 1001b is mounted at the rear of rear panel 697b. In some examples, optical connectors 699 can be securely or permanently attached to communication interface 692. In some examples, the optical connector 699 can be securely or permanently attached to the fiber optic array.

[0185] The optical / electrical communication interface 692 can resemble, for example, the structure of integrated communication devices 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), 428 (Figure 14), and 512 (Figure 32), except that the optical / electrical communication interfaces 692b and 692c are mounted on the side of the circuit board 693b opposite to the data processing chip 691b. In some examples, the optical / electrical communication interface 692 can resemble integrated optical communication devices 448, 462, 466, and 472 (Figure 17). The optical connector 699 can resemble, for example, the first optical connector component 213 (Figures 2 and 4), the first optical connector 356 (Figures 11 and 12), the first optical connector 404 (Figures 13 and 14), the first optical connector component 456 (Figure 17), and the first optical connector component 520 (Figure 32). In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 692. Instead, it is attached to the photonic integrated circuit in a planar manner, such as using a V-groove fiber accessory, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc. In some examples, a portion of the optical connector 699 may be part of the optical / electrical communication interface 692. In some examples, the optical connector 699 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17), which are optically coupled to an optical fiber.

[0186] In some examples, the optical / electrical communication interface 692 is securely fixed (e.g., by soldering) to the circuit board 693b. In some examples, the optical / electrical communication interface 692 is detachably connected to the circuit board 693b, for example, by means of a mechanical mechanism using one or more snap-fit ​​or screw-in mechanisms. An advantage of system 690b is that, in the event of a failure of one of the optical / electrical communication interfaces 692, the faulty optical / electrical communication interface 692 can be replaced without opening the housing 694b.

[0187] Figure 26C is a top view of an example data processing system 690c, wherein a data processing chip 691c is mounted near optical / electrical communication interfaces 692d, 692e, and 692f (collectively referred to as 692) to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 691c and each optical / electrical communication interface 692. The data processing chip 691c is mounted on a first side of a circuit board 693c to serve as the front panel of a housing 694c in the system 690c. In this example, optical / electrical communication interface 692d is mounted on the first side of the circuit board 693c, and optical / electrical communication interfaces 692e and 692f are mounted on a second side of the circuit board 693c, wherein the second side faces outwards from the housing 694c. In this example, optical / electrical communication interfaces 692e and 692f are mounted on the outside of housing 694c, such that the optical fiber is connected to the front of housing 694c, while optical / electrical communication interface 692d is located inside housing 694c, for example, such that the optical fiber is connected to the rear of housing 694c. In some examples, two or more optical / electrical communication interfaces 692 may be located inside housing 694c and connect the optical fiber to the rear of housing 694c.

[0188] The housing 694c has side panels 695c and 696c, a rear panel 697c, a top panel, and a bottom panel. In some examples, the circuit board 693c is perpendicular to the bottom panel. In some examples, the angle of the circuit board 693c relative to the vertical direction of the bottom panel is within the range of -60° to 60° (or -30° to 30°, -10° to 10°, or -1° to 1°).

[0189] Each optical / electrical communication interface 692 is electrically coupled to the data processing chip 691c via an electrical connector or trace 698c that passes through the thickness direction of the circuit board 693c. For example, the electrical connector or trace 698c may be configured as a through-hole of the circuit board 693c. In this example, the electrical connector or trace 698c extends to both sides of the circuit board 693b (e.g., for connection between the internal optical / electrical communication interface 692 and the exterior of the housing 694b). Similar to systems 630, 650, and 680, the signal path between the data processing chip 691c and each optical / electrical communication interface 692 can be unidirectional or bidirectional.

[0190] For example, system 690c can be configured to transmit signals unidirectionally between one of data processing chip 691c and optical / electrical communication interface 692, and to transmit signals bidirectionally between data processing chip 691c and the other optical / electrical communication interface 692. For instance, system 690c can be configured such that signals are transmitted unidirectionally from optical / electrical communication interface 692d to data processing chip 691c, and unidirectionally from data processing chip 691c to optical / electrical communication interface 692e and / or optical / electrical communication interface 692f.

[0191] Optical connectors 699d, 699e, and 699f (collectively referred to as 699) are used to couple optical signals from optical fibers to optical / electrical communication interfaces 692d, 692e, and 692f, respectively. Similar to systems 630, 650, and 680, optical connectors 699 can be securely or detachably connected to optical / electrical communication interfaces 692. In this example, optical / electrical communication interfaces 692d and optical connectors 699d have different orientations compared to optical / electrical communication interfaces 692a and optical connectors 699a in Figure 26B. This orientation change refers to a 90-degree counter-clockwise rotation. Other types of orientation changes (e.g., rotation, pitch, tilt, etc.) can also be implemented. Position changes (e.g., translation) and other types of position changes can also be used. In this example, optical connectors 699e and 699f can be connected to the optical fiber at the front of housing 694c, and optical connector 699d can be connected to the optical fiber at the rear of housing 694c. In this example, the optical connector 699d can be connected to the optical fiber 1000c of the rear panel interface 1001c (e.g., backplate) and then to the optical fiber at the rear of the housing 694c, wherein the rear panel interface 1001c is mounted at the rear of the rear panel 697c.

[0192] The optical / electrical communication interface 692 can resemble the structure of integrated communication devices such as 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), 428 (Figure 14), and 512 (Figure 32), except that the optical / electrical communication interfaces 692e and 692f are mounted on the side of the circuit board 693c opposite to the data processing chip 691c. In some examples, the optical / electrical communication interface 692 can resemble integrated optical communication devices 448, 462, 466, and 472 (Figure 17). The optical connector 699 can resemble first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), first optical connector component 456 (Figure 17), and first optical connector component 520 (Figure 32). In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 692. Instead, it is attached to the photonic integrated circuit in a planar manner, such as using a V-groove fiber accessory, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc. In some examples, a portion of the optical connector 699 may be part of the optical / electrical communication interface 692. In some examples, the optical connector 699 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17), which are optically coupled to an optical fiber.

[0193] In some examples, the optical / electrical communication interface 692 is securely fixed (e.g., by soldering) to the circuit board 693c. In some examples, the optical / electrical communication interface 692 is detachably connected to the circuit board 693c, for example, by means of a mechanical mechanism such as one or more snap-fit ​​or screw-in mechanisms. An advantage of system 690c is that, in the event of a failure of one of the optical / electrical communication interfaces 692, the faulty optical / electrical communication interface 692 can be replaced without opening the housing 694c.

[0194] Figure 27 is a top view of an example of a data processing system 700, wherein a data processing chip 702 is mounted near optical / electrical communication interfaces 704a, 704b, and 704c (collectively referred to as 704) to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 702 and each optical / electrical communication interface 704. Similar to system 650 (Figure 25), the data processing chip 702 is mounted on a first side of a circuit board 706 to serve as the front panel of the housing 710 in system 700. In some examples, the data processing chip 702 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 706. An optical / electrical communication interface 704 is mounted on a second side of the circuit board 708. In this example, the optical / electrical communication interface 704 extends through an opening in the front panel 708, allowing easy coupling of optical fiber to the optical / electrical communication interface 704.

[0195] The housing 710 has side panels 712 and 714, a rear panel 716, a top panel, and a bottom panel. In some examples, the angle between the circuit board 706 and the front panel 708 relative to the bottom panel in the vertical direction is in the range of -60° to 60°. In some examples, the circuit board 706 is substantially parallel to the front panel 708; for example, the angle between the surface of the circuit board 706 and the surface of the front panel 708 may be in the range of -5° to 5°. In some examples, the circuit board 706 forms an angle relative to the front panel 708, wherein the angle is in the range of -45° to 45°.

[0196] For example, an angle can refer to rotation about an axis parallel to a larger dimension of the front panel (e.g., the width dimension in a typical 1U, 2U, or 4U rack-mount device), or about a shorter dimension parallel to the front panel (e.g., the height dimension in a 1U, 2U, or 4U rack-mount device). An angle can also refer to rotation about an axis in any other direction. For example, circuit board 706 is positioned relative to the front panel such that components mounted on or attached to circuit board 706, such as interconnect modules (including optical modules or photonic integrated circuits), can be accessed through the front side, or through one or more openings in the front panel, or by opening the front panel to expose the components, without separating the top or side panels from the bottom panel. This orientation of the circuit board (or the substrate on which the data processing module is mounted) relative to the front panel also applies to the examples in Figures 21 to 26, 28B to 29B, 69A, 70, 71A, 72, 72A, 74A, 75A, 75C, 76, 77A, 77B, 78, 96 to 98, 100, 110, 112, 113, 115, 117 to 122, 125A to 127, 129, 136 to 149, 159 and 160.

[0197] Similar to system 680 (Figure 26), each optical / electrical communication interface 704 is electrically coupled to the data processing chip 702 via an electrical connector or trace 718 passing through the circuit board 706 along the thickness direction. Similar to systems 630 (Figure 24), 650 (Figure 25), and 680 (Figure 26), the signal path between the data processing chip 702 and each optical / electrical communication interface 704 can be unidirectional or bidirectional.

[0198] Optical connectors 716a, 716b, and 716c (collectively referred to as 716) are used to couple optical signals from optical fibers to optical / electrical communication interfaces 704a, 704b, and 704c, respectively. Similar to systems 630, 650, and 680, optical connectors 716 can be securely or detachably connected to optical / electrical communication interfaces 704.

[0199] The optical / electrical communication interface 704 can resemble the structure of integrated communication devices such as 210 (Figure 2), 252 (Figure 4), 374 (Figure 11), 382 (Figure 12), 402 (Figure 13), 428 (Figure 14), and 512 (Figure 32), except that the optical / electrical communication interface 704 is mounted on the side of the circuit board 706 opposite to the data processing chip 702. In some examples, the optical / electrical communication interface 704 can resemble integrated optical communication devices 448, 462, 466, and 472 (Figure 17). The optical connector 716 can resemble first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), first optical connector component 456 (Figure 17), and first optical connector component 520 (Figure 32). In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit, which is part of the optical / electrical communication interface 704. Instead, it can be attached to the photonic integrated circuit in a planar manner using methods such as V-groove fiber attachments, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light from the photonic integrated circuit interface to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors or one or more substantially 90-degree flexible fibers. In some examples, a portion of the optical connector 716 can be part of the optical / electrical communication interface 704. In some examples, the optical connector 716 may also include second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17), which are optically coupled to the optical fiber.

[0200] In some examples, the optical / electrical communication interface 704 is securely fixed (e.g., by soldering) to the circuit board 706. In some examples, the optical / electrical communication interface 704 is detachably connected to the circuit board 706, for example, by means of a mechanical mechanism using one or more snap-fit ​​or screw-in mechanisms. An advantage of system 700 is that, in the event of a failure of one of the optical / electrical communication interfaces 704, the faulty optical / electrical communication interface 704 can be removed or disconnected from the circuit board 706 without opening the housing 710.

[0201] In some implementations, the optical / electrical communication interface 704 does not protrude through an opening in the front panel 708. For example, similar to the examples in figures 77A, 77B, 78, 125A, 125B, 129, and 159, each optical / electrical communication interface 704 may be located a distance behind the front panel 708, and fiber optic patch cords or pigtails may connect the optical / electrical communication interface 704 to an optical connector on the front panel 708. In some examples, similar to the examples in figures 77A, 125A, and 159, the front panel 708 is configured to be removable or openable to allow for maintenance of the communication interface 704.

[0202] Figure 28A is a top view of an example data processing system 720, wherein a data processing chip 722 is mounted near an optical / electrical communication interface 724 to implement a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) between the data processing chip 720 and the optical / electrical communication interface 724. The data processing chip 722 is mounted on a first side of a circuit board 730 to serve as the front panel of a housing 732 of the system 720. In some examples, the data processing chip 722 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 730. The optical / electrical communication interface 724 is mounted on a second side of the circuit board 730, with the second side facing outwards from the housing 732. In this example, the optical / electrical communication interface 724 is mounted on the outside of the housing 732, allowing the optical fiber 734 to be easily coupled to the external optical / electrical communication interface 724 of the housing 732.

[0203] The housing 732 has side panels 736 and 738, a rear panel 740, a top panel, and a bottom panel. In some examples, the circuit board 730 is perpendicular to the bottom panel. In some examples, the angle of the circuit board 730 relative to the vertical direction of the bottom panel is in the range of -60° to 60°.

[0204] The optical / electrical communication interface 724 includes photonic integrated circuitry 726 mounted on a substrate 728 electrically coupled to a circuit board 730. The optical / electrical communication interface 724 is electrically coupled to a data processing chip 722 via an electrical connector or trace 742 passing through the circuit board 730 in the thickness direction. For example, the electrical connector or trace 742 may be configured as a through-hole in the circuit board 730. Similar to systems 630, 650, 680, and 700, the signal path between the data processing chip 722 and the optical / electrical communication interface 724 can be unidirectional or bidirectional.

[0205] Optical connector 744 is used to couple optical signals from optical fiber 734 to optical / electrical communication interface 724. Similar to systems 630, 650, 680 and 700, optical connector 744 can be securely or detachably connected to optical / electrical communication interface 724.

[0206] In some implementations, the optical / electrical communication interface 724 may resemble, for example, the integrated communication devices 448, 462, 466, and 472 of Figure 17. The optical signal from the optical fiber is processed by a photonic integrated circuit 726, which generates a serial electrical signal based on the optical signal. For example, the serial electrical signal is amplified by a set of transimpedance amplifiers and drivers (which may be part of the photonic integrated circuit 726 or a serializer / deserializer module in the data processing chip 722), and the drive output signal is transmitted to the serializer / deserializer module embedded in the data processing chip 722.

[0207] Optical connector 744 includes a first optical connector 746 and a second optical connector 748, wherein the second optical connector 748 is optically coupled to optical fiber 734. The first optical connector 746 may be similar to, for example, first optical connector component 213 (Figures 2 and 4), first optical connector 356 (Figures 11 and 12), first optical connector 404 (Figures 13 and 14), first optical connector component 456 (Figure 17), and first optical connector component 520 (Figure 32). The second optical connector 748 may be similar to second optical connector components 223 (Figures 2 and 4) and 458 (Figure 17). In some examples, optical connectors 746 and 748 may be formed as a single piece, such that the optical / electrical communication interface 724 is securely or permanently attached to the fiber bundle. In some examples, the optical connector is not attached perpendicularly to the photonic integrated circuit 726, but can be attached to the photonic integrated circuit in the same plane using methods such as V-groove fiber attachment, tapered or non-tapered fiber edge coupling, followed by a mechanism that guides the light at the interface with the photonic integrated circuit to a direction substantially perpendicular to the photonic integrated circuit, such as one or more substantially 90-degree steering mirrors, one or more substantially 90-degree flexible fibers, etc.

[0208] In some examples, the optical / electrical communication interface 724 is securely fixed (e.g., by soldering) to the circuit board 730. In some examples, the optical / electrical communication interface 724 is detachably connected to the circuit board 730, for example, through a mechanical mechanism of one or more snap-fit ​​or screw-in mechanisms. An advantage of system 720 is that, in the event of a failure of the optical / electrical communication interface 724, the faulty optical / electrical communication interface 724 can be replaced without opening the housing 732.

[0209] Figure 28B is a top view of an example of a data processing system 2800, similar to system 720 in Figure 28A, except that the circuit board 730 is recessed from the front panel 2802 of the housing 732 of system 2800, as shown in Figure 28A. Photonic integrated circuit 726 is optically coupled to a first optical connector 2806 attached to the inside of the front panel 2802 via fiber optic patch cords or pigtails 2804. The first optical connector 2806 is optically coupled to a second optical connector 2808, which is attached to the outside of the front panel 2802. The second optical connector 2808 is optically coupled to an external optical fiber 734.

[0210] The technique of using fiber optic patch cords or pigtails to optically couple photonic integrated circuits to optical connectors attached to the inside of the front panel can also be applied to the data processing system 700 of Figure 27. For example, the modified system may have a recessed substrate or circuit board, multiple co-packaged optical modules (e.g., 704) mounted on the opposite side of the data processing chip 702 relative to the substrate or circuit board, and fiber optic patch cords (e.g., 2804) optically coupling the co-packaged optical modules to the front panel.

[0211] In the examples shown in Figures 28A and 28B, similar to the example shown in Figure 150, the data processing chip 722 can be mounted on a substrate electrically coupled to the circuit board 730.

[0212] As illustrated in the examples of Figures 24, 25, 26, 27, and 28, optical / electrical communication interfaces 644, 652, 684, 704, and 724 can be electrically coupled to circuit boards 642, 654, 686, 706, and 730, respectively. Contacts include one or more spring-loaded elements, compression interposers, and / or planar grid arrays.

[0213] Figure 29A is an example diagram of a data processing system 750 including a vertically mounted circuit board 752, which implements a high-bandwidth data path (e.g., 1, 10, or more gigabits per second per data path) communication interface 760 between a data processing chip 758 and an optical / electrical communication interface 760. The data processing chip 758 and the optical / electrical communication interface 760 are mounted on the circuit board 752, with each data processing chip 758 electrically coupled to its corresponding optical / electrical communication interface 760. The data processing chips 758 are electrically coupled to each other via electrical connectors (e.g., electrical signal lines on one or more layers of the circuit board 752).

[0214] The data processing chip 758 can be similar to, for example, an electronic processor integrated circuit, a data processing chip or host application-specific integrated circuit 240 (Figures 2, 4, 6, 7, 11, 12), a digital application-specific integrated circuit 444 (Figure 17), a data processor 502 (Figure 20), a data processing chip 572 (Figures 22, 23), 640 (Figure 24), 670 (Figure 25), 681 (Figure 26), 702 (Figure 27), and 722 (Figure 28). Each data processing chip 758 can be, for example, a network switch, a central processing unit, a graphics processing unit, a tensor processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller, or an application-specific integrated circuit (ASIC).

[0215] Although the figure shows the optical / electrical communication interface 760 mounted on the side of the circuit board 752 facing the front panel 754, the optical / electrical communication interface 760 can also be mounted on the side of the circuit board 752 facing the interior of the housing 756. The optical / electrical communication interface 760 can be similar to integrated communication devices such as 210 (Figures 2, 3, 10), 252 (Figures 4, 5), 262 (Figure 6), integrated optical communication devices 282 (Figures 7-9), 374 (Figure 11), 382 (Figure 12), 390 (Figure 13), 428 (Figure 14), 402 (Figures 15, 16), 448, 462, 466, 472 (Figure 17), integrated communication devices 574 (Figure 22), 612 (Figure 23), and optical / electrical communication interfaces 644 (Figure 24), 652 (Figure 25), 684 (Figure 26), and 704 (Figure 27).

[0216] Circuit board 752 is located near the front panel 754 of housing 756, and optical signals are coupled to optical / electrical communication interface 760 through an optical path passing through an opening in the front panel 754. This allows the user to easily and detachably connect fiber optic cable 762 to input / output interface 760. The position and orientation of circuit board 752 relative to housing 756 can be similar to the position and orientation of circuit boards such as 654 (Figure 25) and 706 (Figure 27).

[0217] In some embodiments, the data processing system 750 may include various types of optical / electrical communication interfaces 760. For example, some optical / electrical communication interfaces 760 may be mounted on the same side of the circuit board 752 with the corresponding data processing chip 758, and some optical / electrical communication interfaces 760 may be mounted on the opposite side of the circuit board 752 with the corresponding data processing chip 758. Similar to the examples in Figures 2-8, 11-14, 20, 22, and 23, some optical / electrical communication interfaces 760 may include first and second serializer / deserializer modules, and the corresponding data processing chip 758 may include a third serializer / deserializer module. Similar to the example in Figure 17, some optical / electrical communication interfaces 760 may not include a serializer / deserializer module, and the corresponding data processing chip 758 may include a serializer / deserializer module. Some optical / electrical communication interfaces 760 may include multiple sets of transimpedance amplifiers and drivers, which may be embedded in the photonic integrated circuit or in a discrete chip outside the photonic integrated circuit. Some optical / electrical communication interfaces 760 do not include transimpedance amplifiers and drivers, while multiple sets of transimpedance amplifiers and drivers are included in the corresponding data processing chip 758. The data processing system 750 may also include an electrical communication interface connected to the electrical interface via cables, such as high-speed PCIe cables, Ethernet cables, or Thunderbolt™ cables. The electrical communication interface may include modules performing various functions, such as communication protocol conversion and / or signal conditioning.

[0218] Other types of connections may exist between circuit board 752 and other associated boards included in housing 756. For example, two or more circuit boards (e.g., vertically mounted circuit boards) may or may not be connected, which may include circuit board 752. For example, in cases where at least one other circuit board (e.g., vertically mounted in housing 756) is connected to circuit board 752, one or more connection technologies may be employed. For example, an optical / electrical communication interface (e.g., similar to optical / electrical communication interface 760) may be used to connect data processing chip 758 to other circuit boards. The interface used for such a connection may be mounted on the same side of circuit board 752 as the processing chip 758. In some embodiments, the interface may be located on another part of the circuit board (e.g., mounted on the side opposite to the processing chip 758). Connections may utilize other parts of circuit board 752 and / or one or more other circuit boards present in housing 756. For example, the interface may be located at the edge of one or more boards (e.g., vertically mounted circuit boards), and this interface may be connected to one or more other interfaces (e.g., optical / electrical communication interface 760, another edge-mounted interface, etc.). Through such connections, two or more circuit boards can connect, receive, and transmit signals, etc.

[0219] As shown in Figure 29A, circuit board 752 is placed near front panel 754. In some examples, similar to the examples in Figures 22-24, 26 and 28, circuit board 752 may also serve as the front panel.

[0220] Figure 29B is an example diagram of a data processing system 2000, illustrating some configurations and other functions described with respect to Figures 26A to 26C, 26, and 29A. System 2000 includes a vertically mounted printed circuit board 2002 (or, for example, a substrate) on which a data processing chip 2004 (e.g., an ASIC) is mounted, and a heat sink 2006 is thermally coupled to the data processing chip 2004. Optical / electrical communication interfaces are mounted on both sides of the printed circuit board 2002. Specifically, optical / electrical communication interface 2008 is mounted on the same side of the printed circuit board 2002 as the data processing chip 2004. In this example, optical / electrical communication interfaces 2010, 2012, and 2014 are mounted on opposite sides of the printed circuit board 2002. For transmitting and receiving signals (e.g., with other optical / electrical communication interfaces), each optical / electrical communication interface 2010, 2012, and 2014 is connected to optical fibers 2016, 2018, and 2020, respectively. For example, electrical connectors / receptacles can be mounted on one or more sides of the printed circuit board 2002 for transmitting and receiving electrical signals. In this example, two electrical connectors / receptacles 2022 and 2024 are mounted on the same side of the mounting data processing chip 2004 of the printed circuit board 2002, and two electrical connectors / receptacles 2026 and 2028 are mounted on opposite sides of the printed circuit board 2002. In this example, electrical connector 2028 is connected to (or includes) a timing module 2030, which provides various functions (e.g., data regeneration, data retiming, maintaining signal integrity, etc.). To transmit and receive electrical signals, each electrical connector / receptacle 2022 to 2028 is connected to electrical connection cables 2032, 2034, 2036, and 2038, respectively. The implementation of the connection cables can be one or more types; for example, jumper cables can be used to connect to one or more electrical connectors / receptacles 2022 to 2028.

[0221] In this example, system 2000 includes vertically mounted line cards 2040, 2042, and 2044. In this particular example, line card 2040 includes an electrical connection socket / connector 2046 connected to cable 2036, and line card 2042 includes an electrical connection socket / connector 2048 connected to cable 2032. Line card 2044 includes an electrical connection socket / connector 2050. Each line card 2040, 2042, and 2044 includes pluggable optical modules 2052, 2054, and 2056 (e.g., QSFP, QSFP-DD, XFP, SFP, CFP) that can implement various interface technologies.

[0222] In this particular example, printed circuit board 2002 approximates the front panel 2058 of system 2000; however, printed circuit board 2002 may be located at other locations within system 2000. Multiple printed circuit boards may also be included in system 2000. For example, a second printed circuit board 2060 (e.g., a backplane) is included in system 2000, and system 2000 is located approximately to the rear panel 2062. By positioning printed circuit board 2060 rearward, signals (e.g., data signals) can be sent to and received from other systems (e.g., another switch box) located at the rear of the same switch rack as system 2000 or elsewhere. In this example, a data processing chip 2064 is mounted on printed circuit board 2060 and can perform various operations (e.g., data processing, preparing data for transmission, etc.). Similar to the printed circuit board 2002 located at the front of system 2000, printed circuit board 2060 includes an optical / electrical communication interface 2066 (located on the same side of printed circuit board 2002 as data processing chip 2004) for communicating with optical / electrical communication interface 2008 via optical fiber 2068. Printed circuit board 2060 includes an electrical connection socket / connector 2070 that transmits and receives electrical signals to and from electrical connection socket / connector 2024 using electrical connection cable 2034. Printed circuit board 2060 can also communicate with other components of system 2000, such as one or more line cards. As shown, electrical connection socket / connector 2072 on printed circuit board 2060 transmits and / or receives electrical signals from electrical connection socket / connector 2050 of line card 2044 using electrical connection cable 2074. Similar to printed circuit board 2002, other parts of system 2000 may include timing modules. For example, line cards 2040, 2042, and 2044 may include timing modules (identified by the symbols “*”, “**”, and “***”, respectively). Similarly, the second circuit board 2060 may include timing modules, such as timing modules 2076 and 2078, for regenerating data, re-timing data, maintaining signal integrity, etc.

[0223] A feature of some of the systems described herein is that the system’s main data processing module, such as the switching chip in a switching server, and the communication interface module that supports the main data processing module, are configured for easy access by the user. In the examples shown in Figures 21 to 29B, 69A, 70, 71A, 72, 72A, 74A, 75A, 75C, 76, 77A, 77B, 78, 96 to 98, 100, 110, 112, 113, 115, 117 to 122, 125A to 127, 129, 136 to 149, 159, and 160, the main data processing module and the communication interface module are located on the front panel, the rear panel, or near both, and are easily accessible to the user through the front / rear panel. However, it can also be arranged according to the system's placement in the environment, including multiple racks of rack-mounted equipment (e.g., Figure 76 or Figure 86), where the communication interface of each rack-mounted equipment (e.g., a co-packaged optical module) can be easily accessed and the housing opened to expose internal components without removing the rack-mounted equipment.

[0224] In some implementations, for a single rack of a rack-mounted server with open space on the front, rear, left, and right sides, each rack-mounted server may house a first main data processing module and a communication interface module to support the first main data processing module near the front panel; a second main data processing module and a communication interface module to support the second main data processing module near the left panel; a third main data processing module and a communication interface module to support the third main data processing module near the right panel; and a fourth main data processing module and a communication interface module to support the fourth main data processing module near the rear panel. The heat dissipation solution, including the placement of fans and heat sinks, and the airflow configuration around the main data processing modules and communication interface modules, is adjusted accordingly.

[0225] For example, if the data processing server is installed on the ceiling of a room or vehicle, the main data processing module and communication interface module can be placed near the bottom panel for easy access. Similarly, if the data processing server is installed under the floor of a room or vehicle, the main data processing module and communication interface module can be placed near the top panel for easy access. The housing of the data processing system does not have to be box-shaped. For example, the housing can have curved walls, be shaped like the Earth, or have any three-dimensional shape.

[0226] Figure 30 is a block diagram illustrating an example of a data processing system 800, which may be similar to systems 200 (Figures 2 and 20), 250 (Figure 4), 260 (Figure 6), 280 (Figure 7), 350 (Figure 11), 380 (Figure 12), 390 (Figure 13), 420 (Figure 14), 560 (Figure 22), 600 (Figure 23), 630 (Figure 24), and 650 (Figure 25) described above. A first optical signal 770 is transmitted from an optical fiber to a photonic integrated circuit 772, which generates a first serial electrical signal 774 based on the first optical signal. The first serial electrical signal 774 is provided to a first serializer / deserializer module 776 to convert the first serial electrical signal 774 into a third parallel signal group 778. The first serializer / deserializer module 776 modulates the conversion of serial electrical signals into serial electrical signals, wherein the signal modulation method may include one or more of clock and data recovery and signal equalization. A third parallel signal group 778 is provided to the second serializer / deserializer module 780 to generate a fifth serial electrical signal 782 based on the third parallel signal group 778. The fifth serial electrical signal 782 is provided to the third serializer / deserializer module 784 to generate a seventh parallel signal group 786 for supply to the data processor 788.

[0227] In some embodiments, the photonic integrated circuit 772, the first serializer / deserializer module 776, and the second serializer / deserializer module 780 can be mounted on an interface module of an integrated communication device, an optical / electrical communication interface, or an input / output substrate. The first serializer / deserializer module 776 and the second serializer / deserializer module 780 can be implemented on a single chip. In some embodiments, the third serializer / deserializer module 784 can be embedded in the data processor 788, or the third serializer / deserializer module 784 can be separate from the data processor 788.

[0228] Data processor 788 generates an eighth parallel signal group 790, which is sent to a third serializer / deserializer module 784. The third serializer / deserializer module 784 generates a sixth serial electrical signal 792 based on the eighth parallel signal group 790. The sixth serial electrical signal 792 is used to provide a fourth parallel signal group 794 to a second serializer / deserializer module 780 based on the sixth serial electrical signal 792. The second serializer / deserializer module 780 can adjust the serial electrical signal 792 when converting to the fourth parallel electrical signal group 794. The fourth parallel signal group 794 is used to provide a second serializer / deserializer module 780, which generates a second serial electrical signal 796 based on the fourth parallel signal group 794 and sends it to the photonic integrated circuit 772. Integrated circuit 772 generates a second optical signal 798 based on a second serial electrical signal 796 and transmits the second optical signal 798 to an optical fiber. The first and second optical signals 770 and 798 can propagate on the same or different optical fibers.

[0229] One feature of system 800 is that the signal paths traversed by the first, fifth, sixth, and second serial electrical signals 774, 782, 792, and 796 are very short (e.g., less than 5 inches), which enables the first, fifth, sixth, and second serial electrical signals 782 and 792 to have high data rates (e.g., up to 50 Gbps).

[0230] Figure 31 is a block diagram of a high-bandwidth data processing system 810, similar to systems such as 680 (Figure 26), 700 (Figure 27), and 750 (Figure 29) described above. System 810 includes a data processor 812 for receiving signals from and transmitting signals to multiple photonic integrated circuits. System 810 includes a second photonic integrated circuit 814, a fourth serializer / deserializer module 816, a fifth serializer / deserializer module 818, and a sixth serializer / deserializer module 820. The operation of the second photonic integrated circuit 814 and the fourth serializer / deserializer module is described. The deserializer module 816, the fifth serializer / deserializer module 818, and the sixth serializer / deserializer module 820 can be similar to the first photonic integrated circuit 772, the first serializer / deserializer module 776, the second serializer / deserializer module 780, and the third serializer / deserializer module 784. The third serializer / deserializer module 784 and the sixth serializer / deserializer module 820 can be embedded in the data processor 812 or implemented on a separate chip.

[0231] In some examples, the data processor 812 processes the first data carried in the first optical signal received at the first photonic integrated circuit 772 and generates the second data carried in the fourth optical signal output from the second photonic integrated circuit 814.

[0232] In the examples in Figures 30 and 31, three serializer / deserializer modules are included between the photonic integrated circuit and the data processor. It is generally understood that the same principle can be applied to a system with only one serializer / deserializer module between the photonic integrated circuit and the data processor.

[0233] In some embodiments, the signal is transmitted unidirectionally from the photonic integrated circuit 772 to the data processor 788 (Figure 30). In this case, the first serializer / deserializer module 776 can be replaced by a serial-to-parallel converter, the second serializer / deserializer module 780 can be replaced by a parallel-to-serial converter, and the third serializer / deserializer module 784 can be replaced by a serial-to-parallel converter. In some embodiments, the signal is transmitted unidirectionally from the data processor 812 (Figure 31) to the second photonic integrated circuit 814. In this case, the sixth serializer / deserializer module 820 can be replaced by a parallel-to-serial converter, that is, the fifth serializer / deserializer module 818 can be replaced by a serial-to-parallel converter, and the fourth serializer / deserializer module 816 can be replaced by a parallel-to-serial converter.

[0234] Those skilled in the art will understand that the various embodiments described herein of optical coupling from one or more optical fibers, such as 226 (Figures 2 and 4) or 272 (Figures 6 and 7), to photonic integrated circuits, such as 214 (Figures 2 and 4), 264 (Figure 6), or 296 (Figure 7), can similarly couple light from photonic integrated circuits to one or more optical fibers. This reversibility of coupling direction is a general feature of at least some embodiments described herein, including some embodiments using polarization diversity methods.

[0235] The optical system examples disclosed herein should be considered only as a few of many possible embodiments among related optical elements, 3D waveguides, and 3D printed optical elements that can be used to perform polarization demultiplexing and independent array pattern scaling, array geometry rearrangement, spot size scaling, and adaptation of incident angles using diffraction, refraction, reflection, and polarization-dependent methods. The spirit of this disclosure also covers other implementations that achieve the same functionality.

[0236] For example, optical fibers can be coupled to the edge of photonic integrated circuits, such as using fiber edge couplers. Signal conditioning (e.g., time and data recovery, signal equalization, or encoding) can also be performed on serial signals, parallel signals, or both. Signal conditioning can also be performed during the conversion from serial to parallel signals.

[0237] In some implementations, the data processing system described above can be used in systems such as data center switching systems, supercomputers, Internet Protocol (IP) routers, Ethernet switching systems, graphics processing workstations, and systems that apply artificial intelligence algorithms.

[0238] In the example described above, where the accompanying drawings show a first serializer / deserializer module (e.g., 216) placed adjacent to the second serializer / deserializer module (e.g., 217), it can be understood that the bus processing unit 218 may be located between the first and second serializer / deserializer modules and perform, for example, the switching, rerouting, and / or encoding functions described above.

[0239] In some implementations, the aforementioned data processing system includes multiple data generators that generate large amounts of data, which are transmitted via optical fiber to a data processor for processing. For example, autonomous vehicles (e.g., cars, trucks, trains, ships, vessels, submarines, helicopters, drones, airplanes, space rovers, or spacecraft) or robots (e.g., industrial robots, assistive robots, surgical robots, delivery robots, educational robots, cleaning robots, cooking robots, construction robots, or entertainment robots) may include multiple high-resolution cameras and other sensors (e.g., LIDAR (light detection and ranging), radar) to generate images and other data with high data rates. The cameras and / or sensors may transmit video data and / or sensor data via optical fiber to one or more data processing modules. One or more data processing modules may use artificial intelligence techniques (e.g., using one or more neural networks) to identify individual objects, sets of objects, scenes, individual voices, sets of sounds, and / or situations in the vehicle environment and quickly determine appropriate actions to control the vehicle or robot.

[0240] Figure 34 is a flowchart of an example process for processing high-bandwidth data. Process 830 includes 832 receiving a plurality of first optical signals from a plurality of optical fibers through a plurality of channels. Process 830 includes 834 generating a plurality of first serial electrical signals based on the received optical signals, wherein each first serial electrical signal is generated based on one of the first optical signals from the plurality of channels. Process 830 includes 836 generating a plurality of first parallel electrical signals based on the plurality of first serial electrical signals, and adjusting electrical signals, wherein each group of first parallel electrical signals is generated based on a corresponding first serial electrical signal. Process 830 includes 838 generating a plurality of second serial electrical signals based on the plurality of first parallel electrical signal groups, wherein each second serial electrical signal is generated based on a corresponding first parallel electrical signal group.

[0241] In some embodiments, the data center includes multiple systems, each incorporating the disclosed techniques correspondingly described in Figures 22-29. Each system includes a vertically mounted printed circuit board, such as 570 (Figure 22), 610 (Figure 23), 642 (Figure 24), 654 (Figure 25), 686 (Figure 26), 706 (Figure 27), 730 (Figure 28), and 752 (Figure 29), used as a front panel of the housing or substantially parallel to the front panel. At least one data processing chip and at least one integrated communication device or optical / electrical communication interface are mounted on the printed circuit board. The integrated communication device or optical / electrical communication interface may incorporate the disclosed techniques correspondingly described in Figures 2-22 and 30-34. Each integrated communication device or optical / electrical communication interface includes photonic integrated circuitry that receives optical signals and generates electrical signals based on the optical signals. Optical signals are transmitted to photonic integrated circuits via one or more optical paths (or spatial paths), provided by (e.g., the core of an optical fiber cable), which can incorporate the techniques described in U.S. Patent Application No. 16 / 822,103. Furthermore, a connector structure can be used to arrange a large number of parallel optical paths (or spatial paths) in a two-dimensional array, which can incorporate the techniques described in U.S. Patent Application No. 16 / 816,171.

[0242] Figure 35A illustrates an optical communication system 1250 providing high-speed communication between a first chip 1252 and a second chip 1254. Similar to Figures 2-5 and 17, the optical communication system 1250 uses a co-packaged optical (CPO) interconnect module 1258. Both the first and second chips 1252 and 1254 can be high-capacity chips, such as high-bandwidth Ethernet switching chips. The first and second chips 1252 and 1254 communicate with each other via a fiber optic interconnect cable 1734 comprising multiple optical fibers. In some embodiments, the fiber optic interconnect cable 1734 may include optical fiber cores for transmitting data and control signals between the first and second chips 802 and 804. The fiber optic interconnect cable 1734 may also include one or more optical fiber cores for transmitting optical power or photonic supply to a photonic integrated circuit that provides the optoelectronic interface between the first and second chips 1252 and 1254. The fiber optic interconnect cable 1734 may include a single-core optical fiber or a multi-core optical fiber. Each single-core fiber consists of a cladding and a core, typically made of glass with different refractive indices, such that the cladding has a lower refractive index than the core, to establish a dielectric optical waveguide. Each multi-core fiber consists of a cladding and multiple cores, typically made of glass with different refractive indices, such that the cladding has a lower refractive index than the core. Furthermore, more complex refractive index distributions can be used, such as refractive index grooves, multiple refractive index distributions, or gradient-varying refractive index distributions. More complex geometries can also be used, such as non-circular cores or claddings, photonic crystal structures, photonic bandgap structures, or nested anti-resonant nodeless hollow core structures.

[0243] Figure 35A illustrates a switch-to-switch usage scenario. An external optical power supply or photon supply 1256 provides an optical power signal, which can be, for example, continuous wave light, one or more periodic optical pulses, or one or more aperiodic optical pulses. The power light is supplied from the photon supply 1256 to the co-packaged optical (CPO) interconnect module 1258 via optical fibers 1730 and 1732, respectively. For example, as described in U.S. Patent Application No. 16 / 847,705, the optical power supply 1256 can provide either continuous wave light or pulsed light for data modulation and synchronization. This allows the first chip 1252 to be synchronized with the second chip 1254.

[0244] For example, photon supplier 1256 may correspond to optical power supply 103 in Figure 1. Pulsed light from photon supplier 1256 may be provided to fiber optic link 102_6 of data processing system 200 in Figure 20. In some embodiments, photon supplier 1256 may provide a series of optical frame templates, each optical frame template including its own frame header and its own frame body, and the frame body including its own optical pulse sequence. Modulator 417 may load data into the corresponding frame body to convert the optical frame template sequence into a corresponding loaded optical frame sequence output through fiber optic link 102_1.

[0245] The implementation shown in Figure 35A uses the packaging scheme corresponding to Figure 35. Therefore, unlike Figure 17, substrates 454 and 460 are not used in Figure 17, and the photonic integrated circuit 464 is directly attached to the serializer / deserializer module 446. Figure 35C shows an implementation similar to Figure 5, in which the photonic integrated circuit 464 is directly attached to the serializer / deserializer 216.

[0246] Figure 36 illustrates an example of an optical communication system 1260 that uses an optoelectronic co-package interconnect module 1258 similar to that shown in Figure 35A, enabling high-speed communication between a high-capacity chip 1262 (e.g., an Ethernet switch chip) and multiple low-capacity chips 1264a, 1264b, 1264c (e.g., multiple network interface cards (NICs) connected to a computer server). The high-capacity chip 1262 communicates with the low-capacity chips 1264a, 1264b, 1264c via a high-capacity fiber optic interconnect cable 1740, which then branches into several low-capacity fiber optic interconnect cables 1742a, 1742b, 1742c, which are connected to the low-capacity chips 1264a, 1264b, 1264c respectively. This example illustrates a switch-to-server approach.

[0247] An external optical power supply or photon supply 1266 provides an optical power supply signal, which can be such as continuous wave light, one or more periodic optical pulses, or one or more aperiodic optical pulses. Power supply light is supplied from the photon supply 1266 to the optical interconnect module 1258 via optical fibers 1744, 1746a, 1746b, and 1746c, respectively. For example, the optical power supply 1266 can be used for data modulation and synchronization pulsed light, as described in U.S. Patent Application No. 16 / 847,705. This allows high-capacity chips 1262 to be synchronized with low-capacity chips 1264a, 1264b, and 1264c.

[0248] Figure 37 illustrates an example of an optical communication system 1270 that uses a co-packaged optical interconnect module 1258 similar to that shown in Figure 35 and incorporates a conventional pluggable optical interconnect module 1272, enabling high-speed communication between a high-capacity chip 1262 (e.g., an Ethernet switch chip) and multiple low-capacity chips 1264a, 1264b (e.g., multiple network interface cards (NICs) connected to a computer server).

[0249] An external optical power supply or photon supply 1274 provides an optical power supply signal, which can be such as continuous wave light, one or more periodic optical pulses, or one or more aperiodic optical pulses. For example, the optical power supply 1274 can be used for data modulation and synchronization pulsed light, as described in U.S. Patent Application No. 16 / 847,705. This allows the high-capacity chip 1262 to be synchronized with the low-capacity chips 1264a and 1264b.

[0250] Some aspects of systems 1250, 1260 and 1270 are described in more detail in conjunction with figures 79 to 84B.

[0251] Figure 43 shows an exploded view of an example of a front-end module 860 of a data processing system, which includes a vertically mounted printed circuit board 862 (or a substrate made of, for example, organic or ceramic material), a host-specific application integrated circuit 864 mounted on the back of the circuit board 862, and a heat sink 866. In some examples, the host-specific application integrated circuit 864 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the circuit board 862. The front-end module 860 may be the front panel of a data processing system housing (similar to the configuration shown in Figures 26A and 28A) or located near the front panel of the housing (similar to the configuration shown in Figures 27 and 28B). Three optical modules with connectors, such as 868a, 868b, and 868c, are shown in the figure, collectively referred to as 868. Additional optical modules with connectors may also be used. The data processing system may be similar to, for example, data processing system 680 (Figure 26A) or 700 (Figure 27). Printed circuit board 862 may resemble printed circuit board 683 (Figure 26) or 708 (Figure 27). Application-specific integrated circuit 864 may resemble application-specific integrated circuit 681 (Figure 26) or 702 (Figure 27). Heat sink 866 may resemble heat sink 576 (Figure 23). Optical modules with connectors 868 each include optical module 880 (see Figures 44 and 45) and mechanical connector structure 900 (see Figures 46 and 47). Optical module 880 may resemble optical / electrical communication interface 682 (Figure 26) or 704 (Figure 27), or integrated optical communication device 512 of Figure 32.

[0252] An optical module with connector 868 can be inserted into a first mesh structure 870, which can serve as (i) a heat dissipation device / heat sink and (ii) a mechanical fixing device for the optical module with connector 868. The first mesh structure 870 includes a receiver array, each receiver capable of receiving the optical module with connector 868. During assembly, the first mesh structure 870 is connected to a printed circuit board 862. This is achieved by clamping the printed circuit board 862 between the first mesh structure 870 and a second structure 872 (e.g., a second mesh structure) located on the opposite side of the printed circuit board 862, and by connecting the first mesh structure 870 to the printed circuit board 862 (e.g., by using screws). A heat dissipation via between the first mesh structure 870 and the second structure 872 allows heat to be conducted from the front of the printed circuit board 862 to a heat sink 866 on the back of the printed circuit board 862. An additional heat sink can also be directly mounted on the first mesh structure 870 to provide front-end cooling.

[0253] Printed circuit board 862 includes electrical contacts 876 for electrically connecting to the detachable optical module 868 with connector 868 when the detachable optical module 868 with connector 868 is inserted into the first mesh structure 870. The first mesh structure 870 may include an opening 874 located on the other side of the printed circuit board 862 where the host application-specific integrated circuit 864 is mounted, so that components such as voltage regulators, filters, and / or decoupling capacitors can be mounted on the printed circuit board 862 in the lateral proximity to the host application-specific integrated circuit 864.

[0254] In some examples, host-specific application integrated circuitry 864 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to a circuit board 862, similar to the examples shown in Figures 136-159. The substrate may be similar to substrate 13602 in Figures 136-159, the second grid structure 872 may be similar to the rear grid structure 13626, the circuit board 862 may be similar to a printed circuit board 13604, the host-specific application integrated circuitry 864 may be similar to a data processing chip 12312, and the heat sink 866 may be similar to a heat dissipation device 13610. Except that the first grid structure 870 includes mechanisms for coupling to a removable optical module having a connector 868, the first grid structure 870 may have an overall shape similar to the front grid structure 13606 in Figures 136-159.

[0255] Figures 44 and 45 show an exploded view and an assembled view of an example optical module 880, which may be similar to the integrated optical communication device 512 in Figure 32. The optical module 880 includes an optical connector component 882 (which may be similar to the first optical connector 520 in Figure 32), which may receive light directly or through (e.g., geometrically wider) an optical connector component 884 from an optical fiber embedded in a second optical connector component (not shown in Figures 44 and 45), which may be similar to an optical connector component 268 such as in Figures 6 and 7. In the example shown in Figures 44 and 45, an optical fiber matrix, such as a 2×18 fiber, may be optically coupled to the optical connector component 882. The optical fiber matrix may have other configurations, such as 3×12, 1×12, 3×12, 6×12, 12×12, 16×16, or 32×32 fiber arrays. For example, the optical connector component 882 may have a configuration similar to the fiber coupling region 430 in Figure 15 for coupling with 2x18 fibers or any other number of fibers. The upper connector component 884 may also include alignment structures 886 (e.g., holes, recesses, posts) to receive corresponding mating structures of the second optical connector component.

[0256] Optical module 880 can have any of a variety of configurations, including silicon photonic integrated optics, indium phosphide integrated optics, one or more vertical-cavity surface-emitting lasers (VCSELs), one or more direct-detection optical receivers, or one or more coherent optical receivers. Optical module 880 can include any optical module, a co-packaged optical module, an integrated optical communication device (e.g., 448, 462, 466, or 472 of Figure 17, or 210 of Figure 20), an integrated communication device (e.g., 612 of Figure 23), or an optical / electrical communication interface described in this specification and in documents incorporated herein by reference (e.g., 684 of Figure 26, 724 of Figure 28, or 760 of Figure 29).

[0257] Optical connector component 882 is inserted through opening 888 of substrate 890 and optically coupled to photonic integrated circuit 896 mounted on the underside of substrate 890. Substrate 890 may be similar to substrate 514 in Figure 32. Photonic integrated circuit 896 may be similar to photonic integrated circuit 524. First serializer / deserializer chip 892 and second serializer / deserializer chip 894 are mounted on substrate 890, with chip 892 located on the same side of optical connector component 882 and chip 894 located on the other side. First serializer / deserializer chip 892 may include circuitry similar to that of third serializer / deserializer module 398 and fourth serializer / deserializer module 400 in Figure 32. Second serializer / deserializer chip 894 may include circuitry similar to that of first serializer / deserializer module 394 and second serializer / deserializer module 396. Second board 898 (which may be similar to second board 518 in Figure 32). It can be disposed on the underside of substrate 890 to provide a detachable connection to a packaging substrate (e.g., 230).

[0258] Figures 46 and 47 show exploded and assembled views, respectively, of the mechanical connector structure 900 constructed around the functional optical module 880 in Figures 44 and 45. In this exemplary embodiment, the mechanical connector structure 900 includes a lower mechanical component 902 and an upper mechanical component 904 for receiving the optical module 880 together. Both the lower mechanical connector component 902 and the upper mechanical connector component 904 can be made of thermally formed - conductive and rigid materials, such as metal.

[0259] In some embodiments, the upper mechanical component 904 is in thermal contact with the first serializer / deserializer chip 892 and the second serializer / deserializer chip 894 on its lower side. The upper mechanical component 904 is also in thermal contact with the lower mechanical component 902. The lower mechanical component 902 includes a removable latching mechanism, for example, two inwardly resiliently bendable wings 906 (the movement of the wings 906 is indicated by double arrows 908 in Figure 47), and each wing 906 includes a tongue 910 on its outer side.

[0260] Figure 48 is a schematic diagram of a portion of the first mesh structure 870 and the circuit board 862. In some examples, a substrate (e.g., a ceramic substrate) may be used instead of the circuit board 862. A recess 920 is provided on the wall of the first mesh structure 870. As shown, the printed circuit board 862 (or substrate) has electrical contacts 876 that can be electrically coupled to electrical contacts on the second plate 898 of the optical module 880. For example, the electrical contacts 876 may include an array of electrical contacts having at least four columns and four rows. For example, the electrical contact array may have ten or more columns or rows of electrical contacts. The electrical contacts 876 may be arranged in any two-dimensional pattern and need not be arranged in columns and rows. The circuit board 862 (or substrate) may also have three-dimensional features, such as on protruding or recessed elements, and the electrical contacts may be disposed on the three-dimensional features. The optical module with connector 868 may have three-dimensional features with electrical contacts that match the three-dimensional features corresponding to the electrical contacts on the circuit board 862 (or substrate).

[0261] Referring to Figure 49, when the lower mechanical component 902 is inserted into the first mesh structure 870, the tongue 910 (on the wing 906 of the lower mechanical component 902) can engage with the corresponding groove 920 within the first mesh structure 870 to mechanically hold the position of the optical module 880. The position of the tongue 910 on the wing 906 is chosen such that when the mechanical connector structure 900 and the optical module 880 are inserted into the first mesh structure 870, the electrical connector at the bottom of the second board 898 is electrically coupled to the electrical contact 876 on the printed circuit board 862 (or substrate). For example, the second board 898 may include a spring-loaded contact that mates with the contact 876.

[0262] Figure 50 shows a front view of the assembled front module 860. Three optical modules (e.g., 868a, 868b, 868c) with connectors are inserted into the first mesh structure 870. In some embodiments, the optical modules 880 are arranged in a checkerboard pattern, wherein adjacent optical modules 880 and their corresponding mechanical connector structures 900 are rotated 90 degrees so that any two wings do not contact each other. This facilitates the disassembly of individual modules. In this example, the optical module with connector 868a is rotated 90 degrees relative to the optical modules with connectors 868b and 868c.

[0263] Figure 51A shows a first side view of the mechanical connector structure 900. Figure 51B shows a cross-sectional view of the mechanical connector structure 900 along plane 930 in Figure 51A. In some examples, in contrast to removable modules, compression inserts (e.g., spring-loaded contacts) may be a component of a receiving structure (e.g., mounted on a circuit board or substrate).

[0264] Figure 52A shows a first side view of the mechanical connector structure 900 installed within the first mesh structure 870. Figure 52B shows a cross-sectional view of the mechanical connector structure 900 installed within the first mesh structure 870 along plane 940 in Figure 52A.

[0265] Figure 53 illustrates an example of an assembly 958 including an optical fiber cable 956, which includes a plurality of optical fibers, an optical fiber connector 950, a mechanical connector module 900, and a first mesh structure 870. The optical fiber connector 950 can be inserted into the mechanical connector module 900, which can be further inserted into the first mesh structure 870. A printed circuit board 862 (or substrate) is attached to the first mesh structure 870, wherein electrical contacts 876 face electrical contacts 954 on the bottom side of a second board 898 optical module 880.

[0266] Figure 53 shows the components before connection. Figure 54 shows the components after connection. The fiber optic connector 950 includes a locking mechanism 952 that prevents the mechanical connector module 900 from engaging, thereby locking the mechanical connector structure 900 and the optical module 880 into place. In this exemplary embodiment, the locking mechanism 952 includes a stud inserted between the wing 906 and the upper mechanical component 904 in the mechanical connector module 900 onto the fiber optic connector 950, thus preventing the wing 906 from elastically bending inward and thus securing the mechanical connector structure 900 and the optical module 880. Furthermore, the mechanical connector structure 900 includes a mechanism for holding the fiber optic connector 950 in place, such as a ball-mounted positioning mechanism shown in the figure. When the fiber optic connector 950 is inserted into the mechanical connector structure 900, a spring-loaded ball 962 on the fiber optic connector 950 engages with a brake 964 in the wing 906 of the mechanical connector structure 900. The spring pushes the ball 962 against the brake 964 and secures the fiber optic connector 950.

[0267] To detach the optical module 880 from the first mesh structure 870, the user can pull the fiber optic connector 950 and disengage the ball 962 from the actuator 964. The user can then bend the wing 906 inward to disengage the tongue 910 from the groove 920 on the wall of the first mesh structure 870.

[0268] Figures 55A and 55B show perspective views of the mechanism shown in Figures 53 and 54 before the fiber optic connector is inserted into the mechanical connector structure. As shown in Figure 55B, the lower side of the optical connector 950 includes an alignment structure 960 that mates with an alignment structure 886 (Figure 44) on the upper connector component 884 of the optical module 880. Figure 55B also shows a photonic integrated circuit 896 and a second plate 898 including electrical contacts (e.g., spring-loaded electrical contacts).

[0269] Figure 56 shows a perspective view of the optical module 880 and mechanical connector structure 900 inserted into the first mesh structure 870, wherein the fiber optic connector 950 is also separated from the mechanical connector structure 900.

[0270] Figure 57 shows a perspective view of the optical fiber connector 950 mating with the mechanical connector structure 900, which locks the optical module 880 within the mechanical connector structure 900.

[0271] Figures 58A to 58D illustrate alternative embodiments in which the optical module with connector 970 includes a latching mechanism 972 that acts as a mechanical fastener to connect the optical module 880 to a printed circuit board 862 (or substrate) that supports the first mesh structure 870. Figures 58A and 58B show various views of an optical module with connector 970 including latching mechanism 972. Figures 58C and 58D show various views of an optical module with connector 970 coupled to printed circuit board 862 (or substrate) and first mesh structure 870. For example, a user can easily attach or detach the optical module with connector 970 by pressing lever 974 that activates latching mechanism 972. Lever 974 is constructed in a way that does not obstruct the removal of optical fiber (not shown) from the optical module with connector 970. Alternatively, an external tool can be used as a detachable lever.

[0272] Figure 59 is a schematic diagram of an example of an optical module 1030 including an optical engine with a latching mechanism for compressing and attaching the optical engine to a printed circuit board. Module 1030 is similar to the example shown in Figure 58B, but without the use of a compression inserter. Figures 60A and 60B show how the latching mechanism is used to secure (with sufficient compressive force) and remove the optical engine.

[0273] Figures 60A and 60B illustrate exemplary embodiments of the lever 974 and latching mechanism 972 in the optical module 1030. Figure 60A shows an example where the lever 974 is pushed downward, causing the latching mechanism 972 to latch onto a support structure 976, which may be part of a first mesh structure 870. Figure 60B shows an example where the lever 974 is pulled upward, causing the latching mechanism 972 to release from the support structure 976.

[0274] Figure 61 is an example diagram of a fiber optic cable connection design 980 including nested fiber optic cables and a co-encapsulated optical module connection. In this design, a co-encapsulated optical module 982 is detachably coupled to a co-encapsulated optical port 1000 formed in a support structure such as a first mesh structure 870, and a fiber optic connector 983 is detachably coupled to the co-encapsulated optical module 982. The fiber optic connector 983 is coupled to a fiber optic cable 996 comprising multiple optical fibers. The fiber optic cable connection can be designed to be compatible, for example, with Multi-fiber Termination Push-on (MTP / MPO) or with emerging standards. Multi-fiber push-on (MPO) connectors are commonly used for terminating multi-fiber ribbon connections in indoor environments and conform to IEC-61754-7; EIA / TIA-604-5 (FOCIS 5) standards.

[0275] In some embodiments, the co-packaged optical module 982 includes a mechanical connector structure 984 and a smart optical component 986. The smart optical component 986 includes, for example, photonic integrated circuitry (e.g., 896 in Figure 44) and beam guiding, power distribution, polarization management, optical filtering, and other beam management functions preceding the photonic integrated circuitry. These components may include, for example, optical couplers, waveguides, polarization optics, filters, and / or lenses. Other examples of components that may be included in the co-packaged optical module 982 are described in U.S. Patent Application 16 / 816,171. The mechanical connector structure 984 includes one or more fiber optic connector latches 988 and one or more co-packaged optical module latches 990. Mechanical connector structure 984 is insertable into common package optical port 1000 (e.g., formed in first mesh structure 870), wherein common package optical module latch 990 engages a recess 992 in the wall of first mesh structure 870, thereby securing common package optical module 982 to common package optical port 1000, such that electrical contacts on smart optical component 986 of common package optical port 1000 are electrically coupled to electrical contacts 876 on printed circuit board 862 (or substrate). When fiber optic connector 983 is inserted into mechanical connector structure 984, fiber optic connector latch 988 engages a recess 994 in fiber optic connector 983, thus securing fiber optic connector 983 to common package optical module 982 and optically coupling fiber optic cable 996 to smart optical component 986, for example, through all optical paths in fiber optic connector 983.

[0276] In some examples, the fiber optic connector 983 includes a guide pin 998 that inserts into a hole in the smart optics assembly 986 to improve the alignment between optical components (e.g., waveguides and / or lenses) in the fiber optic connector 983 and optical components (e.g., optical couplers and / or waveguides) in the smart optics assembly 986. In some examples, the guide pin 998 may be chamfered or elliptical in shape to reduce wear.

[0277] In some embodiments, after the fiber optic connector 983 is installed in the co-encapsulated optical module 982, the fiber optic connector 983 prevents the co-encapsulated optical module latch 990 from bending inward, thereby preventing the co-encapsulated optical module 982 from being inserted into or released from the co-encapsulated optical port 1000. To couple the fiber optic cable 996 to the data processing system, the co-encapsulated optical module 982 is first inserted into the co-encapsulated optical port 1000 without passing through the fiber optic connector 983, and then the fiber optic connector 983 is inserted into the mechanical connector structure 984. To remove the fiber optic cable 996 from the data processing system, the fiber optic connector 983 can be detached from the mechanical connector structure 984, while the co-encapsulated optical module 982 remains coupled to the co-encapsulated optical port 1000.

[0278] In some implementations, the nested connection latch may be designed to allow the co-packaged optical module 982 to be inserted into or removed from the co-packaged optical port 1000 when the fiber optic cable is connected to the co-packaged optical module 982.

[0279] Figures 62 and 63 show cross-sectional views of an example of a fiber optic cable connection design 1010 including nested fiber optic cables and a co-packaged optical module connection. Figure 62 shows an example of a fiber optic connector 1012 detachably coupled to a co-packaged optical module 1014. Figure 63 shows an example of a fiber optic connector 1012 detached from the co-packaged optical module 1014.

[0280] Figures 64 and 65 show additional cross-sectional views of the fiber optic cable connection design 1010. The cross-section is formed along a plane perpendicularly cut through the middle of the components shown in Figures 62 and 63. Figure 64 shows an example of fiber optic connector 1012 detachably coupled to co-packaged optical module 1014. Figure 65 shows an example of fiber optic connector 1012 being separated from co-packaged optical module 1014.

[0281] The following describes a rack unit thermal architecture for a rack-mount system (e.g., 560 in Figure 22, 600 in Figure 23, 630 in Figure 24, 680 in Figure 26, 720 in Figure 28, 750 in Figure 29, and 860 in Figure 43) comprising a data processing chip mounted on a vertically oriented circuit board (e.g., 572 in Figures 22 and 23, 640 in Figure 24, 681 in Figure 26, 722 in Figure 28, 758 in Figure 29, and 864 in Figure 43), the circuit board being substantially perpendicular to the bottom surface of the system housing or enclosure. In some embodiments, the rack unit thermal architecture uses air cooling to remove heat generated by the data processing chip. In these systems, the heat-generating data processing chip is located near the input / output interface, which may include one or more of the integrated optical communication devices 448, 462, 466, or 472 as shown in Figure 17, the integrated communication device 574 as shown in Figure 22 or 23, the optical / electrical communication interfaces 644, 684, 724, or 760 as shown in Figures 24, 26, 28, or 29, or an optical module with the connector 868 shown in Figure 43. These are located on or near the front panel to allow the user easy connection / disconnection of the optical transceiver to / from the rack-mount system. The rack unit thermal architecture described in this specification includes mechanisms for increasing airflow through the data processing chip or the heatsink surface thermally coupled to the data processing chip, taking into account that a large portion of the front panel surface area needs to be allocated to the input / output interface.

[0282] The rack-mount systems and rack-mount devices described in this document may include, but are not limited to, rack-mount computer servers, rack-mount network switches, rack-mount controllers, and rack-mount signal processors.

[0283] Referring to Figure 67, a data server 1140 suitable for installation in a standard server rack may include a housing 1042 having a front panel 1034, a rear panel 1036, a bottom panel 1038, a top panel, and side panels 1040. For example, the housing 1042 may have the dimensions of two rack units (RUs), approximately 482.6 mm (19 inches) wide and two rack units high. One rack unit is approximately 44.45 mm (approximately 1.75 inches). A printed circuit board 1042 is mounted on the bottom panel 1038, and at least one data processing chip 1044 is electrically coupled to the printed circuit board 1042. A microcontroller unit 1046 controls various modules, such as a power supply 1048 and an exhaust fan 1050. In this example, the exhaust fan 1050 is mounted on the rear panel 1036. For example, a single-mode optical connector 1052 is located on the front panel 1034 for connection to an external fiber optic cable. An optical interconnect cable 1036 is interposed between a single-mode optical connector 1052 and at least one data processing chip 1044 for signal transmission. An exhaust fan 1050 mounted on the rear panel 1036 directs airflow from the front to the rear of the housing 1042; the direction of airflow is indicated by arrow 1058. Hot air inside the housing 1042 is exhausted from the housing 1042 through the exhaust fan 1050 on the rear panel 1036. In this example, the front panel 1034 does not include any fan, thereby maximizing the area available for the single-mode optical connector 1052.

[0284] For example, the data server 1300 may be a network switching server, and at least one data processing chip 1044 may include at least one switching chip configured to process data with a total bandwidth of, for example, approximately 51.2 Tbps. The at least one switching chip 1044 may be mounted on a substrate 1054 with dimensions, for example, approximately 100 mm × 100 mm, and a common-package optical module (CPO) 1056 may be mounted near the edge of the substrate 1054. The CPO 1056 converts input optical signals received from the optical interconnect cable 1036 into input electrical signals provided to the at least one switching chip 1044, and converts output electrical signals from the at least one switching chip 1044 into output optical signals provided to the optical interconnect cable 1036. When any CPO 1056 fails, the user needs to remove the network switching server 1030 from the server rack and open the housing 1042 to repair or replace the faulty CPO 1056.

[0285] Referring to Figures 68A and 68B, in some embodiments, the rack-mount server 1060 includes a housing or enclosure 1062 having a front panel 1064 (or front panel), a rear panel 1036, a bottom panel 1038, a top panel, and side panels 1040. For example, the enclosure 1062 may have a form factor of 1RU, 2RU, 3RU, or 4RU, with a width of approximately 482.6 mm (19 inches) and a height of 1, 2, 3, or 4 rack units. A first printed circuit board 1066 is mounted on the bottom panel 1038, and a microcontroller unit 1046 is electrically coupled to the first printed circuit board 1066 to control various modules, such as a power supply 1048 and an exhaust fan 1050.

[0286] In some embodiments, the front panel 1064 includes a second printed circuit board 1068 oriented in a vertical direction, for example, substantially perpendicular to the first circuit board 1066 and the bottom panel 1038. Hereinafter, the second printed circuit board 1068 is referred to as the vertical printed circuit board 1068. The figures show the second printed circuit board 1066 forming part of the front panel 1064, but in some examples, the second printed circuit board 1066 may also be attached to the front panel 1064, wherein the front panel 1064 includes openings allowing input / output connectors to pass through. The second printed circuit board 1066 includes a first side facing forward relative to the housing 1062 and a second side facing rearward relative to the housing 1062. At least one data processing chip 1070 is electrically coupled to the vertical second-side printed circuit board 1068, and a heat dissipation device or heat sink 1072 is thermally coupled to at least one data processing chip 1070. In some examples, at least one data processing chip 1070 is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the printed circuit board 1068. Figure 68C is a perspective view of an example of a heat dissipation device or radiator 1072. For example, the heat dissipation device 1072 may include a heat sink thermally coupled to a heat sink. An exhaust fan 1050 mounted on the rear panel 1036 directs air from the front to the rear of the housing 1042. The direction of airflow is indicated by arrow 1078. Hot air within the housing 1042 is exhausted from the housing 1042 by the exhaust fan 1050 at the rear panel 1036.

[0287] A co-packaged optical module 1074 (also referred to as an optical / electric communication interface) is attached to the first side of the vertical printed circuit board 1068 (i.e., the side facing the front exterior of the housing 1062) for connecting an external fiber optic cable 1076 . Each fiber optic cable 1076 may include a fiber optic array. By placing the co-packaged optical module 1074 on the outside of the front panel 1064 , the user can conveniently maintain (e.g., repair or replace) the co-packaged optical module 1074 when required. Each co-packaged optical module 1074 is used to convert and convert an input optical signal received from an external fiber optic cable 1076 into an input electrical signal transmitted to at least one data processing chip 1070 via a signal line in or on a vertical printed circuit board 1068 . The co-packaged optical module 1074 also converts an output electrical signal from at least one data processing chip 1070 into an output optical signal to be provided to an external fiber optic cable 1076 . Hot air within the housing 1062 is discharged from the housing 1062 by means of an exhaust fan 1050 mounted on the rear panel 1036 .

[0288] For example, at least one data processing chip 1070 may include a network switch, a central processing unit, a graphics processor unit, a tensor processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller, or an application-specific integrated circuit (ASIC). Rack-mounted servers may be, but are not limited to, for example, rack-mounted computer servers, rack-mounted switches, rack-mounted controllers, rack-mounted signal processors, rack-mounted storage servers, rack-mounted multipurpose processing units, rack-mounted graphics processors, rack-mounted tensor processors, rack-mounted neural network processors, or rack-mounted artificial intelligence accelerators. For example, each co-packaged optical module 1074 may include an integrated optical communication device 448 , 462 , 466 or 472 in Figure 17 , integrated optical communication device 210 , and 23 in Figure 20 Optical / electric communication interfaces 684, 724, 760, integrated optical communication equipment 512 in Figure 32, or optical module 868 having connectors in diagram 43 of integrated communication equipment 612 , 26 , 28 , 29 . For example, each fiber optic cable 1076 may include fiber 226 (Figures 2, 4), 272 (Figures 6, 7), 582 (Figures 22, 23), or 734 (Figure 28) or fiber optic cable 762 (Figure 762), 956 (Figure 53), or 996 (Figure 61).

[0289] For example, the co-packaged optical module 1074 may include a first optical connector component (e.g., 456 of Figure 17, 578 of Figures 22 and 23, or 746 of Figure 28) for detachably coupling to a second optical connector component (e.g., 458 of Figure 17, 580 of Figures 22 and 23, or 748 of Figure 28) attached to an external fiber optic cable 1076. For example, the co-packaged optical module 1074 includes photonic integrated circuitry optically coupled to the first optical connector component (e.g., 450, 464, 468, or 474 of Figure 17, 586 of Figure 22, 618 of Figure 23, or 726 of Figure 28). The photonic integrated circuitry receives an input optical signal from the first optical connector component and generates an input electrical signal based on the input optical signal. At least a portion of the input electrical signal generated by the photonic integrated circuitry is transmitted to at least one data processing chip 1070 via signal lines in or on a vertical printed circuit board 1068. For example, the photonic integrated circuit can be used to receive output electrical signals from at least one data processing chip 1070 and generate output optical signals based on the output electrical signals. The output optical signals are transmitted to an external fiber optic cable 1076 through first and second optical connector components.

[0290] In some examples, the fiber optic cable 1076 may include, for example, 10 or more fiber cores, and the first optical connector component is used to couple 10 or more optical signal channels to the photonic integrated circuit. In some examples, the fiber optic cable 1076 may include 100 or more fiber cores, and the first optical connector component is used to couple 100 or more optical signal channels to the photonic integrated circuit. In some examples, the fiber optic cable 1076 may include 500 or more fiber cores, and the first optical connector component is used to couple 500 or more optical signal channels to the photonic integrated circuit. In some examples, the fiber optic cable 1076 may include 1000 or more fiber cores, and the first optical connector component is used to couple 1000 or more optical signal channels to the photonic integrated circuit.

[0291] In some embodiments, photonic integrated circuits can be used to generate first serial electrical signals based on received optical signals, wherein each first serial electrical signal is generated based on a first optical signal from one of the channels. Each co-packaged optical module 1074 may include a first serializer / deserializer module, which includes a serializer unit and a deserializer unit, wherein the first serializer / deserializer module is used to generate a plurality of first parallel electrical signal groups based on the first serial electrical signal and to adjust the electrical signals, wherein each first parallel electrical signal group is generated based on a corresponding first serial electrical signal. Each co-packaged optical module 1074 may include a second serializer / deserializer module, which includes a serializer unit and a deserializer unit, wherein the second serializer / deserializer module is used to generate second serial electrical signals based on the first parallel electrical signal groups, wherein each second serial electrical signal is generated based on a corresponding first parallel electrical signal group.

[0292] In some examples, the rack-mount server 1060 may include four or more co-packaged optical modules 1074 for detachable coupling to a second optical connector assembly attached to a corresponding fiber optic cable 1076. For example, the rack-mount server 1060 may include 16 or more co-packaged optical modules 1074 for detachable coupling to a second optical connector assembly attached to a corresponding fiber optic cable 1076. In some examples, each fiber optic cable 1076 may include 10 or more fiber cores. In some examples, each fiber optic cable 1076 may include 100 or more fiber cores. In some examples, each fiber optic cable 1076 may include 500 or more fiber cores. In some examples, each fiber optic cable 1076 may include 1000 or more fiber cores. Each fiber can transmit one or more channels of optical signal. For example, at least one data processing chip 1070 may include a network switch for receiving data from an input port associated with a first optical signal channel and forwarding the data to one of the output ports associated with a second optical signal channel.

[0293] In some implementations, the co-packaged optical module 1074 is detachably coupled to the vertical printed circuit board 1068. For example, the co-packaged optical module 1074 may be electrically coupled to the vertical printed circuit board 1068 using electrical contacts, spring-loaded elements, compression interposers, or planar grid arrays.

[0294] Referring to Figures 69A and 69B, in some embodiments, rack server 1080 includes a housing 1082 having a front panel 1084. Rack server 1080 is similar to rack server 1060 in Figure 68A, except that one or more fans are mounted on the front panel 1084 and one or more air vents are installed in the housing 1082 to direct airflow to a cooling system. For example, rack server 1080 may include a first inlet fan 1086a mounted on the left side of the front panel 1084 of the vertical printed circuit board 1068, and a second inlet fan 1086b mounted on the right side of the front panel 1084 of the vertical printed circuit board 1068. The terms "right" and "left" refer to the relative positions of the components shown in the figures. It will be understood that, depending on the orientation of the device having the first and second modules, the first module located "left" or "right" of the second module may actually be "right" or "left" of the second module (or any other relative position). The inlet and exhaust fans operate in a push-pull configuration, with inlet fans 1086a and 1086b (collectively referred to as 1086) drawing cool air into housing 1082, while exhaust fan 1050 expels hot air from housing 1082. The inlet fan 1086 in the front panel or chassis 1064 and the exhaust fan 1050 on the rear of the rack create a pressure gradient through the housing or chassis to improve air cooling compared to a standard 1RU implementation including a rear exhaust fan.

[0295] In some embodiments, left-side air louvers 1088a and right-side air louvers 1088b are mounted in housing 1082 to direct airflow to heat dissipation device 1072. Air louvers 1088a and 1088b (collectively referred to as 1088) separate spaces within housing 1082 and force air to flow from inlet fans 1086a and 1086b, across the surface of the heat sink fins of heat dissipation device 1072, and toward the opening 1090 between the distal ends of air louvers 1088. The airflow direction 1086b near inlet fans 1086a and 1086b is indicated by arrows 1092a and 1092b. Air louvers 1088 increase the amount of air flowing across the heat sink surface and improve heat dissipation efficiency. The heat sink fins are oriented to extend along a plane substantially parallel to the bottom surface 1038 of housing 1082. For example, air louvers 1088 may have a curved shape, such as an S-shape as shown. The curved shape of the air louver 1088 maximizes the efficiency of the radiator. In some examples, the air louver 1088 can also have a linear shape.

[0296] For example, the heatsink can be a plate-fin heatsink, a pin-fin heatsink, or a plate-pin-fin heatsink. The pins can have a square or circular cross-section. The heatsink configuration (e.g., pin spacing, pin or fin length) and vent configuration can be designed to optimize heatsink efficiency.

[0297] For example, the co-packaged optical module 1074 can be electrically coupled to the vertical printed circuit board 1068 using electrical contacts including spring-loaded elements, compression inserts, or planar grid arrays. For example, when using a compression interposer, the vertical circuit board 1068 can be positioned such that the face of the compression interposer of the co-packaged optical module 1074 is coplanar with the panel 1064 and the inlet fan 1086.

[0298] Referring to Figure 70, in some embodiments, rack-mount server 1090 is similar to rack-mount server 1080 in Figure 69, including an inlet fan mounted on the front panel. Compared to the inlet fan of rack-mount server 1080, the inlet fan of rack-mount server 1090 rotates slightly to improve heatsink efficiency. The rotation axis of the inlet fan is not parallel to the front-rear direction relative to housing 1082, but can rotate slightly inward. For example, the rotation axis of the left inlet fan 1092a can rotate slightly clockwise, while the rotation axis of the right inlet fan 1092b can rotate slightly counterclockwise to enhance airflow across the heatsink surface, further improving heat dissipation efficiency.

[0299] In some embodiments, heat dissipation efficiency can be improved by further placing the vertical circuit board 1068 and the heat dissipation device 1072 toward the rear of the housing, so that a larger amount of air flows over the surface of the heat sink of the heat dissipation device 1072.

[0300] Referring to Figures 71A to 71B, the rack-mount server 1100 includes a housing 1102 with a front panel or panel 1104, wherein the panel 1104 provides a portion of the housing containing the compression interposer of the co-packaged optical module 1074, at a distance d relative to the original panel 1104. The panel 1104 has a recessed portion or insertion portion 1106, which is offset from the rear of the housing 1102 by a distance d (referred to as the "front panel insertion distance") relative to other portions of the front panel 1104 (e.g., the portions mounting the inlet fans 1086a and 1086b). The insertion portion 1106 is referred to as an "embedded front panel," "embedded panel," "front panel insertion," or "panel insertion." A vertical printed circuit board 1068 is attached to the insertion portion 1106, which includes an opening through which the co-packaged optical module 1074 can pass. The insertion portion 1106 has sufficient area to accommodate the co-packaged optical module 1074.

[0301] By providing an insertion portion 1106 in the front panel 1104, the heat sink of the heat dissipation device 1072 can be more optimally positioned closer to the main airflow generated by the inlet fan 1086, while maintaining the maintainability 1074 of the co-packaged optical module, for example, allowing the user to repair or replace a damaged co-packaged optical module 1074 without opening the housing 1102. The heat sink configuration (e.g., pin pitch, pin or heat sink length) and vent configuration can be designed to optimize heat sink efficiency. Furthermore, the front panel insertion distance d can also be optimized to improve heat sink efficiency.

[0302] Referring to Figure 72, in some embodiments, rack-mount server 1110 is similar to rack-mount server 1100 in Figure 71, except that server 1110 includes a heatsink 1112, wherein, compared to Figure 71, heatsinks 1114a and 1114b extend beyond the edge of the vertical printed circuit board 1068 and are closer to the inlet fans 1086a and 1086b. The configuration of the heatsinks (e.g., the shape, size, and number of heatsinks) can be adjusted to maximize heat dissipation efficiency.

[0303] Referring to Figures 73A and 73B, in some embodiments, the rack-mount server 1120 includes a housing 1122 having a front panel 1124, a rear panel 1036, a bottom panel 1038, a top panel, and side panels 1040. The width and height of the housing 1122 may be similar to those of the housing 1062 in Figure 68A. The server 1120 includes a first printed circuit board 1066 extending parallel to the plane of the bottom panel 1038, and one or more vertical printed circuit boards, such as 1126a and 1126b (collectively referred to as 1126), mounted perpendicular to the first printed circuit board 1066. The server 1120 includes one or more inlet fans 1086 mounted on the front panel 1124 and one or more exhaust fans 1050 mounted on the rear panel 1036. Airflow within the housing 1122 is generally in a front-to-back direction. The direction of airflow is indicated by arrow 1134.

[0304] Each vertical printed circuit board 1126 has a first surface and a second surface. The first surface defines the length and width of the vertical printed circuit board 1126. The distance between the first and second surfaces defines the thickness of the vertical printed circuit board 1126. The vertical printed circuit boards 1126a or 1126b are oriented such that the first surface extends substantially parallel to the front-rear direction plane of the housing 1122. At least one data processing chip 1128a or 1128b is electrically coupled to the first surface of the vertical printed circuit board 1126a or 1126b, respectively. In some examples, at least one data processing chip 1128a or 1128b is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the printed circuit board 1126a or 1126b. Heat dissipation devices 1130a or 1130b are thermally coupled to at least one data processing chip 1128a or 1128b, respectively. The heat dissipation device 1130 includes a heat sink extending along a plane substantially parallel to the bottom panel 1038 of the housing 1122. Heat sinks 1130a and 1130b are located behind inlet fans 1086a and 1086b, respectively, to maximize airflow through the heatsink and / or pins of heat sink 1130.

[0305] At least one co-packaged optical module 1132a or 1132b is mounted on the second side of the vertical printed circuit board 1126a or 1126b, respectively. The co-packaged optical module 1132 is optically coupled to an optical interface (not shown) mounted on the front panel 1124 via an optical interconnect link. The optical interface is optically coupled to an external fiber optic cable. The orientation of the vertical printed circuit board 1126 and the heat sink of the heat dissipation device 1130 can be appropriately adjusted to maximize heat dissipation efficiency.

[0306] Referring to Figures 74A to 74B, in some embodiments, rack-mount server 1150 includes vertical printed circuit boards 1152a and 1152b (collectively referred to as 1152) having surfaces extending along a plane substantially parallel to the front-rear direction relative to the housing or enclosure, similar to vertical printed circuit boards 1126a and 1126b in Figure 73. Rack-mount server 1150 includes housing 1154 having an improved front panel or panel 1156 with insertion portions 1158 for improving accessibility and field maintainability of co-packaged optical modules 1160a and 1160b (collectively referred to as 1160), which are respectively mounted on vertical printed circuit boards 1152a and 1152b. Insertion portions 1158 are referred to as "front panel insertions" or "panel insertions." The insertion portion 1158 has a width w, which is appropriately adjusted to enable hot-swapping and field maintainability of the co-packaged optical module 1160, thereby avoiding the need to stop service when the rack-mounted server 1150 is being maintained.

[0307] For example, the insertion portion 1158 includes a first wall 1162, a second wall 1164, and a third wall 1166. The first wall 1162 is substantially parallel to the second wall 1164, and the third wall 1166 is located between the first wall 1162 and the second wall 1164. For example, the first wall 1162 extends in a direction substantially parallel to the front-rear direction relative to the housing 1122. A vertical printed circuit board 1152a is attached to the first wall 1162 of the insertion portion 1158, and a vertical printed circuit board 1152b is attached to the first wall 1162 of the insertion portion 1158. The first wall 1162 includes an opening that allows a co-packaged optical module 1160a to pass through, and the second wall 1164 includes an opening that allows the co-packaged optical module 1160b to pass through. For example, an inlet fan 1086c can be mounted on the third wall 1166.

[0308] Each vertical printed circuit board 1152 has a first surface and a second surface. The first surface defines the length and width of the vertical printed circuit board 1152. The distance between the first and second surfaces defines the thickness of the vertical printed circuit board 1152. Vertical printed circuit boards 1152a or 1152b are oriented such that the first surface extends substantially parallel to a plane in the front-rear direction of the housing 1154. At least one data processing chip 1170a or 1170b is electrically coupled to the first surface of the vertical printed circuit board 1152a or 1152b, respectively. In some examples, at least one data processing chip 1170a or 1170b is mounted on a substrate (e.g., a ceramic substrate), and the substrate is attached to the printed circuit board 1152a or 1152b. Heat dissipation devices 1168a or 1168b are thermally coupled to at least one data processing chip 1170a or 1170b, respectively. Heat dissipation device 1168 includes a heat sink extending along a plane substantially parallel to the bottom panel 1038 of the housing 1154. Heat sinks 1168a and 1168b are located behind intake fans 1086a and 1086b, respectively, to maximize airflow through the heat sinks and / or pins of heat sinks 1168a and 1168b.

[0309] Referring to Figures 75A to 75B, in some embodiments, the rack-mount server 1180 includes a housing 1182 having a front panel 1184 with an insertion portion 1186 (referred to as a "front panel insertion" or "panel insertion"). For example, the insertion portion 1186 includes a first wall 1188 and a second wall 1190, oriented to facilitate easier connection or disconnection of fiber optic cables (e.g., 1076) from the server 1180 or the co-packaged optical module 1074. For example, the first wall 1188 may be at an angle θ1 relative to the nominal plane 1192 of the front panel 1184, where 0 < θ1 < 90°. The second wall 1190 may be at an angle θ2 relative to the nominal plane 1192 of the front panel, where 0 < θ2 < 90°. Angles θ1 and θ2 may be the same or different. The nominal plane 1192 of the front panel 1184 is perpendicular to the side panels 1040 and the bottom panel.

[0310] For example, a first vertical printed circuit board 1152a is attached to a first wall 1188, and a second vertical printed circuit board 1152b is attached to a second wall 1190. Compared to rack-mount servers 1060, 1080, and 1100 in Figures 68A, 69A, and 71, rack-mount server 1180 has a larger front panel area due to its angled front panel insert and can connect to more fiber optic cables.

[0311] Positioning the first and second walls 1188 and 1190 at angles between 0° and 90° relative to the nominal plane of the front panel improves accessibility and field maintainability of the co-packaged optical modules. Comp...

Claims

1. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region, wherein at least one of the following (i) the front panel includes a circuit board and the data processor is mounted on the circuit board, or (ii) the circuit board is positioned behind the front panel and oriented substantially parallel to the front panel, wherein an angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°, and the data processor is mounted on the circuit board.

2. The device as claimed in claim 1, wherein the first region is within 10 inches behind the front panel.

3. The device as claimed in claim 2, wherein the first region is within 8 inches behind the front panel.

4. The apparatus of claim 1, wherein the data processor is mounted on a substrate and the substrate is electrically coupled to the circuit board.

5. The apparatus of claim 1, wherein the front panel includes the circuit board and the data processor is mounted on the circuit board.

6. The apparatus of claim 1, comprising the circuit board located behind the front panel and oriented substantially parallel to the front panel, and the data processor mounted on the circuit board.

7. The apparatus of claim 5, wherein the data processor is mounted on a rear side of the circuit board, a plurality of photonic integrated circuits are electrically coupled to a front side of the circuit board, and each photonic integrated circuit is optically coupled to a corresponding optical connector.

8. The apparatus of claim 5, wherein the active airflow control module includes one or more inlet fans installed in the first region where the data processor is located.

9. The apparatus of claim 8, wherein each inlet fan is oriented such that an axis of rotation of the inlet fan forms an angle θ with respect to a front-rear direction, the angle being measured on a plane parallel to the bottom panel, and θ ≤ 45°.

10. The apparatus of claim 9, wherein θ ≤ 25°.

11. The apparatus of claim 10, wherein θ ≤ 5°.

12. The apparatus of claim 8, wherein each inlet fan is oriented such that an axis of rotation of the inlet fan forms an angle θ with respect to a plane of the front panel, the angle being measured on a plane parallel to the bottom panel, and θ ≤ 45°.

13. The apparatus of claim 12, wherein θ ≤ 25°.

14. The apparatus of claim 13, wherein θ ≤ 5°.

15. The apparatus of claim 8, including a heat dissipation device thermally coupled to the aforementioned data processor.

16. The apparatus of claim 15, wherein the heat dissipation device is located in the first region.

17. The apparatus of claim 16, comprising a second heat dissipation device located behind the first region, wherein the second heat dissipation device is also thermally coupled to the data processor.

18. The apparatus of claim 17, wherein the second heat dissipation device has a heat dissipation surface area that is larger than the heat dissipation surface area of ​​the first heat dissipation device.

19. The apparatus of claim 15, comprising one or more air louvers, wherein the one or more inlet fans and the one or more air louvers direct air toward the heat dissipation device, and wherein the one or more inlet fans and the one or more air louvers are designed to enhance heat dissipation.

20. The apparatus of claim 15, wherein the one or more inlet fans generate one or more positive pressure zones at at least one of a first zone to the left of the heat sink or a second zone to the right of the heat sink.

21. The apparatus of claim 15, wherein the active airflow control module includes one or more inlet fans installed in the first region where the data processor is located; wherein the one or more inlet fans generate one or more positive pressure zones at at least one location in a first region to the left of the heat sink or a second region to the right of the heat sink, wherein at least a portion of the first region is located within the first region and at least a portion of the second region is located within the first region; wherein the apparatus includes one or more outlet fans installed in a second region within 12 inches of the rear panel, wherein the one or more outlet fans generate one or more negative pressure zones behind the heat sink.

22. The apparatus as claimed in claim 21, comprising: The aforementioned one or more air louvers guide air along an airflow path passing through the aforementioned heat dissipation device from the aforementioned one or more positive pressure areas to the aforementioned one or more negative pressure areas.

23. The apparatus of claim 22, wherein the airflow path passes through the heat dissipation device in a direction substantially parallel to the front panel and reaches more than half the length of the heat dissipation device, and the angle between the direction of the airflow path and a main surface of the front panel is in the range of -5° to 5°.

24. The apparatus of claim 1, wherein a main surface of the data processor is oriented at an angle relative to a main surface of the front panel, and the angle is in the range of -45° to 45°.

25. The apparatus of claim 24, wherein the aforementioned angle is in the range of -5° to 5°.

26. An apparatus according to any one of claims 1 to 25, comprising the aforementioned data processor, wherein the data processor comprises at least one of the following: a network switch, a central processing unit, a graphics processing unit, a digital signal processor, a digital signal processing unit, a digital transfer processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller or an application-specific integrated circuit (ASIC), or a data storage device.

27. The apparatus of any one of claims 1 to 25, wherein the data processor comprises an integrated circuit or a single-chip system comprising at least one million transistors.

28. The apparatus of any one of claims 1 to 25, comprising the circuit board, the data processor, and a plurality of photonic integrated circuits electrically coupled to the circuit board, wherein each photonic integrated circuit is optically coupled to a corresponding optical connector.

29. The apparatus of claim 28, wherein the data processor is capable of processing data from the photonic integrated circuit at a rate of at least 25 gigabit per second.

30. The apparatus of claim 28, wherein the data processor and the photonic integrated circuit are configured to consume at least 100 watts of power continuously for at least ten minutes during operation.

31. The apparatus of claim 30, wherein the data processor and the photonic integrated circuit are configured to consume at least 600 watts of power continuously for at least ten minutes during operation.

32. The apparatus of claim 30, wherein the apparatus is configured to remove heat generated by the data processor and the photonic integrated circuit to maintain the temperature of the data processor and the photonic integrated circuit not exceeding 160°F when the ambient temperature outside the housing is in the range of 62°F to 82°F.

33. The apparatus of claim 31, wherein the apparatus is configured to remove heat generated by the data processor and the photonic integrated circuit to maintain the temperature of the data processor and the photonic integrated circuit not exceeding 160°F when the ambient temperature outside the housing is in the range of 62°F to 82°F.

34. The apparatus of claim 30, comprising a plurality of laser light modules configured to provide a plurality of light sources to the photonic integrated circuit; wherein the data processor, the photonic integrated circuit, and the laser light modules are configured to consume at least 200 watts of power continuously for at least ten minutes during operation.

35. The apparatus of claim 34, wherein at least one of the data processor, the photonic integrated circuit and the laser module is configured to consume at least 700 watts of power continuously for at least ten minutes during operation.

36. The apparatus of claim 34, wherein the apparatus is configured to remove heat generated by the data processor, the photonic integrated circuit and the laser module to maintain the temperature of the data processor and the photonic integrated circuit not exceeding 160°F when the ambient temperature outside the housing is in the range of 62°F to 82°F.

37. The apparatus of claim 36, wherein the apparatus is configured to remove heat generated by the data processor, the photonic integrated circuit and the laser module to maintain the temperature of the data processor and the photonic integrated circuit not exceeding 160°F when the ambient temperature outside the housing is in the range of 62°F to 82°F.

38. The apparatus of any one of claims 1 to 25, wherein a first surface of the circuit board faces a forward direction relative to the housing, a second surface of the circuit board faces a rearward direction relative to the housing; at least one co-packaged optical module is coupled to the first surface of the circuit board; and the data processor is electrically coupled to the second surface of the circuit board.

39. The apparatus of claim 38, wherein the at least one co-packaged optical module includes a first optical connector component configured to be removably coupled to a second optical connector component, the second optical connector component being attached to a first optical fiber cable, the first optical fiber cable including an optical fiber array.

40. The apparatus of claim 39, wherein the at least one co-packaged optical module includes a photonic integrated circuit, the photonic integrated circuit being optically coupled to the first optical connector component and configured to receive an input optical signal from the first optical connector component and generate an input electrical signal based on the input optical signal.

41. The apparatus of claim 40, wherein at least a portion of the input electrical signal generated by the aforementioned photonic integrated circuit is transmitted to the aforementioned data processor.

42. The apparatus of claim 39, wherein the optical fiber cable comprises at least 10 optical fiber cores, and the first optical connector component is configured to couple at least 10 optical signal channels to the photonic integrated circuit.

43. The apparatus of claim 42, wherein the optical fiber cable comprises at least 1,000 optical fiber cores, and the first optical connector component is configured to couple at least 1,000 optical signal channels to the photonic integrated circuit.

44. The apparatus of claim 40, wherein the photonic integrated circuit is configured to generate a plurality of first serial electrical signals based on the received optical signal, wherein each first serial electrical signal is generated based on one of the first optical signal channels; wherein, The aforementioned at least one co-packaged optical module includes: a first serializer / deserializer module, comprising a plurality of serializer units and deserializer units, wherein the first serializer / deserializer module is configured to generate a plurality of first parallel electrical signal groups based on the plurality of first serial electrical signals and to adjust the electrical signals, and each first parallel electrical signal group is generated based on a corresponding first serial electrical signal; and a second serializer / deserializer module, comprising a plurality of serializer units and deserializer units, wherein the second serializer / deserializer module is configured to generate a plurality of second serial electrical signals based on the plurality of first parallel electrical signal groups, and each second serial electrical signal is generated based on a corresponding first parallel electrical signal group.

45. The apparatus of claim 38, wherein the at least one co-packaged optical module is electrically coupled to the circuit board using an electrical contact comprising at least one of a spring-loaded element, a compression insert, or a planar grid array.

46. ​​The apparatus of claim 38, wherein the active airflow control module includes a first inlet fan and a second inlet fan, the first inlet fan being located to the left of the at least one co-packaged optical module and the second inlet fan being located to the right of the at least one co-packaged optical module.

47. The apparatus of claim 38, wherein the at least one co-packaged optical module includes a photonic integrated circuit mounted on a substrate, and the substrate is electrically coupled to the circuit board.

48. The apparatus of any one of claims 1 to 25, wherein the housing includes an outer casing for the rack-mounted device, and the rack-mounted device has an n rack unit form factor, where n is an integer ranging from 1 to 8.

49. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region, wherein the active airflow control module includes one or more inlet fans mounted in the first region where the data processor is located, and each of the one or more inlet fans is oriented such that the axis of rotation of the inlet fan forms an angle θ relative to a plane of the front panel, the angle θ being measured on a plane parallel to the bottom panel, and θ ≤ 45°.

50. The apparatus of claim 49, wherein θ ≤ 25°.

51. The apparatus of claim 50, wherein θ ≤ 5°.

52. The apparatus of claim 49, wherein the front panel includes a circuit board and the data processor is mounted on the circuit board.

53. The apparatus of claim 49 includes a circuit board attached to the aforementioned front panel, and the aforementioned data processor is mounted on the aforementioned circuit board.

54. The device of claim 49, wherein the first region is within 10 inches behind the front panel.

55. The device of claim 54, wherein the first region is within 8 inches behind the front panel.

56. The apparatus of claim 49, comprising a circuit board located behind the front panel and oriented substantially parallel to the front panel, wherein the angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°, and the data processor is mounted on the circuit board.

57. The apparatus of claim 53, wherein the data processor is mounted on a rear side of the circuit board attached to the front panel, a plurality of photonic integrated circuits are electrically coupled to a front side of the circuit board through openings in the front panel, and each photonic integrated circuit is optically coupled to a corresponding optical connector.

58. The apparatus of any one of claims 49 to 57 includes the data processor described above, wherein the data processor includes at least one of the following: a network switch, a central processing unit, a graphics processing unit, a digital signal processing unit, a digital signal processing unit, a data processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller or an application-specific integrated circuit (ASIC), or a data storage device.

59. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first zone within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first zone; wherein a main surface of the data processor is oriented at an angle relative to a main surface of the front panel, and the angle is in the range of -45° to 45°.

60. The apparatus of claim 59, wherein the aforementioned angle is in the range of -5° to 5°.

61. The apparatus of claim 60, comprising a circuit board located behind the front panel and oriented substantially parallel to the front panel, wherein the angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°, and the data processor is mounted on the circuit board.

62. The apparatus of any one of claims 59 to 61 includes the data processor described above, wherein the data processor includes at least one of the following: a network switch, a central processing unit, a graphics processing unit, a digital signal processing unit, a digital signal processing unit, a neural network processor, an artificial intelligence accelerator, a digital signal processor, a microcontroller or an application-specific integrated circuit (ASIC), or a data storage device.

63. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to be optically coupled to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region; a circuit board disposed in the first region, wherein the data processor and a plurality of photonic integrated circuits are electrically coupled to the circuit board, each photonic integrated circuit being optically coupled to a corresponding optical connector, the data processor being capable of processing data from the photonic integrated circuits at a rate of at least 25 gigabits per second, and the data processor and the photonic integrated circuits being configured to consume at least 600 watts of power continuously for at least ten minutes during operation; The aforementioned active airflow control module is configured to remove the heat generated by the data processor and the photonic integrated circuit, so that when the ambient temperature outside the housing is in the range of 62°F to 82°F, the temperature of the data processor and the photonic integrated circuit does not exceed 160°F.

64. An apparatus for processing data, the apparatus comprising: A rack-mount device having n rack unit form factors, where n is an integer ranging from 1 to 8, the rack-mount device comprising: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein the distance between the front panel and the rear panel is at least 24 inches, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region, the active airflow control module being configured to deliver cooler air from outside the housing through an opening in the front panel to the data processor during device operation to help remove heat from the data processor; wherein the active airflow control module includes at least one inlet fan located in an airflow path between the opening in the front panel and the data processor. In the airflow path from the at least one inlet fan to the data processor, the data processor is a first heat-generating device having a heat sink in the airflow path; a circuit board located behind the front panel and oriented substantially parallel to the front panel, wherein the angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°, and the data processor is mounted on the circuit board; and; wherein the active airflow control module includes at least one outlet fan mounted on the rear panel or within 12 inches of the rear panel and configured to deliver hot air from inside the housing to the outside of the housing through an opening in the rear panel.

65. An apparatus for processing data, the apparatus comprising: A rack-mount device having n rack unit form factors, where n is an integer ranging from 1 to 8, the rack-mount device comprising: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and side panels, wherein the distance between the front panel and the rear panel is at least 24 inches, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to be optically coupled to an optical fiber interconnect cable; a circuit board located in a first region within 12 inches behind the front panel within the housing and oriented substantially parallel to the front panel, wherein an angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°; and a data processor electrically coupled to the circuit board, the data processor having a main surface oriented substantially parallel to the main surface of the circuit board, wherein an angle between the main surface of the data processor and the main surface of the circuit board is in the range of -5° to 5°. A plurality of photonic integrated circuits electrically coupled to the aforementioned circuit board, wherein each photonic integrated circuit is optically coupled to a corresponding optical connector; wherein the aforementioned data processor is capable of processing data from the aforementioned photonic integrated circuits at a rate of at least 25 gigabit per second; wherein the aforementioned data processor and the aforementioned photonic integrated circuits are configured to consume at least 600 watts of power continuously for at least a portion of the time during operation; an active airflow control module is configured to actively control airflow in the aforementioned first region within 12 inches behind the aforementioned front panel within the aforementioned housing to optimize heat dissipation from the aforementioned data processor and the aforementioned photonic integrated circuits located in the aforementioned first region, the active airflow control module being configured to deliver cooler air from outside the aforementioned housing through an opening in the aforementioned front panel to the aforementioned data processor and the aforementioned photonic integrated circuits during operation of the aforementioned data processor and the aforementioned photonic integrated circuits to help remove heat from the aforementioned data processor and the aforementioned photonic integrated circuits.

66. The apparatus of claim 65, wherein the active airflow control module includes at least one inlet fan located in a first airflow path between the opening in the front panel and the data processor; wherein the at least one inlet fan is located in a second airflow path between the opening in the front panel and the photonic integrated circuit; wherein in the first airflow path from the active airflow control module to the data processor, the data processor is a first heat-generating device having a heat sink in the first airflow path; and in the airflow path to the data processor, the data processor is a first heat-generating device having a heat sink in the airflow path; wherein... In the second airflow path from the active airflow control module to the photonic integrated circuit, the photonic integrated circuit is the first heat-generating device with a heat sink in the second airflow path.

67. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein the distance between the front panel and the rear panel is at least 24 inches, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region, the active airflow control module including at least one inlet fan; and one or more air louvers configured to guide cooler air from the at least one inlet fan to the data processor to remove heat from the data processor.

68. An apparatus for processing data, the apparatus comprising: A rack-mount device includes: a housing configured to be mounted in a server rack, wherein the housing includes a front panel, a rear panel, a bottom panel, a top panel, and a side panel, wherein a plurality of optical connectors are mounted on the front panel, each optical connector being configured to optically couple to an optical fiber interconnect cable; and an active airflow control module configured to actively control airflow in a first region within 12 inches behind the front panel within the housing to optimize heat dissipation from a data processor located in the first region, wherein at least one of the following is true: (i) the front panel includes a circuit board, and the data processor is mounted on the circuit board; (ii) a circuit board is attached to the front panel, and the data processor is mounted on the circuit board; or (iii) the circuit board is positioned behind the front panel and oriented substantially parallel to the front panel, wherein an angle between a main surface of the circuit board and a main surface of the front panel is in the range of -5° to 5°, and the data processor is mounted on the circuit board; Wherein, a main surface of the aforementioned data processor is oriented at a certain angle relative to a main surface of the aforementioned front panel, and the aforementioned angle is in the range of -45° to 45°.

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