Reactor system operating method and reactor system

Abstract

The provided method is a method for operating a reactor system to provide wafer temperature gradient control. The method includes operating a center temperature sensor, an intermediate temperature sensor, and an edge temperature sensor to sense a temperature of a central block, a temperature of an intermediate block, and a temperature of an edge block of a wafer on a pedestal within a reaction chamber of the reactor system. A controller processes the temperatures of the center, intermediate, and edge blocks of the wafer to generate control signals based on a predefined temperature gradient for the wafer. A first, second, and third set of heater lamps operate based on the temperatures of the center, intermediate, and edge blocks to heat the center, intermediate, and edge blocks of the wafer. The reactor system is also described.

Description

[Technical Field]

[0001] This disclosure generally relates to methods and systems for controlling wafer temperature in semiconductor processing or reactor systems, and more particularly to methods and apparatus for controlling actual wafer temperature at different locations on a wafer, and its use in heating control of temperature gradients of a wafer in semiconductor processing or reactor systems. [Previous Technology]

[0002] Semiconductor processing, including chemical vapor deposition (CVD), is a well-known process for forming thin films of material on a substrate, such as a silicon wafer. In a CVD process, gaseous molecules of the material to be deposited are supplied to the wafer to form a thin film of that material on the wafer by means of a chemical reaction. Such formed thin films can be polycrystalline, amorphous, or epitaxial. Typically, CVD processes are performed at elevated temperatures to accelerate the chemical reaction and produce high-quality films, and some of these processes (such as epitaxial silicon deposition or epitaxial (EPI) growth) are performed at high temperatures (e.g., greater than 900 °C).

[0003] During a typical CVD process, one or more wafers are placed on a wafer support (or "base") inside a chamber (or "reaction chamber") within the reactor. Both the wafer and the base are heated to a desired temperature. In a typical wafer handling step, reactant gases are passed over the heated wafer, causing a thin layer of the desired material to be deposited on the surface of the wafer. If the deposited layer has the same crystalline structure as the underlying silicon wafer, it is called an epitaxial or EPI layer (or a single-crystal layer, because it has only one crystal structure). These layers are then incorporated into integrated circuits through subsequent processes.

[0004] To ensure high-quality layers during CVD and other deposition processes, various process parameters must be carefully controlled, with wafer temperature being one of the most critical. For example, during CVD, wafer temperature governs the rate at which material is deposited on the wafer, as the deposition gas reacts and deposits on the wafer at a specific temperature. If the temperature varies across the wafer surface (e.g., a non-uniform temperature gradient), uneven film deposition can occur, and the physical properties on the wafer surface may be non-uniform. Furthermore, in epitaxial deposition, even slight temperature non-uniformity can lead to unintended crystal slip. In the semiconductor industry, because wafers are typically divided into individual wafers with integrated circuits on them, it is important that material is deposited on the wafer with uniform thickness and properties. If CVD processes or other deposition steps produce non-uniform deposited layers, devices in different areas of the wafer may have inconsistent operating characteristics or may fail completely.

[0005] To achieve the desired temperature, the wafer (or substrate) is heated using resistance heating, induction heating, or radiative heating. Because radiative heating is the most efficient technique, it is currently the preferred method for many types of deposition processes, including CVD processes. Radiative heating involves positioning infrared lamps around or within a reaction chamber or reactor, and the lamps are typically provided in a lamp array adjacent to the surface of the wafer or substrate on which the material to be deposited. However, one problem with using radiative heating is that in some deposition processes, the use of localized radiative energy sources or lamps, and the resulting focusing and interference effects, can cause non-uniform temperature distributions or temperature gradients (including hot spots) along the wafer surface.

[0006] Figure 1 illustrates a conventional configuration for CVD and other deposition processes within a reaction chamber 100. As shown, a wafer 110 is situated on a pedestal 120, its edges supported and in abutting contact with a pedestal support 122. During epitaxial growth, for example, the wafer 110 and the pedestal 120 are heated by thermal radiation, while the pedestal 120, spaced apart from the bag 140, and the receiving wafer 110 are rotated about a center extending through a rotational support axis 130. Since the contact area between the wafer edge and the pedestal support 122 is at the distal edge of the wafer 110, the temperature distribution is typically non-uniform (or a temperature gradient is generated), with the central wafer temperature (Twafer center) differing from the wafer edge temperature (Twafer edge). If this temperature gradient is large enough, it can impact the quality of the grown epitaxial film, such as by generating slip defects and achieving poor thickness or resistivity uniformity.

[0007] Slip is the crystallographic drift of atomic layers caused by tensile stress exceeding the wafer's yield strength. The presence of slip dislocations in a wafer is detrimental because such dislocations can cause wafer warping, leading to substrate loss due to pattern misalignment from the device. Dislocation networks are caused by undesirable large temperature gradients across the wafer's upper surface during EPI growth and other deposition processes. For example, slip can occur above 1050 °C in a typical p / p-epitaxy wafer. The length and density of slip are strongly dependent on the EPI deposition temperature and time, and thermally stress-induced slip is typically strongly dependent on temperature variations within the wafer.

[0008] Furthermore, as semiconductor device geometry becomes increasingly smaller, semiconductor device manufacturing becomes less tolerant of temperature variations from center to edge. For example, in a gate-all-around (GAA) semiconductor device architecture, epitaxial films can be used to define the channel portions of the transistor devices formed on the wafer. As a result, the characteristics of the epitaxial film, which are potentially affected by temperature variations, can subsequently affect the performance characteristics of the GAA transistor device, such as speed and electrical characteristics, such as capacitance. For this reason, it may be necessary to reduce the thickness variation across the wafer to what was previously required, for example, less than 1.5A or approaching single-layer control. Since epitaxial film deposition is a thermal process, meaning that growth characteristics depend on the process temperature, precise control of the wafer temperature at all points on the wafer is necessary.

[0009] Such systems and methods are acceptable for their intended purposes. However, there remains a need for improved methods for operating reactor systems. This disclosure provides a solution to this need. [Summary of the Invention]

[0010] This invention is provided to introduce a series of concepts in a simplified form. These concepts are further described in detail in the following detailed description of examples disclosed herein. This invention is not intended to identify key or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0011] The provided method is a method for operating a reactor system to provide wafer temperature gradient control. The method includes operating a center temperature sensor, an intermediate temperature sensor, and an edge temperature sensor to sense a temperature of a central block of a wafer on a pedestal within a reaction chamber of the reactor system, to sense a temperature of an intermediate block of the wafer, and to sense a temperature of an edge block of the wafer. A controller processes the temperatures of the center, intermediate, and edge blocks of the wafer to generate a control signal based on a predefined temperature gradient for the wafer. A first set of heater lamps is operated based on the temperature of the center block to heat the center block of the wafer, a second set of heater lamps is operated based on the temperature of the intermediate block to heat the intermediate block of the wafer, and a third set of heater lamps is operated based on the temperature of the edge blocks to heat the edge blocks of the wafer.

[0012] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: center, middle, and edge temperature sensors each including a pyrometer that receives electromagnetic radiation from individual points on the wafer to sense the temperature of the center, middle, and edge blocks.

[0013] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: a point associated with the center temperature sensor having a center point within a radial offset of less than 40 millimeters (mm) from the center of the wafer; a point associated with the edge temperature sensor having a center point within a radial offset of 1 to 10 millimeters from the edge of the wafer; and a point associated with the intermediate temperature sensor having a center point located on the wafer at a location between the points associated with the center and edge temperature sensors.

[0014] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: the pyrometer of the edge temperature sensor is configured to have an outlet of a lens barrel at a distance from the wafer, such that the point associated with the edge temperature sensor has an outer diameter in the range of 1 mm to 10 mm.

[0015] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: a predefined temperature gradient for the wafer is defined by setpoint temperatures for the center, middle, and edge blocks of the wafer.

[0016] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: temperature processing by the controller including closed-loop control, the closed-loop control including comparing the temperatures of the center, middle, and edge blocks read by the center, middle, and edge temperature sensors with the setpoint temperature.

[0017] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: the operation of the heater lamps includes providing variable proportional control of the electrical power supplied to each lamp in the first, second, and third groups of heater lamps based on control signals.

[0018] In addition to one or more of the features described above, or as an alternative, further examples of the method may include: a first group of heater lamps comprising three center linear lamps in an upper lamp contact bar; a third group of heater lamps comprising two pairs of outer linear lamps in an upper lamp contact bar; a second group of heater lamps comprising linear lamps in an upper lamp contact bar disposed between the linear lamps in the first and third groups of heater lamps; and the linear lamps in each of the first, second, and third groups are provided with matched levels of electrical power based on a control signal.

[0019] A reactor system for providing wafer temperature gradient control is provided. The reactor system includes: a reaction chamber having a base therein for supporting a wafer; two or more heat lamps operable to direct heat into the reaction chamber and onto the wafer; a temperature monitoring assembly including at least three pyrometers for reading temperatures in a central block, an intermediate block, and an edge block of the wafer; and a controller that controls the heat lamps based on the temperatures of the central, intermediate, and edge blocks to provide heat to control a temperature gradient from a center to an edge of the wafer.

[0020] In addition to one or more of the features described above, or as an alternative, a further example of the reactor system may include: a temperature monitoring component comprising an edge pyrometer that receives electromagnetic radiation emitted from a sensor point on one of the upper surfaces of the wafer, the point having an outer diameter in the range of 1 mm to 10 mm.

[0021] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: the sensor point is positioned at a radial offset from the edge of the wafer, the radial offset being in the range of 1 mm to 10 mm.

[0022] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a base having a concavity in the range of 0.15 mm to 0.30 mm.

[0023] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a controller generating control signals to provide electrical power to one of the first groups of hot lamps for heating the central block of the wafer, to one of the second groups of hot lamps for heating the middle block of the wafer, and to one of the third groups of hot lamps for heating the edge block of the wafer.

[0024] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a control signal that sets the level of electrical power supplied to the first, second, and third groups of hot lamps based on a comparison of the temperature in the central block, intermediate block, and edge block of the wafer with a setpoint temperature for the central block, intermediate block, and edge block of the wafer.

[0025] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a first set of hot lamps comprising three central linear lamps in an upper lamp contact bar, wherein a third set of hot lamps comprises two pairs of outer linear lamps in the upper lamp contact bar, a second set of hot lamps comprising linear lamps in the upper lamp contact bar disposed between the linear lamps in the first and third sets of hot lamps, and providing different levels of electrical power to at least the first and third sets of hot lamps to control the temperature gradient.

[0026] Another reactor system for providing wafer temperature gradient control is provided. The reactor system includes a base for supporting a wafer, two or more hot lamps operable to heat the wafer, and a temperature monitoring component. The temperature monitoring component includes a center pyrometer, an intermediate pyrometer, and an edge pyrometer, the pyrometers being used to separately sense a temperature in a central block of the wafer, a temperature in an intermediate block of the wafer, and a temperature in an edge block of the wafer. A controller operates two or more hot lamps based on the temperatures of the center, intermediate, and edge blocks to control a temperature gradient from a center to an edge of the wafer, the controller generating control signals to independently operate a first group of hot lamps to heat the central block of the wafer, a second group of hot lamps to heat the intermediate block of the wafer, and a third group of hot lamps to heat the edge block of the wafer.

[0027] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a control signal that proportionally sets the amount of electrical power supplied to the first, second, and third groups of hot lamps based on a comparison of the temperature in the central block, intermediate block, and edge block of the wafer with a setpoint temperature for the central block, intermediate block, and edge block of the wafer.

[0028] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a temperature monitoring component comprising an edge pyrometer that receives electromagnetic radiation emitted from a sensor point on the surface above the wafer, the point having an outer diameter in the range of 1 mm to 10 mm.

[0029] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: the sensor point is positioned at a radial offset from the edge of the wafer, the radial offset being in the range of 1 mm to 10 mm.

[0030] In addition to one or more of the features described above, or as an alternative, further examples of the reactor system may include: a base having a concavity in the range of 0.15 mm to 0.30 mm.

[0031] All such examples are intended to be within the scope of this disclosure. Those skilled in the art will readily understand these and other examples from the following detailed description of some examples accompanied by the accompanying drawings. This disclosure is not limited to any of the specific examples(s) discussed.

Implementation Method

[0033] Although certain examples and instances are disclosed below, those skilled in the art will understand that this disclosure extends beyond the specific examples and / or uses disclosed herein, and their obvious modifications and equivalents. Therefore, it is intended that the scope of this disclosure should not be limited to the specific examples described herein.

[0034] The illustrations presented herein are not intended to be actual views of any particular material, equipment, structure or device, but are merely representations used to describe examples of this disclosure.

[0035] As used herein, the terms “wafer” and “substrate” may be used interchangeably to refer to any (or more) underlying material on which devices, circuits or films may be formed or formed.

[0036] As used herein, the term "chemical vapor deposition" (CVD) may refer to any process in which a substrate is exposed to one or more volatile precursors, which react and / or decompose on the substrate surface to produce the desired deposition.

[0037] As used herein, the term "atomic layer deposition" (ALD) can refer to a vapor deposition process in which deposition cycles (preferably multiple successive deposition cycles) are performed in a process chamber. Typically, during each cycle, a precursor is chemisorbed onto a deposition surface (e.g., a substrate surface or an underlying surface previously deposited, such as material from a previous ALD cycle), forming a monolayer or sub-monolayer that is not readily reacting with additional precursors (i.e., a self-limiting reaction). Subsequently, if necessary, a reactant (e.g., another precursor or reactive gas) can be subsequently introduced into the process chamber to convert the chemisorbed precursor into the desired material on the deposition surface. Typically, this reactant can further react with the precursor. Furthermore, a rinsing step can be used during each cycle to remove excess precursor from the process chamber and / or to remove excess reactant and / or reaction byproducts from the process chamber after the conversion of the chemisorbed precursor. Furthermore, when using alternating pulses of (multiple) precursor components, reactive gases, and purging (e.g., inert carrier) gases, the term "atomic layer deposition" as used herein also refers to processes specified by related terms, such as "chemical vapor atomic layer deposition," "atomic layer epitaxy" (ALE), molecular beam epitaxy (MBE), gas source MBE, or organometallic MBE, and chemical beam epitaxy.

[0038] As described below in more detail, the various details and examples of this disclosure can be combined with a reaction chamber configured for a variety of deposition processes, including but not limited to ALD, CVD, metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), and physical vapor deposition (PVD). Examples of this disclosure can also be used in semiconductor processing systems configured to process substrates with reactive precursors, which may include etching processes such as reactive ion etching (RIE), capacitively coupled plasma etching (CCP), and electron cyclotron resonance etching (ECR).

[0039] The inventors recognized the importance of sensing and monitoring the temperature gradient of a wafer in real time, and using real-time temperature control heating components of the wafer to achieve a desired temperature gradient. This includes monitoring the wafer temperature in three (or more) blocks, including the far-edge blocks of the wafer, during the deposition process to form a thin film (e.g., during epitaxial growth or the like), and then using feedback from the temperature of each block to adjust the operation of heater lamps in or associated with each block to maintain a desired temperature on the upper surface of the wafer or the deposition surface.

[0040] Figure 2 uses a simplified schematic top view to illustrate reactor system 200, showing a portion of a plurality of components available within and adjacent to the reaction chamber, configured for epitaxial (EPI) growth or other deposition processes. System 200 is designed to achieve real-time multi-block wafer temperature control (e.g., with a closed-loop controller design). Within the inner chamber of the reaction chamber of system 200, a base 210 is provided for supporting (and typically for rotation) wafer 220. System 200 is configured according to this specification to have the capability to provide real-time temperature gradient control between the wafer center and wafer edge 222 in order to reduce or better control slip formation during deposition on wafer 220. During the deposition process, as indicated by arrow 229, gas flows of precursors, reactants, and the like flow over wafer 220 positioned within the reaction chamber.

[0041] To control the temperature of wafer 220, system 200 includes a chamber heating assembly 230 having a bottom or lower contact bar or array 234 and a top or upper contact bar or array 238 for thermal lamps. The lamps can take various forms and shapes to implement system 200, and the system includes point and / or linear lamps that can provide light energy or signals using light-emitting diodes, filaments, or other technologies. As shown, for example, the bottom and top contact bars 234, 238 each include a plurality of linear lamps, with 11 lamps shown in each contact bar 234, 238. The linear lamps are arranged in planes spaced apart below and above the base 210 and wafer 220. The lamps arranged in each contact bar / array 234, 238 are parallel to each other and have a uniform spacing between adjacent pairs.

[0042] A temperature monitoring assembly is provided, comprising a central (e.g., near or at the axis of rotation of the wafer) block pyrometer 251, an intermediate (e.g., radially central) block pyrometer 255, and an edge (e.g., radially outer) block pyrometer 257, each of which is represented in FIG2 by a corresponding sensor area or point. The area or point will be monitored on the upper surface of the wafer 220 to sense temperature during operation of the pyrometer. The operation of the pyrometer involves receiving electromagnetic radiation through the gap / space between linear lamps in the top or upper lamp pad 238, and the electromagnetic radiation is emitted from the wafer surface (or a film developing on it) and received at the respective pyrometer. As shown, wafer 220 (or its upper surface) may be divided into three (or more) blocks, or a central block 250, an intermediate block 254, and an edge block 256, and the temperature of these blocks is monitored by radially positioning pyrometers in each of them, as indicated by the sensor areas or points of pyrometers 251, 255, and 257. Each of the pyrometers receives electromagnetic radiation emitted from the surface of the wafer (e.g., during heating of the substrate to the desired deposition temperature), from the developing film (e.g., during the deposition of an epitaxial film onto the upper surface of the wafer), and / or from the deposited film after deposition (e.g., during cooling from the predetermined deposition temperature to a temperature suitable for unloading the wafer from the reaction chamber).

[0043] The specific size of each block and the location of the pyrometer can be varied to implement system 200, as long as the point / sensor area falls within the associated block. For example, wafer 220 may have a radius of about 150 mm (which may be specified as R150 mm), and blocks 250, 254, and 256 may be sized as follows: (a) a central block 250 extending from the center of the wafer to the outer circumference at a radius, with a radius ranging from about 30 mm to about 80 mm; (b) an intermediate block 254 extending from the outer circumference of the central block 250 to the outer circumference at a radius, with a radius ranging from about 60 mm to about 120 mm; and (c) an edge block 256 extending from the outer circumference of the intermediate block 254 to the outer circumference at or near the wafer edge 222 (or an outer circumference with a radius ranging from about 145 mm to about 150 mm or similar). Similarly, the specific radial positions of the points of pyrometers 251, 255, and 257 within these blocks 250, 254, and 256 can be varied to implement system 300, and as shown in FIG2, the positions can be selected in part based on the gaps or holes between the lamps in the top contact bar 238. For example, the central block pyrometer 251 can be positioned to provide a point / sensor area at a radial offset from the center of wafer 220, with the radial offset being approximately 0 mm to approximately 40 mm; the intermediate block pyrometer 255 can be positioned to provide a point / sensor area at a radial offset from the center of wafer 220, with the radial offset being approximately 30 mm to approximately 110 mm (approximately R95 mm in some instances); and the edge block pyrometer 257 can be positioned to provide a point / sensor area at a radial offset from the center of wafer 220, with the radial offset being approximately 140 mm to approximately 149 mm (approximately R145 mm to approximately R147 mm in some instances).

[0044] Figure 3 illustrates a schematic side view of the reactor system 200 of Figure 2, providing additional details of the new design. As shown, wafer 220 is supported on base 210 within chamber 361 of reaction chamber 360. Base 210 is supported on a rotation axis or pin 312, indicated by arrow 313, for rotation about its central axis (extending through the center of wafer 220), so as to rotate wafer 220 during deposition steps (such as during EPI growth or the like). Upper contact bars or arrays 238 of the hot lamps (numbered 1 to 11 in Figure 3) are mounted above chamber 361 within lamp contact bars 370.

[0045] During operation, each lamp is operated to output light / radiation energy to heat the inner chamber 361 and wafer 220, as indicated by arrow 339. The power output or amount of heat 339 can be controlled independently, such as by using individual lamp control units, as shown by switch 349 (for lamp 1), using a silicon controlled rectifier (SCR) shown as an illustrative solid-state switching device, which can be used to provide rapid, infinitely variable proportional control of the electrical power of each lamp in the contact bar / array 238. Furthermore, as discussed herein, the lamps of the array / contact bar 238 (and the bottom or lower array / contact bar 234 of FIG. 2) can be divided into or assigned to control blocks, and are simultaneously controlled as groups / units based on real-time temperature feedback from pyrometers in those physical blocks (e.g., pyrometers mounted on the lamp contact bar 370 within or between lamps in the same heating or control block).

[0046] In this particular but non-limiting example, the lamp array / contact bar 238 is divided into three groups or control blocks, corresponding to three blocks or regions 250, 254, 256 of the wafer 220 (shown in FIG. 2), namely, a central group 340 (consisting of three central lamps), an intermediate group 342 (consisting of two pairs of lamps on either side (or opposite side) of the central group 340), and an edge group 346 (consisting of two pairs of lamps on either side (or opposite side) of the intermediate group 342). The number and location of lamps in each group 340, 342, 346 may vary, and the lamps in each group are preferably selected based on the portion or region of the wafer 220 heated by the lamps during operation (e.g., lamps heating the edge 222 of the wafer 220 are assigned to the edge group 346, and so on).

[0047] In the examples of Figures 2 and 3, system 200 is adapted to provide three-block wafer temperature control for an existing lamp contact design with twenty-two linear lamps (i.e., lamp contact designs used during epitaxial growth under atmospheric or depressurized pressure). As shown, the linear lamps are divided into three groups (i.e., center, middle, and edge groups 340, 342, and 346 in Figure 3), and the lamps of the lower and upper contact / arrays 234 and 238 can be operated using three closed-loop proportional-integral-derivative (PID) controls or other control methods. Three pyrometers 251, 255, and 257 can be used to measure the temperature of the wafer center, middle, and edge blocks, and the temperature is provided as feedback to the controller to actuate the power of the three groups 340, 342, and 346. Within each group 340, 342, and 346, there are multiple linear lamps, and each linear lamp can be assigned a power ratio for open-loop lamp power control, for example, using an SCR. Figure 3 shows an example of SCR 349 ​​as lamp number 1 in the edge group 346. In this way, the power of each lamp is controlled by the SCR to achieve precise and repeatable lamp power control.

[0048] Figures 4A and 4B illustrate a side elevation view and a top perspective view of the reactor system 200 of Figures 2 and 3, showing one embodiment of a temperature monitoring assembly including four temperature sensors (e.g., IR pyrometers or the like). As shown, system 200 includes a pyrometer 450 to sense the temperature of a material forming reaction chamber (element 360 in Figure 3), such as the quartz material forming the upper wall of the reaction chamber. Furthermore, system 200 or its temperature monitoring assembly includes three pyrometers for monitoring the three wafer blocks 250, 254, and 256 shown in Figure 2.

[0049] Specifically, as shown, system 200 includes a center pyrometer 251, an intermediate pyrometer 255, and an edge pyrometer 257 positioned and mounted on lamp contact bar 370 to receive electromagnetic radiation from points shown in FIG2 in blocks 250, 254, and 256, respectively. The pyrometers 251, 255, and 257 are provided in the reactor system 200 such that electromagnetic radiation emitted by the wafer from each of the blocks is received (or viewed by the pyrometers through) an opening in the lamp contact bar 370 (and in most cases, an opening in the reflector) at one of the pyrometers 251, 255, and 257, so that the pyrometers 251, 255, and 257 respectively measure the wafer temperature in each of the three blocks 250, 254, and 256, and the specific radial position or offset of each pyrometer is generally selected to suit the gap between the hot lamps and / or to match other openings / channels between the hot lamp 370 and the inner chamber 361, in which the wafer 220 is positioned on the base 210.

[0050] Figure 5 is a functional block or schematic diagram of a control system 500 for a reactor system (such as the systems of Figures 2 to 4), the control system being adapted to operate a set of heat lamps to control the wafer temperature gradient. As shown, a controller 530 (which may have a processor that runs codes or instructions (or software) to provide the functions described herein) takes temperature setpoints for wafer monitoring temperature sensors of the temperature monitoring components as input. In the examples of Figures 2 to 4, temperature setpoints 510 (which may be stored in memory accessible to the controller 530) may be provided for the center pyrometer, intermediate pyrometer, and edge pyrometer. These setpoints 510 may be identical to provide temperature uniformity across the wafer (or only a small temperature gradient), or they may be different from each other (or two may be identical) to achieve a desired temperature gradient (e.g., a non-zero gradient falling within a predefined range). The controller 530 also takes actual readings or temperatures from the temperature sensors (e.g., the center, intermediate, and edge pyrometers) as input.

[0051] Controller 530 compares the actual wafer temperature 520 with a setpoint 510 for each pyrometer or block, and in response, controller 530 generates control signals for the lamps 550 in the reaction chamber, which are provided to power controllers or controllers (e.g., SCRs for each linear lamp) 540. In some cases, the control signals are designed to power the lamps in a similar manner to a group, for example, all lamps in an edge group are powered in a matched manner, and so on. Figure 5 shows that power control 540 provides SCR power control to lamps 550 to provide electrical power to lamps 550 in a rapid, infinitely variable proportional manner based on feedback 520 from the pyrometers of the monitored wafer blocks. Although shown and described herein with three pyrometers; namely, a central pyrometer, an edge pyrometer arranged radially outward from the central pyrometer, and an intermediate pyrometer arranged radially between the central and edge pyrometers; it should be understood that embodiments of this disclosure may have additional pyrometers at different radial offsets between the central and edge pyrometers. As will be understood by those skilled in the art in light of this disclosure, such instances can provide gradient control, for example, when the temperature change across the wafer surface has a higher order shape, where four or more pyrometers in such instances provide additional temperature information for fitting a higher-order polynomial function to four or more radially separated temperature measurements.

[0052] The control system 500 provides three-block closed-loop control of the wafer temperature to the reactor system. This is partially achieved using a software controller 530, which sets the SCR power 540 to supply power to the corresponding lamps 550 and thus controls the wafer temperature gradient. For example, referring to Figure 3, lamp 1 is in edge group 346, and its power is controlled by SCR#1 (labeled as item 349 in Figure 3). The power setpoint of SCR#1 can be stated as: P_setpoint(SCR#1) = %P_output(edge ​​pyrometer) * ratio(SCR#1) where "output(edge ​​pyrometer)" is the instantaneous power calculated by the closed-loop temperature control operated by the controller 530 using a PID algorithm, and "ratio(SCR#1)" is the ratio setpoint within edge group 346 as an open-loop control.

[0053] In some instances, the control system 500 may control the wafer temperature based on temperature variations between the center block and the edge block of the wafer. For example, the control system 500 may calculate the difference between the center block temperature reported by the center pyrometer and the edge block temperature reported by the edge pyrometer, compare the calculated difference with a predetermined center-to-edge temperature limit, and increase or decrease the power of the lamps assigned to either (or both) the center and edge blocks when the calculated difference exceeds the predetermined center-to-edge temperature limit. As those skilled in the art will understand from this disclosure, this can limit variations within the film deposited on the wafer, for example, by improving the uniformity of film thickness across the wafer.

[0054] According to certain examples, the control system 500 can use the intermediate block temperature to control the wafer temperature based on the temperature gradient between the central block and the edge blocks. Here, the control system can fit a curve to the temperatures reported by the central pyrometer, intermediate pyrometer, and edge pyrometer, and then determine the maximum slope (or gradient) at each point along the curve. The control system 500 can then compare the determined maximum gradient with a predetermined gradient limit, and subsequently, if the determined gradient exceeds the predetermined gradient limit, increase or decrease the power supplied to one or more lamps in the central block, intermediate block, and / or edge block according to the location (i.e., block) of the determined maximum gradient. As those skilled in the art will understand from this disclosure, controlling the temperature according to the gradient allows for (or eliminates) crystal slip during film deposition and subsequent cooling, whereas in other cases crystal slip is associated with the trans-wafer temperature gradient.

[0055] Figure 6 is a side view of the center (and / or middle) pyrometer 610 and the edge pyrometer 630, which are used in the temperature monitoring assembly of this specification to achieve different point sizes. Specifically, the inventors recognized that a new edge pyrometer design can be used to reduce the point size at wafer 604 to improve far-edge temperature measurement. Far-edge temperature measurement and its temperature control (based on feedback from the far-edge (or edge block) pyrometer to the heater controller) are highly useful in controlling wafer edge slip. Wafer temperature gradients are typically larger at wafer edges and their bevel regions, resulting in greater thermal stress, and most slip formation has been observed at wafer edges.

[0056] As shown in Figure 6, the central (and intermediate) pyrometer 610 can receive electromagnetic radiation emitted from within the block beneath the pyrometer at its barrel 612, based on its field of view (FOV) and the working distance and relative position of the reflector 620 and the wafer 604, according to the size of a point on the wafer 604 within a range of approximately 15 mm to approximately 25 mm (approximately 20 mm is shown in Figure 6 as an example). More specifically, the reflector 620 is equidistant from the outlet of the barrel 612 and from the wafer 604 (or its upper surface), for example, in the case where the working distance is approximately 250 mm, the outlet of the barrel 612 is approximately 125 mm from the reflector 620, and the wafer 604 is approximately 125 mm from the reflector. The edge pyrometer 610 (and in some cases the intermediate pyrometer) can be located within a range of about 15 mm to about 25 mm (such as about 20 mm) from the point on which it receives electromagnetic radiation emitted from the wafer surface (and / or the developing / deposited film). It can be located at the center of the wafer 604, or at a point offset from the edge of the wafer to be a central block (or intermediate block), such as about 138 mm off the edge for a wafer with a radius of 150 mm.

[0057] For the peripheral pyrometer 630, a longer barrel 632 is used to reduce the working distance and achieve a point size with a radius ranging from about 2 mm to about 10 mm, and a width (e.g., radius) of about 5 mm to about 6 mm is used in one embodiment of the pyrometer 630. The length of the barrel 632 is shown in FIG. 6 as selected such that the lens element supported in the distal end of the barrel 632 is significantly closer to the reflector 620 than the barrel 612 of the central pyrometer. For example, this separation distance can be in the range of about 25 mm to about 35 mm, and is shown as about 30 mm, while maintaining the distance from the reflector to the wafer (e.g., about 125 mm), and as a result, the pyrometer 630 receives electromagnetic radiation from a point on the wafer surface (and / or the developing / deposited film) with an outer diameter of about 6 mm. With this edge pyrometer configuration, the edge pyrometer (along with its output sensor area or point) can be moved to a location closer to the wafer edge (e.g., to a radial offset from the wafer center in the range of about 140 mm to about 150 mm, such as about 145 mm in a useful design) for better far-edge temperature control. In other instances, the working distance is set by lowering the pyrometer 630 within the lamp contact bar to place the tube outlet closer to the reflector 620 and the wafer 604, while other instances can utilize optical components to achieve the reduced working distance and smaller point size shown in Figure 6, with a point size of about 6 mm or less outer diameter.

[0058] Figure 7 illustrates method 700 of an operating reactor system (such as system 200 in Figures 2 and 3, using a processor and program modules to perform one or more steps of method 900) to provide wafer temperature gradient control according to an example of this specification. Method 700 can be initiated by providing a substrate (such as a substrate having a silicon surface) in a reaction chamber having wafer temperature gradient control as described herein. The reaction chamber can then be used to perform a deposition process to provide a film under development.

[0059] In step 710, method 700 may include receiving electromagnetic radiation with a central pyrometer covering the central portion of the substrate or wafer. This radiation is emitted from the substrate (or a film developing on the surface of the substrate). In step 715, method 700 may include receiving electromagnetic radiation with an intermediate pyrometer covering the middle portion of the substrate. Similarly, this radiation is emitted from the substrate (or a film developing on the surface of the substrate). In step 720, method 700 may include receiving electromagnetic radiation with an edge pyrometer covering the edge portion of the substrate, and this radiation is emitted from the substrate (or a film developing on the surface of the substrate).

[0060] Method 700 continues with steps 730, 730, and 740, which involve using center, intermediate, and edge pyrometers to determine the temperature at the center, intermediate, and edge of the substrate. Then, in step 750, the method includes processing the temperature of the center, intermediate, and edge portions or blocks of the substrate with a controller and its programming module, and in response, generating a control signal based on a predefined temperature gradient (e.g., a value stored in processor-accessible memory) for the substrate (e.g., for a specific deposition process performed in a reaction chamber). Then, in step 760, method 700 includes operating a first group, a second group, and a third group of heat sources (e.g., lamps or the like) based on or using the control signal to control the temperature change or differential from the center to the edge of the substrate. Method 700 may then continue with step 710 until the process is complete or temperature control is no longer required.

[0061] In some embodiments of method 700, a predefined temperature gradient for the substrate is defined by a setpoint temperature for the center, middle, and edge portions or blocks of the substrate. Temperature processing by the controller may include closed-loop control, which may involve comparing the temperatures of the center, middle, and edge portions or blocks read by center, middle, and edge pyrometers (or other temperature sensors) with the setpoint temperatures. Furthermore, operation of the heat sources may include providing variable proportional control of the electrical power supplied to each heat source (e.g., lamp) in the first, second, and third groups of heater lamps based on a control signal.

[0062] The inventors further recognized that the base concavity (measured as the distance between the base wall 122 and the lowest point on the base cap 140, as seen in Figure 1) can impact the temperature gradient between the wafer center and the wafer edge. This is because the wafer edge is in direct contact with the base wall but not at the wafer center, resulting in different heat transfer across the wafer. Under the same lamp top and bottom power deviation, the greater the base concavity, the greater the temperature gradient (or the T difference from the center to the edge), which can lead to a smaller slip window.

[0063] The reactor systems of this specification (such as reactor system 200 of Figure 2) can be designed and manufactured to have a lower base concavity. For example, base 210 may have a concavity ranging from about 0.15 mm to about 0.30 mm, and some examples have base 210 with a concavity ranging from about 0.20 mm to about 0.25 mm, compared to a concavity of about 0.45 mm in some previous base designs. Testing has shown that this reduced concavity better optimizes the temperature difference from center to edge (i.e., reduces this difference), but also reduces the risk of the wafer center directly contacting the top surface of the base during wafer bending in high-temperature processes.

[0064] The software program used to implement the controller 530 in Figure 5 can be varied to achieve the desired functions, including providing wafer temperature gradient control to reduce slip formation during EPI growth. Overall, several factors can impact slip formation during the EPI growth process. The slip window is a function of the EPI growth thickness, deposition temperature, and center-to-edge T-difference during homogenization and deposition, as shown in the following equation: Slip = f(thickness, deposition_T, T-difference_deposition, T-difference_homogenization)

[0065] Generally, the thicker the layer, the more difficult it is to provide the layer with zero slip. Similarly, the higher the deposition temperature used, the smaller the slip window. As described above, the 3-block wafer temperature control allows for real-time, closed-loop control of the wafer temperature gradient during each process stage to suppress dislocation sources of slip formation, suppress slip nucleation during deposition, and prevent dislocation band propagation. The process stages include the upward homogenization stage, the main deposition stage, and the downward homogenization stage.

[0066] For example, the wafer temperature gradient can be precisely controlled to remain within a predefined range (e.g., less than a predefined T-difference) during the wafer temperature upward homogenization phase, in which the substrate temperature is heated to the deposition temperature after the wafer is transferred to the substrate and also during the wafer deposition step (note that the permissible T-difference may vary or be the same for different process stages / steps). Therefore, the new multi-block temperature monitoring and control method can result in a slower homogenization rate, producing less overshoot compared to alternative temperature control configurations (e.g., configurations where a pyrometer observes the bottom side of the substrate, or where the thermocouple has tight mechanical contact with the bottom side of the substrate), which allows the temperature difference to be minimized or at least reduced during transient phases. In another operating case, applying more ARC can mean more top power deviation and therefore less substrate impact on slip.

[0067] Based on various examples, this document discloses reactor systems or apparatuses, and associated heating or temperature control methods related to the operation of such reactor systems, for use in semiconductor processing (such as chemical vapor deposition (CVD) and other deposition steps). The reactor systems are designed to provide precise monitoring of wafer (or substrate) temperature during deposition steps, including real-time temperature gradient monitoring and control, to suppress slip formation, especially during high-temperature EPI growth.

[0068] Specifically, in order to control slip, the inventors recognized that the ability to design a reactor system or tooling that provides real-time temperature gradient control between the wafer center and wafer edge throughout the deposition process (e.g., EPI growth) would be beneficial in reducing slip formation. Such temperature gradient control is particularly useful at the far wafer edge, where local temperature gradients can be significantly higher and slip formation can be significantly more prevalent in wafer fabrication. Furthermore, the inventors understood that controlling heating and temperature to suppress slip nucleation systems is highly desirable for preventing the propagation of dislocations in the slip band into the wafer throughout the process, and it has been determined that this can be achieved by minimizing temperature gradients in critical process steps, including during the upward homogenization phase of wafer temperature during deposition preparation, during EPI deposition / growth, and during the downward homogenization phase of wafer deposition.

[0069] Wafer temperature measurement techniques used in some reactor systems for epitaxial film deposition may lack sufficient accuracy. Without being limited to any particular theory, the applicant believes that the insufficient accuracy may arise at least in part from delays associated with using thermal inference of wafer temperature via a substrate, such as by using a thermocouple mounted on the substrate or observing a pyrometer on the bottom of the substrate, rather than measuring the actual wafer surface temperature in real time. This is because a translation from substrate temperature to wafer temperature can be established at a certain point on the wafer (e.g., the center), but the same translation cannot be used for other points on the wafer, because the contact between the wafer and the substrate may be non-uniform, and because different conduction reactor flow dynamics can occur at different points on the wafer.

[0070] The systems and methods described herein provide real-time temperature control across the entire surface of a wafer, i.e., the ability to control the temperature at various points on the surface of the wafer (and / or the film developing on it), thereby controlling the film properties in all regions of the wafer. In some instances, this disclosure provides the ability not only to measure / monitor the actual wafer temperature, but also to control it to less than 0.1°C in all regions of the wafer. This, in turn, allows for control of sub-monolayer thickness in all regions of the wafer and allows for wafers that provide significantly higher device yields and performance for all technologies below the 3nm node. Furthermore, this same technique can be used to eliminate slippage during both upward and downward temperature homogenization in EPI processing.

[0071] The benefits, other advantages, and solutions to problems have been described herein with reference to specific examples. However, the benefits, advantages, solutions to problems, and any elements that may cause any benefit, advantage, or solution to occur or become more apparent should not be construed as essential, necessary, or fundamental features or elements of this disclosure.

[0072] References to features, advantages, or similar language throughout this specification do not imply that all features and advantages achievable with this disclosure are any single instance of or contained herein. Rather, references to features and advantages should be understood to mean that a particular feature, advantage, or characteristic described with the same example is included in at least one instance of the subject matter disclosed herein. Therefore, the discussion of features and advantages and similar language throughout this specification may (but are not necessarily) refer to the same examples.

[0073] Furthermore, the features, advantages, and characteristics described in this disclosure may be combined in one or more instances in any suitable manner. Those skilled in the art will recognize that the subject matter of this application may be practiced without having one or more of the specific features or advantages of a particular instance. In other instances, additional features and advantages may be recognized in certain instances, which may not be present in all instances of this disclosure. Furthermore, in some instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the nature of the subject matter of this disclosure.

[0074] The scope of this disclosure is therefore limited only by the appended claims, wherein, unless expressly stated otherwise, reference to an element in the singular form is not intended to mean "one and only one," but rather "one or more." It should be understood that, unless specifically stated otherwise, "one" and / or "" can include one or more, and reference to an item in the singular form can also include items in the plural form. Furthermore, the term "plurality" can be defined as "at least two." As used herein, when used with a list of items, the phrase "at least one" means that different combinations of one or more of the listed items may be used, and it may be necessary to use only one of the listed items. An item may be a particular object, thing, or category. Furthermore, when phrases like "at least one of A, B, and C" are used in the scope of a patent application, it is intended that the phrase be interpreted as meaning that A can exist alone in one instance, B can exist alone in one instance, C can exist alone in one instance, or any combination of elements A, B, and C can exist in a single instance; for example, A and B, A and C, B and C, or A, B, and C. In some cases, "at least one of item A, item B, and item C" can mean, for example (but not limited to), two items A, one item B, and ten items C; four items B and seven items C; or some other suitable combination.

[0075] All scope and ratio limitations disclosed herein may be combined. Unless otherwise specified, the terms "first," "second," etc., are used herein only as labels and are not intended to impose any order, position, or hierarchy requirements on the items referred to by these terms. Furthermore, references to items such as "second" do not require or exclude the existence of items such as "first" or lower numbered items and / or items such as "third" or higher numbered items.

[0076] Any reference to attachment, fixation, connection, or the like may include permanent, removable, temporary, partial, complete, and / or any other feasible attachment option. Additionally, any reference to no contact (or similar phrase) may also include reduced contact or minimal contact. In the foregoing description, certain terms such as “up,” “down,” “upper,” “lower,” “horizontal,” “vertical,” “left,” “right,” and the like may be used. These terms are used (where applicable) to provide some clarification in dealing with relative relationships. However, these terms are not intended to imply absolute relationships, positions, and / or orientations. For example, with respect to an object, simply turning the object over can change the “upper surface” into the “lower surface.” Nevertheless, it remains the same object.

[0077] Additionally, in this specification, examples of one element being "coupled" to another element can include direct and indirect coupling. Direct coupling can be defined as one element being coupled to another element and having some contact with it. Indirect coupling can be defined as coupling between two elements that are not in direct contact with each other, but have one or more additional elements between them. Furthermore, as used herein, securing one element to another element can include both direct and indirect securing. Additionally, as used herein, "adjacent" does not necessarily imply contact. For example, one element may be adjacent to another element without contacting it.

[0078] Although examples of this disclosure are presented herein, it should be understood that this disclosure is not limited thereto. For example, although various specific configurations of reactor systems are described together, this disclosure is not necessarily limited to these examples. Various modifications, changes, and improvements can be made to the systems and methods presented herein without departing from the spirit and scope of this disclosure.

[0079] The subject matter of this disclosure includes all novel and non-obvious combinations and sub-combinations of the various systems, components, configurations and other features, functions, actions and / or properties disclosed herein, as well as any and all equivalents thereof. [Simplified Explanation of the Diagram]

[0032] Although this specification concludes with the scope of the claims specifically pointed out and explicitly asserted as examples of the present disclosure, the advantages of the examples of the present disclosure can be more readily appreciated from the description of certain examples when read in conjunction with the accompanying drawings. Elements with similar element numbers throughout the drawings are intended to be identical. Figure 1 is a simplified cross-sectional view of a portion of a reaction chamber with a base supporting the wafer during the deposition process. Figure 2 is a schematic and partial top view of the reactor system, showing a portion of the reaction chamber and its heating assembly along with the temperature monitoring assembly of this specification. Figure 3 illustrates a schematic cross-sectional view of a portion of the reactor system of Figure 2, showing the reaction chamber equipped with the temperature monitoring assembly of this specification. Figures 4A and 4B illustrate side elevation and top perspective views of the reactor systems of Figures 2 and 3, respectively, showing one embodiment of the temperature monitoring assembly including four temperature sensors (e.g., pyrometers). Figure 5 is a functional block or schematic diagram of the control system for the reactor system, which is adapted to operate a set of heat lamps to control the wafer temperature gradient. Figure 6 is a side view of the temperature monitoring assembly used in this specification to achieve center (and / or intermediate) pyrometers and edge pyrometers of different point sizes. Figure 7 is a method for operating the reactor system according to one example of this specification to provide wafer temperature gradient control.

Claims

1. A reactor system operation method for providing wafer temperature gradient control, comprising: operating a center temperature sensor, an intermediate temperature sensor, and an edge temperature sensor to respectively sense a temperature of a center block of a wafer on a base in a reaction chamber of a reactor system, a temperature of an intermediate block of the wafer, and a temperature of an edge block of the wafer, wherein the sensed temperature of the center block, the sensed temperature of the intermediate block, and the sensed temperature of the edge block originate from a surface of the wafer from which material to be deposited; A controller processes the temperatures of the central block, the intermediate block, and the edge block of the wafer to generate a plurality of control signals based on a predefined temperature gradient for the wafer; and based on the control signals, operates a first set of heater lamps to heat the central block of the wafer based on the temperature of the central block, operates a second set of heater lamps to heat the intermediate block of the wafer based on the temperature of the intermediate block, and operates a third set of heater lamps to heat the edge block of the wafer based on the temperature of the edge block, wherein the central temperature sensor, the intermediate temperature sensor, and the edge temperature sensor each include a pyrometer that receives thermal radiation from respective points on the surface of the wafer to sense the temperatures of the central block, the intermediate block, and the edge block, wherein the point associated with the edge temperature sensor is smaller than at least one of the point associated with the central temperature sensor or the point associated with the intermediate temperature sensor.

2. The method of claim 1, wherein the pyrometer comprising at least one of the central temperature sensor or the intermediate temperature sensor includes a lens barrel having a lens barrel outlet, wherein the lens barrel outlet is positioned such that a reflector in the reactor system is equidistant from the lens barrel outlet and the wafer.

3. The method of claim 1, wherein the point associated with the center temperature sensor has a center point radially offset from a center of the wafer, wherein the point associated with the edge temperature sensor has a center point radially offset from an edge of the wafer, and wherein the point associated with the intermediate temperature sensor has a center point located on the wafer at a location between the points associated with the center temperature sensor and the edge temperature sensor.

4. The method of claim 2, wherein at least one of the following is true: the pyrometer included in the edge temperature sensor includes a lens barrel having a length longer than the lens barrel included in the pyrometer included in at least one of the center temperature sensor or the intermediate temperature sensor; or a lens barrel outlet of the pyrometer included in the edge temperature sensor is positioned closer to the reflector than the wafer.

5. The method of claim 1, wherein the predefined temperature gradient for the wafer is defined by a plurality of setpoint temperatures for the central block, the intermediate block, and the edge block of the wafer.

6. The method of claim 5, wherein the processing of the temperatures by the controller includes a closed-loop control, the closed-loop control including comparing the temperatures of the central block, the intermediate block, and the edge block read by the center temperature sensor, the intermediate temperature sensor, and the edge temperature sensor with the setpoint temperatures.

7. The method of claim 6, wherein the operation of the heater lamps includes providing variable proportional control of the electrical power supplied to each lamp in the first group of heater lamps, the second group of heater lamps, and the third group of heater lamps based on the control signals.

8. The method of claim 1, wherein the first group of heater lamps comprises three center linear lamps in an upper lamp contact bar, wherein the third group of heater lamps comprises two pairs of outer linear lamps in the upper lamp contact bar, wherein the second group of heater lamps comprises linear lamps in the upper lamp contact bar disposed between the linear lamps in the first group of heater lamps and the third group of heater lamps, and wherein the linear lamps in each of the first group of heater lamps, the second group of heater lamps, and the third group of heater lamps are provided with matched level electrical power based on the control signals.

9. A reactor system for providing wafer temperature gradient control, comprising: a reaction chamber; a pedestal for supporting a wafer in the reaction chamber; a plurality of heat lamps operable to direct heat into the reaction chamber and onto the wafer; a temperature monitoring assembly including at least three pyrometers directed to a surface of the wafer on which a material will be deposited, wherein the at least three pyrometers are configured to read temperatures in a central block, an intermediate block, and an edge block of the surface of the wafer, wherein the temperature monitoring assembly includes: an edge pyrometer configured to receive thermal radiation emitted from an edge sensor point in the edge block of the wafer surface; a central pyrometer configured to receive thermal radiation emitted from a central sensor point in the central block of the wafer surface; and an intermediate pyrometer configured to receive thermal radiation emitted from an intermediate sensor point in the intermediate block of the wafer surface. The edge sensor point is smaller than at least one of the center sensor point or the intermediate sensor point; and a controller configured to control the thermal lamps based on the temperatures of the center block, the intermediate block, and the edge block to control a temperature gradient from a center to an edge of the wafer.

10. The reactor system of claim 9, wherein at least one of the central pyrometer or the intermediate pyrometer includes a lens tube having a lens tube outlet, wherein the lens tube outlet is positioned such that a reflector in the reactor system is equidistant from the lens tube outlet and the wafer.

11. The reactor system of claim 9, wherein the edge sensor point is radially offset from the edge of the wafer in the range of 1 mm to 10 mm.

12. The reactor system of claim 10, wherein at least one of the following is true: the edge pyrometer includes a lens barrel having a length longer than the lens barrel included in at least one of the center pyrometer or the intermediate pyrometer; or the lens barrel outlet of the edge pyrometer is positioned closer to the reflector than the wafer.

13. The reactor system of claim 9, wherein the controller generates a plurality of control signals to provide electrical power to a first group of hot lamps for heating the central block of the wafer, a second group of hot lamps for heating the intermediate block of the wafer, and a third group of hot lamps for heating the edge block of the wafer.

14. The reactor system of claim 13, wherein the control signals set the levels of the electrical power supplied to the first group, the second group, and the third group of the hot lamps based on a comparison of the temperatures in the central block, the intermediate block, and the edge block of the wafer with one of a plurality of setpoint temperatures for the central block, the intermediate block, and the edge block of the wafer.

15. The reactor system of claim 13, wherein the first group of the thermal lamps comprises three central linear lamps in an upper lamp contact bar, wherein the third group of the thermal lamps comprises two pairs of outer linear lamps in the upper lamp contact bar, wherein the second group of the thermal lamps comprises linear lamps in the upper lamp contact bar disposed between the linear lamps in the first group and the third group of the thermal lamps, and wherein different levels of electrical power are provided to at least the first group and the third group of the thermal lamps to control the temperature gradient.

16. A reactor system for providing wafer temperature gradient control, comprising: a base for supporting a wafer; a plurality of heat lamps operable to heat the wafer; and a temperature monitoring assembly including a central pyrometer, an intermediate pyrometer, and an edge pyrometer, the pyrometers being configured to individually sense a temperature in a central block of the wafer, a temperature in an intermediate block of the wafer, and a temperature in an edge block of the wafer, wherein the temperature monitoring assembly is configured to sense the temperature in the central block, the temperature in the intermediate block, and the temperature in the edge block on a surface of the wafer on which a material to be deposited. The edge pyrometer is configured to receive thermal radiation emitted from an edge sensor point in the edge region of the wafer's surface; the center pyrometer is configured to receive thermal radiation emitted from a center sensor point in the center region of the wafer's surface; and the intermediate pyrometer is configured to receive thermal radiation emitted from an intermediate sensor point in the intermediate region of the wafer's surface. The edge sensor point is smaller than at least one of the center sensor point or the intermediate sensor point; and a controller operates the heat lamps based on the temperatures of the center block, the intermediate block, and the edge block to control a temperature gradient from a center to an edge of the wafer, wherein during the operation, the controller generates control signals to independently operate a first group of the heat lamps to heat the center block of the wafer, a second group of the heat lamps to heat the intermediate block of the wafer, and a third group of the heat lamps to heat the edge block of the wafer.

17. The reactor system of claim 16, wherein the control signals are configured to proportionally set the amount of electrical power supplied to the first group, the second group, and the third group of the heat lamps based on a comparison of the temperatures in the central block, the intermediate block, and the edge block of the wafer with one of a plurality of setpoint temperatures for the central block, the intermediate block, and the edge block of the wafer.

18. The reactor system of claim 16, wherein at least one of the central pyrometer or the intermediate pyrometer includes a lens tube having a lens tube outlet, wherein the lens tube outlet is positioned such that a reflector in the reactor system is equidistant from the lens tube outlet and the wafer.

19. The reactor system of claim 16, wherein the edge sensor point is radially offset from the edge of the wafer in the range of 1 mm to 10 mm.

20. The reactor system of claim 18, wherein at least one of the following is true: the edge pyrometer includes a lens barrel having a length longer than the lens barrel included in at least one of the center pyrometer or the intermediate pyrometer; or the lens barrel outlet of the edge pyrometer is positioned closer to the reflector than the wafer.

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