Multilayer printed circuit board

Abstract

Embodiments of the present invention provide a multilayer printed circuit board (10) for connecting electronic components (304), the board (10) comprising a stack of a plurality of conductive layers (100), each conductive layer (100) comprising two surface layers (101) and one or more inner layers (102), the board (10) comprising one or more pit holes (202), each pit hole (202) comprising a metallized portion (2021) leading to one of the two surface layers (101) and a non-metallized portion (2022) leading to the other surface layer (101); the multilayer printed circuit board (10) may advantageously include one or more metal pads (301), each metal pad (301) being connected to one of the two surface layers (101) to conceal the non-metallized portion (2022) of the corresponding pit hole (202).

Description

[Technical Field]

[0001] This invention relates essentially to printed circuit boards for electronic systems, and more particularly to multilayer printed circuit boards and the process of manufacturing multilayer printed circuit boards. [Previous Technology]

[0002] Electronic systems routinely perform complex processing operations, which affect the size and power consumption of such systems. For example, radar-type electronic systems typically operate by generating electromagnetic signals, which are transmitted through space via a transmitting module equipped with a dedicated antenna. Radar also includes a receiving module for detecting electromagnetic signals reflected by targets, and a processing module for determining information related to targets (such as their position and their speed of movement) based on the detected signals.

[0003] Radar can be fixed on the ground, mounted on ground vehicles or ships, or transported by air. In any case, radar must meet numerous constraints, particularly those related to size. Specifically, for example, in the field of AESA radar (AESA stands for Active Electronically Scanned Array), functionality is increasingly integrated into the radar's antenna section. Initially limited to microwave functions (transmission and reception of signals and auxiliary equipment), the antenna section of current radars is expected to dominate an increasing proportion of digital signal processing operations. Simultaneously, radar must be able to perform increasingly more functions to accommodate increasingly smaller and / or increasingly maneuverable targets.

[0004] To meet the size constraints in radar, it is known to use one or more single-layer printed circuit boards, each containing a plurality of electronic components. The electronic components of a given printed circuit board are electrically connected via electrical rails according to a given circuit diagram to perform electronic functions for various signals required for radar operation. Such electronic functions include, for example, but not limited to, signal generation, filtering, modulation, and frequency conversion. Therefore, the electrical signals transmitted via the electrical rails of a single-layer printed circuit board can have various forms (digital or analog), various frequencies (fundamental frequency signals and radio frequency signals), and / or various powers. However, the size of the single-layer printed circuit board is closely related to the number and length of the electrical rails connecting the various electronic components arranged on the single-layer printed circuit board. This makes single-layer printed circuit boards incompatible with current radars containing a considerable number of electronic functions that require a considerable number of electronic components.

[0005] To mitigate the limitations associated with using single-layer printed circuit boards in radar, multilayer printed circuit boards (two surface layers and one or more inner layers) comprising multiple stacked layers are known to be used. In this case, electronic components can be connected to other electronic components through electrical tracks created in one or more layers of the multilayer printed circuit board. For this purpose, metallized vias are typically used to ensure electrical connections between the layers of the multilayer printed circuit board. For example, metallized through-hole vias can be used to electrically connect all layers of the multilayer printed circuit board. It is also known to use metallized pit vias to electrically connect one of the two surface layers to one or more inner layers. Typically, pit vias are created by metallized through-hole vias by removing unused or useless metallization that causes some effects of reflection and / or distortion of useful signals. However, in some cases, pit vias can be a source of parasitic electromagnetic radiation, which may locally degrade the operation of certain electronic components employed in the multilayer printed circuit board.

[0006] A known solution for preventing parasitic electromagnetic radiation is shown in Figure 1. This known solution involves filling each pit hole with non-conductive resin and sealing the pit holes with deposited metallization, a process similar to that used to create metal interconnect tracks between surface-mount electronic components. However, this known solution is complex to implement and significantly reduces the manufacturing yield of multilayer printed circuit boards. Specifically, the resin filler may easily penetrate other types of metallized vias, such as metallized through-holes, thus requiring additional steps to prevent resin penetration into the metallized through-holes. Furthermore, the creation of the sealing metallization requires depositing an additional metal layer on the surface layer of the multilayer printed circuit board, resulting in a greater final metallization thickness and reduced thickness and etch tolerance.

[0007] Therefore, improved multilayer printed circuit boards are needed. [Summary of the Invention]

[0008] To this end, the present invention provides a multilayer printed circuit board for connecting electronic components. The multilayer printed circuit board comprises a stack of a plurality of conductive layers, each conductive layer including two surface layers and one or more inner layers. An electrical insulating layer ensures spacing between two adjacent conductive layers. The printed circuit board includes one or more pit vias, each pit via configured to electrically connect one of the two surface layers to one or more inner layers and including a metallized portion leading to one of the two surface layers and a non-metallized portion leading to the other surface layer. The metallized portion and the non-metallized portion of the pit via extend in a direction perpendicular to the stack plane. Advantageously, the multilayer printed circuit board further includes one or more metal pads, each metal pad engaging with one of the two surface layers to conceal the non-metallized portion of the corresponding pit via.

[0009] In one embodiment, parasitic electromagnetic radiation is easily formed inside the postholes, and the metal pads may be selected to at least partially block the parasitic electromagnetic radiation from propagating out of the postholes.

[0010] In another embodiment, parasitic electromagnetic radiation can easily penetrate into the postholes, and the metal pads can be selected to at least partially block the parasitic electromagnetic radiation from propagating into the postholes.

[0011] Advantageously, the geometric characteristics of the metal pad may be selected based on one or more characteristics that allow parasitic electromagnetic radiation to easily form in and / or penetrate into the corresponding posthole.

[0012] As a variation, the electrical characteristics of the metal pad may be selected based on one or more characteristics that allow parasitic electromagnetic radiation to easily form in and / or penetrate into the corresponding posthole.

[0013] In one embodiment, the metal pads may be the same.

[0014] In another embodiment, the metal pads may be passive components that do not require a power supply.

[0015] A process for manufacturing a multilayer printed circuit board and adding components is also provided, the multilayer printed circuit board being used to connect electronic components. The process includes the following steps, which have advantages: - generating a stack of a plurality of conductive layers, the conductive layers comprising two surface layers and one or more inner layers, with an insulating layer ensuring spacing between two adjacent conductive layers; - generating electrical connections between the conductive layers through one or more metallized vias; - converting at least one metallized via into a pit via, the pit via comprising a metallized portion leading to one of the two surface layers and an unmetallized portion leading to the other surface layer, the metallized portion and the unmetallized portion of the pit via extending in a direction perpendicular to the stack plane; - generating electrical rails and connection pads on at least one surface layer of the two surface layers.

[0016] Advantageously, the process of manufacturing a multilayer printed circuit board and adding components may further include the following steps: - bonding one or more metal pads to one or two surface layers, each metal pad being bonded to conceal the unmetallized portion of the corresponding posthole hole; - bonding one or more electronic components to connection pads belonging to one or two surface layers.

Implementation Method

[0024] The multilayer printed circuit board 10 according to various embodiments of the present invention is intended to electrically connect electronic components 304 and allow them to exchange electrical signals of various forms (digital or analog), various frequencies (baseband signals and radio frequency signals) and / or various powers.

[0025] FIG. 2 illustrates a multilayer printed circuit board 10 according to an embodiment of the present invention. The multilayer printed circuit board 10 comprises a stack of a plurality of conductive layers 100, with spacing between two adjacent conductive layers 100 ensured by an electrically insulating layer 120 based on one or more insulating materials. Each conductive layer 100 comprises two surface layers 101 and one or more inner layers 102. Furthermore, each conductive layer 100 comprises a set of electrical rails 302 designed to connect added (i.e., soldered) electronic components 304 to one or more conductive layers 100 of the printed circuit board 10. The multilayer printed circuit board 10 also comprises one or more vias 200, also referred to as through-holes, allowing electrical connections between the various conductive layers 100 of the multilayer printed circuit board 10. For example, an electrical rail 302 coupled with a via 200 allows electrical connections between two electronic components 304 added to a given layer or to two different layers of the multilayer printed circuit board 10. Additionally, the multilayer printed circuit board 10 comprises at least one post-recessed via 202. The pinhole via 202 allows one of two surface layers 101 to connect to one or more inner layers 102, and for this purpose includes a metallized portion 2021 that perpendicularly passes through the conductive layer 100 to be connected and opens onto, i.e., terminates, in the surface layer 101 in question. The pinhole via 202 also includes an unmetallized portion 2022 that passes through other conductive layers 100 and leads to other surface layers 101. From an industrial perspective, the pinhole via 202 can be obtained by fabricating a metallized via 201 before removing a portion of the internal metallization in a direction perpendicular to the stack plane. The inner surface of the metallized via 201 is fully metallized, i.e., covered with metal. In embodiments of the invention, the multilayer printed circuit board 10 further includes one or more metal pads 301. Each metal pad 301 is added to one of the two surface layers 101 to conceal the unmetallized portion 2022 of the corresponding pinhole via 202. Each metal pad 301 is an insulating metal pad capable of blocking parasitic electromagnetic radiation.

[0026] Each layer of the multilayer printed circuit board 10 further includes a connection pad 303 corresponding to the termination of an electrical rail 302 of, for example, the conductive layer 100 discussed. The connection pad 303 may be perforated to establish electrical connections between two or more conductive layers 100 or between electronic components 304 through vias. Alternatively, the connection pad 303 may not be perforated but is intended for soldering surface-mount electronic components 304.

[0027] In embodiments of the invention, parasitic electromagnetic radiation is readily formed within the posthole aperture 202. The source of this parasitic electromagnetic radiation may, for example but not limited to, be the metallized portion 2021 of the posthole aperture 202, which can act as an antenna radiating electromagnetic waves through it. In this embodiment of the invention, the metal pad 301 that conceals the posthole aperture 202 is chosen to at least partially block the propagation of such parasitic electromagnetic radiation from the corresponding posthole aperture 202. Advantageously, each metal pad 301 utilized by the multilayer printed circuit board 10 is chosen to completely block the propagation of parasitic electromagnetic radiation from the corresponding posthole aperture 202.

[0028] In other embodiments of the invention, parasitic electromagnetic radiation is easily formed outside the posthole 202. In these embodiments of the invention, the metal pad 301 that hides the posthole 202 is selected to at least partially block such parasitic electromagnetic radiation from penetrating into the corresponding posthole 202.

[0029] Advantageously, the metal pads 301 that conceal the post holes 202 of the multilayer printed circuit board 10 can be the same, that is, the metal pads 301 can have the same geometry, especially the same thickness, which is measured perpendicular to the stacking plane.

[0030] In embodiments of the present invention, the geometry of the metal pad 301 that conceals the posthole 202 can be selected based on one or more characteristics of the parasitic electromagnetic radiation that is easily formed inside or outside the corresponding posthole 202. For example, the thickness of the metal pad 301 can be several times greater than, and typically one hundred times greater than, the skin depth associated with the parasitic electromagnetic radiation in question, which depends on the frequency of the parasitic electromagnetic radiation in question.

[0031] In other embodiments of the invention, the electrical characteristics of the metal pad 301 concealing the posthole 202 can be selected based on one or more characteristics of parasitic electromagnetic radiation that is easily formed inside or outside the corresponding posthole 202. Such electrical characteristics include, for example, but not limited to, the conductivity of the metal pad 301.

[0032] Advantageously, the metal pads 301 that conceal the posthole holes 202 of the multilayer printed circuit board 10 are passive components that do not require power. Furthermore, the metal pads 301 added to one of the two surface layers 101 of the multilayer printed circuit board 10 can be electrically insulated from all other metal pads 301 added to the same surface layer 101.

[0033] In embodiments of the present invention, each of the one or more metal pads 301 may be consistent in chemical composition, i.e., composed of a single chemical element, such as copper or aluminum. Alternatively, each of the one or more metal pads 301 may be composed of an alloy of a plurality of chemical elements.

[0034] Figure 3 illustrates a process for manufacturing a multilayer printed circuit board 10 and adding components according to an embodiment of the present invention. The manufacturing process includes a first stage and a second stage, in which the multilayer printed circuit board 100 is manufactured in the first stage, and in the second stage, metal pads 301 and electronic components 304 are added to the thus manufactured multilayer printed circuit board 100. The first stage includes steps 51 to 54, and the second stage includes steps 55 and 56, which are described below. The manufacturing process according to various embodiments of the present invention is applicable to printed circuit boards having any number, and typically more than three, conductive layers 100.

[0035] In step 51, a stack of a plurality of conductive layers 100 is fabricated, with spacing between two adjacent conductive layers 100 ensured by insulating layers 120 based on one or more insulating materials. Each conductive layer 100 includes two surface layers 101 and one or more inner layers 102. Each conductive layer 100, particularly each inner layer 102, may include a set of electrical rails 302 and a set of connection pads 303, which are pre-fabricated according to a given circuit diagram. Step 301 may also include creating electrical connections between the inner layers 102 through one or more buried vias, and creating electrical connections between the surface layers 101 and the inner layers 102 through one or more blind vias. Typically, buried or blind vias are obtained by creating metallized vias in the sub-stacks of conductive layers 100. For example, a sub-stack of conductive layers 100 with buried vias may only include the inner conductive layers 102 and their electrically insulating layers 120 of the multilayer printed circuit board 10.

[0036] In step 52, the electrical connection between the conductive layers 100 is created through one or more metallized vias 201. The metallized vias 201 are created by drilling holes in all implemented layers before depositing a layer of metal, such as copper, inside the holes. The metallized vias 201 particularly allow all implemented conductive layers 100 to be electrically connected, especially the two surface layers 101.

[0037] In step 53, one or more metallized vias 201 are transformed into one or more pit holes 202 by removing (i.e., removing) useless metallization in a direction perpendicular to the stack plane. Therefore, the pit hole 202 includes a metallized portion 2021 that perpendicularly passes through the conductive layer 100 to be connected and leads to one of the two surface layers 101. The pit hole 202 also includes an unmetallized portion 2022 that passes through the other conductive layer 100 and leads to the other surface layer 101. It should be noted that the pit holes 202 according to embodiments of the present invention are empty, i.e., as described with respect to prior art solutions, they are not filled with any resin plugs.

[0038] In step 54, electrical rails 302 and connecting pads 303 are generated on one or two surface layers 101 of the multilayer printed circuit board 10.

[0039] In step 55, the metal pads 301 are joined, i.e., rigidly fixed or added to one or two surface layers 101, to conceal the unmetallized portion 2022 of each posthole 202. The metal pads 301 may be all identical. Alternatively, at least two metal pads 301 may differ in geometric and / or electrical characteristics.

[0040] In step 56, the electronic component 304 is bonded to a connection pad 303 formed on one or two surface layers 101. Those skilled in the art will understand that steps 55 and 56 can be performed in parallel or sequentially in time.

[0041] Figures 4-A, 4-B, and 4-C illustrate the steps of bonding the metal pad 301 to one of the two surface layers 101 of the multilayer printed circuit board 10 (step 55 above). More precisely, Figure 4-A illustrates a first step involving the deposition of solder paste on a metal portion of the surface layer 101, intended to accommodate the metal pad 301, which may be, for example but not limited to, a bonding pad 303. Figure 4-B illustrates a second step involving placing the metal pad 301 on a pre-prepared metal portion of the surface layer 101. The second step can be performed manually or automatically using a machine for placing surface mount components (SMCs). Figure 4-C illustrates a third soldering step involving rigidly securing the metal pad 301 to the surface layer 101 of the multilayer printed circuit board 10. The soldering steps can be performed using reflow soldering technology. Furthermore, for the metal pad 301 and the electronic component 304, the deposition of solder paste (first step) and reflow (third step) can be performed simultaneously.

[0042] Figures 5-A, 5-B, 5-C, 5-D, 5-E, 5-F, and 5-G illustrate the fabrication of pit holes 202 and metallized vias 201 in a multilayer printed circuit board 10 according to a prior art solution. The prior art solution involves filling the pit holes 202 with a non-conductive resin before sealing them through a metallization. Figures 6-A, 6-B, 6-C, and 6-D illustrate the steps required to produce the pit holes 202 and metallized vias 201 according to an embodiment of the present invention.

[0043] Figures 5-A and 6-A correspond to the drilling and metallization steps, specifically allowing the preparation of the pit hole 202 by creating the metallized through hole 201. More precisely, Figure 6-A illustrates that, according to an embodiment of the invention, the creation of the pit hole and the fabrication of the metallized through hole 201 can begin in the same manufacturing steps as the creation of the two metallized through holes 201. Furthermore, Figure 5-A shows that prior art solutions do not prioritize this parallelism in the creation of the metallized through hole 201 and the pit hole 202.

[0044] Figures 5-B and 6-B correspond to the pitting step, which involves creating pit holes 202 from the metallized via 201. This is equivalent to removing a portion of the metallization of the metallized via 201 in a direction perpendicular to the stack plane.

[0045] Figure 5-C corresponds to the filling step implemented in the prior art solution, which includes completely filling the resulting posthole 202 with non-conductive resin.

[0046] Figure 5-D corresponds to the planarization step implemented in the prior art solution, which includes planarizing the two surface layers 101 of the multilayer printed circuit board 10.

[0047] Figure 5-E illustrates the deposition step implemented in the prior art solution, which includes depositing a conductive layer 100 on two previously planarized surface layers 101. The deposition step specifically allows the stud hole 202 to prevent parasitic electromagnetic radiation from propagating out of and / or through the stud hole 202. Figure 5-E further illustrates the fabrication of the metallized via 201 as described in another embodiment of the drilling and metallization steps (similar steps are shown in Figure 6-A). The metallized via 201 can only be fabricated according to the prior art solution after the stud hole 202 has been filled and plugged. This allows the metallized via 201 to be avoided by filling it with non-conductive resin.

[0048] Figure 5-F illustrates an etching step implemented in a prior art solution, which includes creating electrical rails 302 and / or connection pads 303 on one or two surface layers 101. The etching step particularly allows for metallization to conceal each pit hole 202 to be electrically insulated.

[0049] Figure 5-G illustrates the step of adding electronic components 304 implemented in the prior art solution, which includes bonding electronic components 304 to one or two surface layers 101. More precisely, each electronic component 304 may be bonded to two or more dedicated connection pads 303.

[0050] Figure 6-C corresponds to an etching step that includes the formation of electrical rails 302 and / or connection pads 303 on one or two surface layers 101, which follows directly after a previous manufacturing step according to an embodiment of the invention.

[0051] Figure 6-D corresponds to the step of adding an electrical component, which includes bonding an electronic component 304 to one or two surface layers 101. The electronic component 304 bonded in this step includes a metal pad 301 for concealing the posthole 202. Therefore, the metal pad 301 can be bonded to the surface layer 101 in a manner similar to any other surface-mount electronic component 304.

[0052] Therefore, embodiments of the present invention allow for electrical isolation of the pit holes 202 with fewer manufacturing steps than prior art solutions, thus ensuring better manufacturing yield. Furthermore, embodiments of the present invention allow for electrical isolation of the pit holes 202 without requiring filling such pit holes 202 with non-conductive resin. This allows for, for example, weight reduction. Moreover, unlike prior art solutions that require additional steps to deposit a conductive layer 100 (FIG. 5-E) on one or more surface layers 101 to hide the pit holes 202, embodiments of the present invention allow the initial thickness of the conductive surface layer 100 to be preserved, which allows for improvements in etching accuracy and weight.

[0053] The present invention is not limited to the embodiments described above by way of non-limiting examples. In particular, the present invention is not limited to the examples of electronic systems mentioned in the description. It includes any variations that can be conceived by those skilled in the art. [Simplified Explanation of the Diagram]

[0017] Other features and advantages of the present invention will become apparent from the following description and figures, wherein:

[0018] [Figure 1] shows a column pit hole according to a prior art solution;

[0019] [Figure 2] illustrates a multilayer printed circuit board according to an embodiment of the present invention;

[0020] [Figure 3] illustrates the process of manufacturing a multilayer printed circuit board and adding components according to an embodiment of the present invention;

[0021] [Figures 4-A to 4-C] illustrate the steps performed to bond a metal pad to the surface layer of a multilayer printed circuit board according to an embodiment of the present invention;

[0022] [Figures 5-A to 5-G] illustrate the steps for generating column recesses and through holes according to prior art solutions; and

[0023] [Figures 6-A to 6-D] illustrate the steps for generating column pits and through holes according to an embodiment of the present invention.

Claims

1. A multilayer printed circuit board (10) for connecting electronic components (304), the multilayer printed circuit board (10) comprising a stack of a plurality of conductive layers (100), the conductive layers (100) comprising two surface layers (101) and one or more inner layers (102), the spacing between two adjacent conductive layers (100) being ensured by an electrical insulating layer (120), the printed circuit board comprising one or more post-hole vias (202), each post-hole via (202) being configured to electrically connect one of the two surface layers (101) to one or more inner layers (102) and including access to the two surface layers. The multilayer printed circuit board (10) has a metallized portion (2021) of one surface layer of the layer (101) and an unmetallized portion (2022) of the other surface layer (101) leading to the two surface layers, wherein the metallized portion (2021) and the unmetallized portion (2022) of the posthole hole (202) extend in a direction perpendicular to the stacking plane of the layers, characterized in that the multilayer printed circuit board (10) further includes one or more metal pads (301), each metal pad (301) being engaged with one of the two surface layers (101) to conceal the unmetallized portion (2022) of the corresponding posthole hole (202).

2. The multilayer printed circuit board (10) according to claim 1, wherein, Parasitic electromagnetic radiation is easily formed inside the postholes (202), and the metal pads (301) are selected to at least partially block the parasitic electromagnetic radiation from propagating out of the postholes (202).

3. The multilayer printed circuit board (10) according to claim 1 or 2, wherein, Parasitic electromagnetic radiation can easily penetrate into the postholes (202), and the metal pads (301) are selected to at least partially block the parasitic electromagnetic radiation from propagating into the postholes (202).

4. The multilayer printed circuit board (10) according to claim 1 or 2, wherein, The geometric characteristics of the metal pad (301) are selected based on one or more characteristics that allow parasitic electromagnetic radiation to easily form in and / or penetrate into the corresponding post hole (202).

5. The multilayer printed circuit board (10) according to claim 1 or 2, wherein, The electrical characteristics of the metal pad (301) are selected based on one or more characteristics that allow parasitic electromagnetic radiation to easily form in and / or penetrate into the corresponding post hole (202).

6. The multilayer printed circuit board (10) according to claim 1 or 2, wherein, These metal pads (301) are identical.

7. The multilayer printed circuit board (10) according to claim 1 or 2, wherein, These metal pads (301) are passive components that do not require power.

8. A process for manufacturing a multilayer printed circuit board (10) and adding components, the multilayer printed circuit board (10) for connecting electronic components (304), characterized in that it comprises the following steps: - generating (51) a stack of a plurality of conductive layers (100), the conductive layers (100) comprising two surface layers (101) and one or more inner layers (102), with an insulating layer (120) ensuring spacing between two adjacent conductive layers (100); - generating (52) electrical connections between the conductive layers (100) through one or more metallized vias (201); - Convert at least one metallized via (201) (53) into a pit hole (202) without filling the pit hole (202) with a resin plug, the pit hole (202) comprising a metallized portion (2021) leading to one of the two surface layers (101) and an unmetallized portion (2022) leading to the other surface layer (101), the metallized portion (2021) and the unmetallized portion (2022) of the pit hole (202) extending in a direction perpendicular to the stacking plane; - Create (54) electrical rails (302) and connecting pads (303) on at least one surface layer of the two surface layers (101).

9. The process of manufacturing a multilayer printed circuit board (10) and adding components as described in claim 8, wherein, It also includes the following steps: - Join (55) one or more metal pads (301) to one or two surface layers (101), each metal pad (301) being joined to conceal the unmetallized portion (2022) of the corresponding posthole (202); - Join (56) one or more electronic components (304) to connection pads (303) belonging to one or two surface layers (101).

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