Carbon gap fill processes

TWI941775BActive Publication Date: 2026-10-11APPLIED MATERIALS INC
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Patent Information

Application Number
TW111138793
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-10-22
Filing Date
2022-10-13
Publication Date
2026-10-11
Estimated Expiration
2042-10-12

AI Technical Summary

Technical Problem

Conventional methods struggle to fill recessed features in semiconductor structures with carbonaceous materials without leaving seams or voids, especially as feature sizes shrink and aspect ratios increase, leading to structural defects and contamination during processing.

Method used

A method involving a carbonaceous precursor and a second precursor is used to form a plasma within a semiconductor processing chamber, applying bias power and controlling temperature and pressure to deposit carbonaceous material uniformly, filling recessed features from the bottom up, thereby reducing or eliminating seams and voids.

Benefits of technology

This approach ensures complete filling of high aspect ratio features without seams or voids, improving structural integrity and reducing contamination by performing deposition and etching in the same chamber, enhancing the quality of semiconductor components.

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Abstract

An exemplary semiconductor processing method may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may define one or more recessed features. The method may include providing a second precursor to the processing region. The method may include forming a plasma containing the carbon-containing precursor and the second precursor in the processing region. The plasma forming of the carbon-containing precursor and the second precursor may be performed at a plasma power greater than or about 500 W. The method may include depositing a carbon-containing material on the substrate. The carbon-containing material may extend within one or more recessed features. The method may include applying a bias power while depositing the carbon-containing material for a second time period, after a first time period of deposition.
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Description

Technical Field

[0001] This application claims the benefit of U.S. Patent Application No. 17 / 508,419, filed October 22, 2021, the entire disclosure of which is incorporated herein by reference for all purposes.

[0002] This technology relates to semiconductor systems, processes, and devices. More specifically, this technology relates to processes and systems for filling gaps with carbon-containing materials. Prior Technology

[0003] Integrated circuits are made possible through processes that create complex patterned material layers on a substrate surface. Producing patterned materials on a substrate requires controlled methods for material formation and removal. As component sizes continue to shrink, features within integrated circuits may become smaller and the aspect ratios of structures may increase, making it challenging to maintain the dimensions of these structures during processing operations. Some processes may result in recessed features in the material, which may need to be filled with material without leaving seams or voids to avoid undesirable effects in further processing. Developing materials that can avoid forming seams or voids may become increasingly difficult.

[0004] Therefore, there is a need for improved systems and methods for producing high-quality components and structures. This technology addresses these and other needs. Summary of the Invention

[0005] An exemplary semiconductor processing method may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may define one or more recessed features along the substrate. The method may include providing a second precursor to the processing region of the semiconductor processing chamber. The method may include forming a plasma containing the carbon-containing precursor and the second precursor in the processing region. The plasma forming of the carbon-containing precursor and the second precursor may be performed at a plasma power greater than or about 500 W. The method may include depositing a carbon-containing material on the substrate. The carbon-containing material may extend along the substrate within one or more recessed features. The method may include applying a bias power while depositing the carbon-containing material on the substrate for a second time period after a first time period of deposition of the carbon-containing material on the substrate. The carbon-containing material may be deposited in situ on the substrate within the same chamber where etching and / or processing operations can be performed. This may reduce queuing time and limit substrate exposure between operations.

[0006] In some embodiments, the carbon-containing precursor may be or includes methane (CH4). One or more recessed features may be characterized by an aspect ratio greater than or about 1:3. The temperature within the semiconductor processing chamber may be maintained below or about 100°C during the deposition of the carbon-containing material onto the substrate. The pressure within the semiconductor processing chamber may be maintained below or about 10 mTorr during the deposition of the carbon-containing material onto the substrate. The second precursor may be or includes helium, a nitrogen-containing precursor, or argon. The method may include reducing the flow rate of the carbon-containing precursor between a first time period and a second time period. The method may include increasing the flow rate of the second precursor between the first time period and the second time period. During the first time period, the flow rate of the carbon-containing precursor may be greater than or about 10 sccm. During the first time period, the flow rate of the second precursor may be greater than or about 300 sccm. The method may include increasing the bias power of the processing region of the semiconductor processing chamber after the carbon-containing material has been deposited for a second time period, while the carbon-containing material is deposited on the substrate for a third time period. The carbon-containing material deposited on the substrate can be essentially seamless or gapless within one or more recessed features along the substrate.

[0007] Some embodiments of this technology may cover semiconductor processing methods. The method may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may define one or more recessed features along the substrate. The method may include forming a plasma containing the carbon-containing precursor in the processing region. The method may include depositing a carbon-containing material on the substrate. The method may include treating the carbon-containing material with a second precursor. The second precursor may extend along the substrate within one or more recessed features. The method may include introducing bias power and treating the carbon-containing material with the second precursor simultaneously with depositing the carbon-containing material. The bias power may be applied gradually. The initial bias power may be 0W.

[0008] In some embodiments, while depositing the carbon-containing material and treating the carbon-containing material on the substrate with the second precursor, the temperature within the semiconductor processing chamber can be maintained at less than or about 75°C. During the deposition of the carbon-containing material and treatment of the carbon-containing material on the substrate with the second precursor, the pressure within the semiconductor processing chamber can be maintained at greater than or about 7 mTorr. After a first time period of carbon-containing material deposition on the substrate, a bias power can be introduced such that the bias power is greater than or about 50 W during a second time period. The second precursor may be or include helium.

[0009] Some embodiments of this technology may cover semiconductor processing methods. The method may include etching one or more recessed features along a substrate. The substrate may be disposed within a processing region of a semiconductor processing chamber. The method may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The method may include providing a second precursor to the processing region of the semiconductor processing chamber. The method may include forming a plasma containing the carbon-containing precursor and the second precursor in the processing region. The plasma may be characterized by having an electronic temperature greater than or about 6 eV. The method may include depositing a carbon-containing material on a substrate. The carbon-containing material may extend along the substrate within one or more recessed features. The carbon-containing material may be deposited in the same semiconductor processing chamber as the etching step. The method may include applying bias power to the processing region of the semiconductor processing chamber after a first time period following the deposition of the carbon-containing material on the substrate.

[0010] In some embodiments, the bias power applied after the first time period may be greater than or about 75 W. The second precursor may be or include helium. The method may include reducing the flow rate of the carbon-containing precursor to the semiconductor processing chamber after the carbon-containing material is deposited for the first time period. During the first time period, the flow rate of the second precursor may be maintained at a flow rate ratio greater than or about 10:1 relative to the carbon-containing precursor.

[0011] This technique can offer many advantages over conventional methods and techniques. For example, these processes can uniformly deposit carbonaceous material within recessed features. Furthermore, these processes can reduce or limit seams or voids in the carbonaceous material deposited within the recessed features. These and other embodiments, along with their many advantages and features, are described in more detail below in conjunction with the accompanying drawings. Simple Explanation of the Diagram

[0012] A further understanding of the nature and advantages of the disclosed technology can be achieved by referring to the remainder of the specification and the accompanying drawings.

[0013] Figure 1 shows a schematic top view of an exemplary processing system according to some embodiments of the present technology.

[0014] Figure 2 shows a schematic cross-sectional view of an exemplary processing system according to some embodiments of the present technology.

[0015] Figure 3 illustrates selected operations in a semiconductor processing method according to some embodiments of the present technology.

[0016] Figures 4A-4D illustrate exemplary schematic cross-sectional structures according to some embodiments of the present technology, including and producing material layers.

[0017] Several accompanying drawings are included as illustrations. It should be understood that these drawings are for illustrative purposes and are not intended to be to scale unless otherwise stated. Furthermore, as illustrations, these drawings are provided to aid understanding and may not include all appearances or information compared to actual representations, and may include exaggerated material for illustrative purposes.

[0018] In the accompanying drawings, similar components and / or features may have the same element symbols. Furthermore, various components of the same type can be distinguished by adding letters after the element symbol to differentiate them. If only the first element symbol is used in the specification, the description applies to any similar part having the same first element symbol, regardless of the letter. Implementation

[0019] As device dimensions continue to shrink, the thickness and size of many material layers can be reduced to scale the device. The size of features within a semiconductor structure can be reduced, and the aspect ratio of those features can be increased. However, as the aspect ratio of features increases, subsequent deposition may become difficult to fill high aspect ratio features without leaving seams or voids.

[0020] Conventional techniques have struggled to backfill recessed features or material deposited on substrates. Material deposition on underlying structures containing recessed features can be incomplete. Conformal fill operations allow features to be sealed near their tops before being filled, and can create seams in the middle of the feature or voids below the sealed top. Furthermore, conventional techniques may require etching, vacuum breaking, and structure transfer within a chamber, as well as deposition in a separate chamber. This transfer can introduce undesirable contamination during the process. In some production processes where subsequent polishing operations may occur, material removal can expose seams or voids, potentially providing access within the recessed feature. Once exposed to the atmosphere, this can allow material oxidation and the incorporation of slurry or other materials along the seams. Therefore, many prior art techniques are limited in their ability to prevent structural defects in the final component.

[0021] This technology overcomes these problems by providing a carbon-containing precursor and a second precursor to backfill recessed features. Deposition can be performed in the same chamber as the etching process, which limits queuing time and improves structural integrity. By providing a second precursor, this technology allows carbon-containing material to be deposited towards the bottom of the recessed feature without sealing or closing it. By depositing material at the bottom of the feature, any seams or voids can be reduced or avoided before the deposited material, thus sealing or closing the feature. By filling features or high aspect ratio structures, this technology can prevent any problems in subsequent integration processes and / or defects in the final component.

[0022] While the remainder of the disclosure will conventionally identify specific etching and deposition processes utilizing the disclosed technique, it will be readily understood that the system and method are equally applicable to a variety of other processes that may occur in the chamber. Therefore, the technique should not be considered limited to use with the described etching or deposition processes. Before describing systems and methods or operations for exemplary processing sequences according to some embodiments of the present technique, this disclosure will discuss a possible system and chamber that can be used with the present technique. It should be understood that the technique is not limited to the described apparatus, and the processes discussed can be performed in any number of processing chambers and systems.

[0023] Figure 1 shows a top view of one embodiment of a processing system 10 with deposition, etching, baking, and / or curing chambers according to an embodiment. The tool or processing system 10 depicted in Figure 1 may include a plurality of processing chambers 24a-d, a transfer chamber 20, a service chamber 26, an integrated metering chamber 28, and a pair of loading gate chambers 16a-b. The processing chambers may include any number of structures or components, and any number or combination of processing chambers.

[0024] To transfer substrates between chambers, transfer chamber 20 may include a robotic transfer mechanism 22. Transfer mechanism 22 may have a pair of substrate transfer blades 22a, each attached to the distal end of an extendable arm 22b. Blades 22a can be used to transport individual substrates into and from processing chambers. In operation, one of the substrate transfer blades, such as blades 22a of transfer mechanism 22, can retrieve a substrate W from one of the loading gate chambers, such as chambers 16a-b, and transport the substrate W to a first stage of processing, for example, in chambers 24a-d for the processing described below. Chambers may be included to perform individual or combined operations of the technique. For example, while one or more chambers may be configured to perform deposition or etching operations, one or more other chambers may be configured to perform the preprocessing operations and / or one or more post-processing operations. This technique includes any number of configurations that can also perform any number of additional manufacturing operations typically performed in semiconductor processing.

[0025] If a chamber is occupied, the robot can wait until processing is complete, then remove the processed substrate from the chamber using a blade 22a, and insert a new substrate using a second blade. Once the substrate has been processed, it can be moved to the second stage of processing. For each move, the transfer mechanism 22 typically has one blade carrying the substrate and one empty blade to perform the substrate replacement. The transfer mechanism 22 can wait in each chamber until the exchange can be completed.

[0026] Once processing is complete within the processing chamber, the transfer mechanism 22 can move the substrate W from the final processing chamber and transfer it to a box within the loading gate chambers 16a-b. From the loading gate chambers 16a-b, the substrate can be moved into the factory interface 12. The factory interface 12 is typically operable to transfer substrates between the container loaders 14a-d and the loading gate chambers 16a-b in a clean atmospheric pressure environment. The clean environment in the factory interface 12 can typically be provided through air filtration treatment, such as HEPA filtration. The factory interface 12 may also include a substrate orienter / aligner, which can be used to properly align the substrates prior to processing. At least one substrate robot (e.g., robot 18a-b) can be positioned within the factory interface 12 to transfer substrates between various locations / positions within the factory interface 12 and to other locations in communication with it. Robot 18a-b can be configured to travel from a first end to a second end of the factory interface 12 along a track system within the factory interface 12.

[0027] The processing system 10 may also include an integrated metrology chamber 28 to provide control signals, which can provide adaptive control for any processing performed in the processing chamber. The integrated metrology chamber 28 may include any of a variety of metrology devices to measure various film properties, such as thickness, roughness, and composition, and the metrology devices may also characterize grating parameters obtained automatically under vacuum, such as critical dimensions, sidewall angles, and characteristic heights.

[0028] Each of the processing chambers 24a-d can be configured to perform one or more processing steps in the fabrication of a semiconductor structure, and any number of processing chambers and combinations thereof can be used in the multi-chamber processing system 10. For example, any processing chamber can be configured to perform multiple substrate processing operations, including any number of deposition processes, including cyclic layer deposition, atomic layer deposition, chemical vapor deposition, physical vapor deposition, and other operations, including etching, pre-cleaning, pretreatment, post-treatment, annealing, plasma treatment, degassing, orientation, and other substrate treatments. Some specific processes that can be performed in any chamber or in any combination of chambers may be metal deposition, surface cleaning and preparation, thermal annealing such as rapid thermal processing, and plasma treatment. As will be readily understood by those skilled in the art, any other processes can similarly be performed in specific chambers incorporated into the multi-chamber processing system 10, including any processes described below.

[0029] Figure 2 illustrates a schematic cross-sectional view of an exemplary processing chamber 100 adapted for patterning a material layer disposed on a substrate 302 within the processing chamber 100. While the exemplary processing chamber 100 is suitable for performing patterning processes, it should be understood that this technique can be performed in any number of chambers, and substrate supports according to this technique can be included in etching chambers, deposition chambers, processing chambers, or any other processing chambers. The plasma processing chamber 100 may include a chamber body 105 defining a chamber volume 101 in which a substrate can be processed. The chamber body 105 may have sidewalls 112 and a bottom 118 coupled to a ground line 126. The sidewalls 112 may have pads 115 to protect the sidewalls 112 and extend the time between maintenance cycles of the plasma processing chamber 100. The dimensions of the chamber body 105 and associated components of the plasma processing chamber 100 are not limited and can generally be proportionally larger than the size of the substrate 302 to be processed. Examples of substrate sizes include diameters of 200 mm, 250 mm, 300 mm, and 450 mm, such as display or solar cell substrates.

[0030] The chamber body 105 can support the chamber cover assembly 110 to enclose the chamber volume 101. The chamber body 105 can be made of aluminum or other suitable materials. A substrate in / out port 113 can be formed through the sidewall 112 of the chamber body 105 to facilitate the entry and exit of the substrate 302 into and out of the plasma processing chamber 100. The in / out port 113 can be coupled to the transfer chamber and / or other chambers of the substrate processing system as described above. A pumping port 145 can be formed through the sidewall 112 of the chamber body 105 and connected to the chamber volume 101. A pumping device can be connected to the chamber volume 101 through the pumping port 145 to evacuate and control the pressure within the processing volume. The pumping device may include one or more pumps and throttle valves.

[0031] Gas panel 160 can be coupled to chamber body 105 via gas line 167 to supply process gas to chamber volume 101. Gas panel 160 may include one or more process gas sources 161, 162, 163, 164, and may additionally include inert gases, non-reactive gases, and reactive gases, such as those usable for any number of processes. Examples of process gases that can be provided by gas panel 160 include, but are not limited to, hydrocarbon gases, including methane, sulfur hexafluoride, silicon chloride, carbon tetrafluoride, hydrogen bromide, hydrocarbon gases, argon, chlorine, nitrogen, helium, or oxygen, and any number of additional materials. In addition, the processing gases may include nitrogen, chlorine, fluorine, oxygen, and hydrogen-containing gases, such as BCl3, C2F4, C4F8, C4F6, CHF3, CH2F2, CH3F, NF3, NH3, CO2, SO2, CO, N2, NO2, N2O, and H2 in any number of other precursors.

[0032] Valve 166 can control the flow of process gas from sources 161, 162, 163, 164 of gas panel 160 and can be managed by controller 165. The gas flow supplied from gas panel 160 to chamber body 105 may include combinations of gases forming one or more sources. Cover assembly 110 may include nozzle 114. Nozzle 114 may be one or more ports for introducing process gas from sources 161, 162, 164, 163 of gas panel 160 into chamber volume 101. After the process gas is introduced into plasma processing chamber 100, the gas can be excited to form plasma. Antenna 148, such as one or more inductors, may be provided adjacent to plasma processing chamber 100. Antenna power supply 142 may power antenna 148 through matching circuit 141 to inductively couple energy, such as RF energy, to the process gas, thereby maintaining plasma formed by the process gas within chamber volume 101 of plasma processing chamber 100. Alternatively, or in addition to the antenna power supply 142, processing electrodes below and / or above the substrate 302 may be used to couple an RF power capacitor to the processing gas to maintain the plasma within the chamber volume 101. The operation of the power supply 142 may be controlled by a controller (e.g., controller 165) that also controls the operation of other components in the plasma processing chamber 100.

[0033] A substrate support base 135 may be disposed within the chamber volume 101 to support the substrate 302 during processing. The substrate support base 135 may include an electrostatic chuck 122 for holding the substrate 302 during processing. The electrostatic chuck ("ESC") 122 may use electrostatic attraction to hold the substrate 302 to the substrate support base 135. The ESC 122 may be powered by an RF power supply 125 integrated with matching circuitry 124. The ESC 122 may include electrodes 121 embedded within a dielectric body. The electrodes 121 may be coupled to the RF power supply 125 and may provide a bias voltage that attracts plasma ions formed by the processing gas in the chamber volume 101 to the ESC 122 and the substrate 302 located on the base. The RF power supply 125 may be cyclically turned on and off or pulsed during processing of the substrate 302. ESC 122 may have an isolator 128 to reduce the attraction of plasma to the sidewalls of ESC 122, thereby extending the maintenance life cycle of ESC 122. Additionally, the substrate support 135 may have a cathode pad 136 to protect the sidewalls of the substrate support 135 from plasma gases and extend the time between maintenance of the plasma processing chamber 100.

[0034] Electrode 121 may be coupled to power supply 150. Power supply 150 may provide a clamping voltage of approximately 200 volts to approximately 2000 volts to electrode 121. Power supply 150 may also include a system controller for controlling the operation of electrode 121 to clamp and de-chucking substrate 302 by directing DC current to electrode 121. ESC 122 may include a heater disposed within a base and connected to a power supply for heating the substrate, while a cooling base 129 supporting ESC 122 may include conduits for circulating heat transfer fluid to maintain the temperature of ESC 122 and substrate 302 placed thereon. ESC 122 may be configured to operate within the temperature range required by the thermal budget of the components manufactured on substrate 302. For example, ESC 122 may be configured to maintain substrate 302 at a temperature of approximately -150°C or lower to approximately 500°C or higher, depending on the process being performed.

[0035] A cooling base 129 may be provided to help control the temperature of the substrate 302. To mitigate process drift and time, the temperature of the substrate 302 can be kept substantially constant via the cooling base 129 throughout the time the substrate 302 is in the cleaning chamber. In some embodiments, the temperature of the substrate 302 can be maintained between about -150°C and about 500°C throughout the subsequent cleaning process, although any temperature may be used. A cover ring 130 may be disposed on the ESC 122 and along the periphery of the substrate support base 135. The cover ring 130 may be configured to confine etching gases to a desired portion of the exposed top surface of the substrate 302 while shielding the top surface of the substrate support base 135 from the plasma environment within the plasma processing chamber 100. A lifting pin may be selectively translated through the substrate support base 135 to lift the substrate 302 above the substrate support base 135, thereby facilitating access to and from the substrate 302 via a transfer robot or other suitable transfer mechanism as described above.

[0036] The controller 165 can be used to control the processing sequence, regulate the airflow from the gas panel 160 into the plasma processing chamber 100, and other processing parameters. When the CPU executes the software routine, the software routine transforms the CPU into a purpose-built computer (e.g., a controller) that can control the plasma processing chamber 100 to perform processing according to the present invention. The software routine can also be stored and / or executed by a second controller associated with the plasma processing chamber 100.

[0037] The aforementioned processing chambers can be used during the method according to embodiments of the present invention. Figure 3 illustrates a semiconductor processing method 300, the operation of which can be performed, for example, in one or more chambers 100 incorporated in a multi-chamber processing system 10 as described above. Any other chamber may also be used, which can perform one or more operations of any of the described methods or processes. Method 300 may include one or more operations prior to the commencement of the method operations, including front-end processing, deposition, etching, polishing, cleaning, or any other operations that may be performed prior to said operations. The method may include a number of optional operations as shown in the figure, which may or may not be specifically associated with the method according to the present invention. For example, many operations are described to provide a wider range of semiconductor processing but are not critical to the technology, or may be performed via alternative methods discussed further below.

[0038] Method 300 may include multiple operations that can be performed in various variations, such as including initiation at different processing operations. Method 300 typically includes a deposition operation that can occur in a chamber in which an etching process can be performed. Typically, deposition can be performed after etching. Therefore, although method 300 will be described in a specific order, it should be understood that the method can be performed in many different variations according to embodiments of the present technology. Method 300 can be described by the operations schematically shown in Figures 4A-4D, the illustrations of which will be described in conjunction with the operations of method 300. It should be understood that the structure 400 diagrams in Figures 4A-4D only show partial schematics, and the substrate 405 may contain any number of structural portions having the state shown in the figures, as well as alternative structural states that can still benefit from the operations of the present technology.

[0039] Referring to Figures 4A-4B, in optional operation 305, the method may include etching pads along substrate 405 from one or more features. Substrate 405 may be disposed within a processing region of a semiconductor processing chamber. In embodiments, substrate 405 may have a substantially flat or non-flat surface. Substrate 405 may be, for example, crystalline silicon, silicon oxide, strained silicon, silicon germanium, doped or undoped polycrystalline silicon, doped or undoped silicon wafers, patterned or unpatterned wafers, silicon on insulators, carbon-doped silicon oxide, silicon nitride materials, doped silicon, germanium, gallium arsenide, or sapphire. Substrate 405 may have various sizes, such as wafers with diameters of 200 mm or 300 mm, and rectangular or square panels. As shown in Figure 4B, etching one or more features 410 along substrate 405 may selectively remove material from substrate 405 or from material previously deposited on substrate 405. Substrate 405 may include a pad material 415 and a mandrel material 420 formed above substrate 405. The pad material 415 may be conformally formed around any exposed portion of substrate 405 between mandrel material 420 and mandrel. Operation 305 may include etching a portion of pad material 415 and / or mandrel material 420 to recess the side surfaces of the pad exposed in directional etching to create a structure with gaps such as feature 410 between mandrels 420, which may expose portions of substrate 305 between mandrels. Any type of etching process may be used to form one or more recessed features 410 along substrate 405, and may include directional etching to remove pad material across the entire upper surface of the mandrel and lateral portions of the substrate between mandrels, while retaining pad 415 along the sidewalls of the mandrel material.

[0040] One or more features 410 may be characterized by an aspect ratio greater than or about 1:3 (or a height-to-width ratio feature). For example, embodiments of the present disclosure are applicable to gap-filling features characterized by aspect ratios greater than or about 1:2, greater than or about 1:1, greater than or about 2:1, greater than or about 3:1, greater than or about 4:1, greater than or about 5:1, or more. The height of the recessed feature 410 may be greater than or about 30 nm, greater than or about 40 nm, greater than or about 50 nm, or greater. As the aspect ratio increases, filling the recess or gap may become more difficult because the material being deposited may deposit on the upper part of the recess, causing the recess to close or seal and leaving a seam or void within the recess. As further described below, embodiments of the present disclosure may deposit carbonaceous material toward the lower part of the recess before the upper part closes or seals it. That is, embodiments of the present disclosure may fill the recess or gap without leaving a seam or void within the recess or gap.

[0041] In operation 310, method 200 may include providing a carbon-containing precursor to a processing region of the semiconductor processing chamber 100. The carbon-containing precursor that can be used in operation 310 may be or include any amount of carbon-containing precursors. For example, the carbon-containing precursor may be or include any hydrocarbon, or any material comprising or consisting of carbon and hydrogen. The precursor may include carbon and hydrogen-containing precursors, which may include any amount of carbon and hydrogen bonds as well as any other elemental bonds. In an embodiment, the carbon-containing precursor may be or include methane (CH4).

[0042] The flow rate of the carbon-containing precursor can be greater than or about 10 sccm, and can be greater than or about 20 sccm, greater than or about 30 sccm, greater than or about 40 sccm, greater than or about 50 sccm, greater than or about 60 sccm, greater than or about 70 sccm, or higher. The flow rate of the carbon-containing precursor can be adjusted according to the desired growth rate. In addition, the flow rate of the carbon-containing precursor can be adjusted according to the aspect ratio of the recessed feature 410. For example, for features with high growth rates or low aspect ratios, the flow rate of the carbon-containing precursor can be increased to higher values. A higher flow rate of the carbon-containing precursor can reduce the mean free path of the resulting plasma components (described below) and result in scattering that prevents the carbon-containing material from reaching the bottom of the recessed feature 410, or increase deposition on the sides and top surface of the structure. Therefore, in some embodiments, the flow rate of the carbon-containing precursor can be maintained at less than or about 100 sccm, and can be maintained at less than or about 90 sccm, less than or about 80 sccm, less than or about 70 sccm, less than or about 60 sccm, less than or about 50 sccm, or less.

[0043] In operation 315, method 200 may include providing a second precursor to a processing region of the semiconductor processing chamber 100, which may occur simultaneously with the delivery of a carbon-containing precursor. The second precursor may be or include helium, a nitrogen-containing precursor, or argon. For a variety of reasons, the second precursor may facilitate the formation of a carbon-containing material on the bottom of the recessed feature 410, as will be further described below. The flow rate of the second precursor may be greater than or about 300 sccm. The increased flow rate of the second precursor may facilitate the deposition of the carbon-containing material on the bottom of the recessed feature 410. This may be due to increased plasma temperature or increased momentum driving the carbon-containing material in the recessed feature 410. Therefore, the flow rate of the second precursor may be greater than or about 350 sccm, greater than or about 400 sccm, greater than or about 450 sccm, greater than or about 500 sccm, greater than or about 600 sccm, greater than or about 700 sccm, or higher.

[0044] The flow rates of the carbon-containing precursor and the second precursor can be correlated and can be adjusted over time, as will be further described below. For example, the flow rate of the second precursor can be maintained at a flow rate ratio greater than or about 10:1 relative to the carbon-containing precursor while depositing the carbon-containing material. For example, the flow rate of the second precursor can be maintained at a flow rate ratio greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 35:1, greater than or about 40:1, or more relative to the carbon-containing precursor. Providing a larger amount of the second precursor can help deposit the carbon-containing material at the bottom of the recessed feature 410 without depositing so much carbon-containing material at the top of the recessed feature 410 that the recessed feature 410 is sealed or closed while seams or voids remain.

[0045] In operation 320, method 200 may include forming a plasma. The plasma may be formed from a carbon-containing precursor and / or a second precursor in a processing region of the semiconductor processing chamber 100. Plasma formation may be performed at a plasma power greater than or about 500 W. A plasma power greater than or about 500 W can increase the electron temperature in the plasma. A higher electron temperature can facilitate the deposition of carbon-containing material in the recessed feature 410. Therefore, plasma formation may be performed at plasma powers greater than or about 600 W, greater than or about 700 W, greater than or about 800 W, greater than or about 900 W, greater than or about 1,000 W, greater than or about 1,250 W, greater than or about 1,500 W, greater than or about 1,750 W, greater than or about 2,000 W, or higher. The plasma may be characterized by an electron temperature greater than or about 6 eV.

[0046] In addition to the increased overall plasma temperature due to the increased electron temperature, the increased electron temperature can generate high-energy ions in the plasma. These high-energy ions may be able to travel deeper into the recessed feature 410, which can facilitate the deposition of carbon-containing materials in the recessed feature 410. At high source power and electron temperature, the carbon-containing ions excited in the plasma can overcome the electrostatic or van der Waals forces applied along the upper surface of the recessed feature 410 and travel deeper into the recessed feature 410, allowing material to be deposited at the bottom of the recessed feature 410.

[0047] As shown in Figures 4C-4D, in operation 325, method 200 may include depositing a carbon-containing material 425 on a substrate 405. The carbon-containing material 425 may extend along the substrate 405 within one or more recessed features 410. Carbon deposition can more readily occur on cooler surfaces across the entire substrate, and bottom-up filling within the features can be improved using plasma and material temperature and properties according to embodiments of the present technology. The temperature at the bottom of the recessed feature 410 may be kept lower than the temperature at the top of the recessed feature 410, depending on the second precursor used. That is, the top of the recessed feature may be affected by the plasma temperature (e.g., the electron temperature in the plasma), while the bottom of the recessed feature may be affected by the electrostatic chuck temperature. For example, when the second precursor is helium, the electron temperature in the plasma formed in operation 320 may be increased compared to other second precursors. Because helium has only two electrons in one orbital, forming a plasma requires greater energy than argon, which has eighteen electrons in more than one orbital. For example, electrons removed from helium are closer to the nucleus than electrons removed from argon, thus requiring greater energy to remove them. This increase in electron temperature can also increase the overall temperature of the plasma. Therefore, while using argon or nitrogen as a carrier gas can limit the electron temperature of the plasma to less than or about 5 eV, less than or about 4 eV or lower, forming a plasma with increased helium addition can increase the electron temperature to higher levels, greater than or about 6 eV, greater than or about 8 eV, greater than or about 10 eV, or more.

[0048] As the temperature of the plasma above substrate 405 increases, features on the upper surface of structures on the substrate can have a higher temperature than recessed features 410 or locations further away from plasma exposure. This temperature difference between upper surfaces (e.g., across the entire top of the mandrel, across the entire lower surface between the mandrel and the mandrel, or across the entire exposed area of ​​the substrate) can improve bottom coverage and filling while limiting or slowing formation on the upper surfaces. Therefore, as the material completely fills from bottom to top, the carbon-containing material 425 deposited on substrate 405 can have no or substantially no seams or voids within one or more recessed features 410 along substrate 405. "Substantially no" means that less than 50% of the recessed features 410 may include seams or voids after the carbon-containing material 425 has been deposited on substrate 405.

[0049] As previously mentioned, helium can increase the electron temperature in the plasma, thus increasing the overall temperature in the plasma. This may cause the carbon-containing material 425 to form at the bottom of the recessed feature faster than at the top. However, when the second precursor is a nitrogen-containing precursor or argon, the carbon-containing material 425 can still be deposited, such that the carbon-containing material 425 deposited on the substrate 405 may have little or no presence along the seams or gaps of the substrate 405 within one or more recessed features 410. For example, using a nitrogen-containing precursor or argon, the carbon-containing material 425 can be driven downward into the recessed feature 410 due to the greater momentum of the larger ions in the plasma. That is, nitrogen-containing precursors and argon can have higher atomic weights than helium, and due to the momentum and mean free path of the ions, the carbon-containing material 425 can be forced downward into the recessed feature 410. Therefore, in some embodiments, a certain amount of nitrogen and / or argon may be used during deposition. Furthermore, in some embodiments, the deposition precursor may be nitrogen- or argon-free, and the carrier gas used for the carbon-containing precursor may consist only of helium, for the reasons stated above.

[0050] During operation 325, while depositing carbon-containing material 425 onto substrate 405, the temperature within semiconductor processing chamber 100 (e.g., substrate support temperature or substrate temperature) can be maintained at less than or about 100°C. As previously described, the lower temperature towards the bottom of substrate 405 facilitates the deposition of carbon-containing material 425 at the bottom of recessed feature 410 without sealing or closing the recessed feature 410 before filling with carbon-containing material 425. Therefore, the temperature within semiconductor processing chamber 100 can be maintained at less than or about 90°C, less than or about 80°C, less than or about 70°C, less than or about 60°C, less than or about 50°C, less than or about 40°C, less than or about 30°C, less than or about 20°C, less than or about 10°C, or lower.

[0051] Furthermore, when carbon-containing material 425 is deposited on substrate 405, the pressure within semiconductor processing chamber 100 can be maintained at less than or about 10 mTorr. At lower pressures, such as less than or about 10 mTorr, the mean free path of ions in the plasma may be longer. Similarly, lower pressures can allow for greater ion energy in the plasma. With a longer mean free path, carbon-containing material 425 may be able to reach the bottom of recessed feature 410 without first accumulating on top of recessed feature 410 and sealing or closing it. At higher pressures, the mean free path may decrease and scattering may increase, which may cause carbon-containing material 425 to deposit on top of recessed feature 410 instead of the bottom. Therefore, the pressure within semiconductor processing chamber 100 can be maintained at less than or about 9 mTorr, less than or about 8 mTorr, less than or about 7 mTorr, less than or about 6 mTorr, less than or about 5 mTorr, less than or about 4 mTorr, less than or about 3 mTorr, less than or about 2 mTorr, or lower.

[0052] In operation 330, method 200 may include applying a bias power while continuing to deposit the carbon-containing material 425 on the substrate 405 for a second time period after a first time period of deposition of the carbon-containing material 425 on the substrate 405. Furthermore, in operation 330, method 200 may include reducing the flow rate of the carbon-containing precursor between the first and second time periods, and may additionally include increasing the flow rate of a second precursor between the first and second time periods during operation 330.

[0053] Initially, when depositing carbon-containing material 425 on substrate 405, bias power can be applied to the plasma without applying bias power, and deposition can be performed directly from the source power. By starting method 200 without bias, carbon-containing material 425 can be deposited as a conformal protective layer on one or more recessed features 410, such that the final application of bias power will not damage the remaining padding material through the mandrel material 420 or one or more recessed features 410. The bias power applied after the first time period can be greater than or about 75 W. By applying bias power, one or more recessed features 410 can be more uniformly filled with carbon-containing material 425, while controlling or limiting further deposition along the top of the features. By applying bias power, carbon-containing material 425 can be further deposited in one or more recessed features 410. Without bias power, carbon-containing material 425 may tend to deposit on top of one or more recessed features 410. This bias voltage can increase directional delivery and facilitate the deposition of carbon-containing material 425 on the bottom of one or more recessed features 410. By increasing the deposition rate at the bottom of one or more recessed features 410, the one or more recessed features 410 can be filled with carbon-containing material 425 before the upper part of the one or more recessed features 410 is closed or sealed, leaving seams or gaps in the features. Therefore, the bias voltage can be greater than or about 100 W, greater than or about 150 W, greater than or about 200 W, greater than or about 250 W, greater than or about 300 W, or higher. However, if the applied bias voltage is too high, one or more recessed features 410 may be damaged. For example, if the bias voltage is too high (e.g., greater than 400 W), the mandrel material 420 and / or the padding material 415 may fracture, crack, or break. Therefore, the bias voltage can be less than or about 400W, less than or about 350W, less than or about 325W, less than or about 300W, less than or about 250W or lower.

[0054] After depositing the carbon-containing material 425 during the second time period, method 200 may include increasing the bias power while continuing to deposit the carbon-containing material 425 on the substrate 405 during a third time period. After starting the deposition of the carbon-containing material 425, the bias power may be increased. During the third time period, the bias power may be increased to a level greater than or about 400 W, because the deposited carbon-containing material 425 can be used to protect the mandrel material 420 and / or the pad material 415 from damage due to the increased bias power.

[0055] Depending on the structure being filled, any number of additional operations can be performed. For example, in embodiments of this technology, multi-step deposition can be performed, where a first deposition can be performed without bias power, followed by any number of additional deposition operations with increased bias power. As described above, the first operation can include a higher flow rate ratio of the carbon-containing precursor to the second precursor, which can more conformally increase carbon deposition across the entire feature. Therefore, the first deposition without bias can be performed in a reduced time relative to subsequent deposition operations, which may limit the amount of coverage formed across the entire upper surface of the feature. In some embodiments, the first deposition operation can be performed for less than or about 60 seconds, and can be performed for less than or about 50 seconds, less than or about 40 seconds, less than or about 30 seconds, or less. Furthermore, the flow rate ratio of the second precursor to the carbon-containing precursor can be greater than or about 20:1, and can be less than or about 18:1, less than or about 16:1, less than or about 14:1, or less.

[0056] After the first time period, a bias voltage can be applied as described above, and the flow rate ratio of the second precursor to the carbon-containing precursor can be increased to greater than or about 15:1, greater than or about 20:1, greater than or about 25:1, or greater. The flow rate ratio can be adjusted by increasing the second precursor flow, decreasing the carbon-containing precursor flow, or both. This allows for more anisotropic filling within the feature and a certain amount of trimming at the upper surface of the feature. In some embodiments, the second deposition operation can occur at any of the times described above and can occur for a longer or shorter time period than the first deposition operation. These adjustments can be continued any number of times to further increase the flow rate ratio, which can continue to allow bottom-up deposition through the feature. For example, after the second time period, further adjustments to the bias voltage power may or may not occur, and the flow rate ratio between the second precursor and the carbon-containing precursor can be further increased to greater than or about 20:1, greater than or about 25:1, greater than or about 30:1, greater than or about 40:1, or greater. Similarly, the flow rate ratio can be adjusted by increasing the second precursor stream, decreasing the carbon-containing precursor stream, or both. Due to the reduced amount of carbon relative to the second precursor, and depending on the size or aspect ratio of the feature being filled, the third or subsequent time period can be longer than the first time period, and can be greater than or about 60 seconds, greater than or about 80 seconds, greater than or about 100 seconds, greater than or about 150 seconds, greater than or about 200 seconds, greater than or about 250 seconds, greater than or about 300 seconds, or longer. Further adjustments may continue during this or any subsequent deposition time period. Method 200 is intended to include any number of iterations or steps to form the carbon-containing material 425, and these three steps are purely exemplary. For example, four, five, six, seven, or more steps can be used, where the bias and flow rate can be modified. By using a multi-step method, one or more recessed features 410 can be filled with the carbon-containing material 425 without resulting in mushroom or bread shapes on the recessed features 410. Furthermore, the carbon-containing material 425 may have no or substantially no seams or voids.

[0057] In the foregoing description, numerous details have been set forth for illustrative purposes in order to provide an understanding of various embodiments of the present technology. However, it will be apparent to those skilled in the art that certain embodiments may be practiced without some of these details or with additional details.

[0058] Several embodiments have been disclosed, and those skilled in the art will recognize that various modifications, alternative constructions, and equivalents can be used without departing from the spirit of the embodiments. Furthermore, to avoid unnecessarily obscuring the present technology, many well-known processes and elements have not been described. Therefore, the above description should not be considered as limiting the scope of the present technology.

[0059] When a range of values ​​is provided, it should be understood that each intermediate value (unless otherwise explicitly specified by the context, accurate to the smallest fraction of the lower limit unit) also specifically reveals the intermediate value between the upper and lower limits of the range. This includes any specified value or unspecified intermediate value within a specified range and any narrower range between any other specified or intermediate value within that specified range. The upper and lower limits of these smaller ranges may be independently included or excluded from the range, and each range (where one or both limits are included in the smaller range) is also included in the technique, subject to the range specified by any explicitly excluded limit. If the range includes one or both limits, it also includes the range that excludes one or both limits.

[0060] As used herein and in the appended claims, the singular forms “a” and “the” include plural references unless the context clearly specifies otherwise. Thus, for example, reference to “carbon-containing precursor” includes a plural of such precursors, and reference to “carbon-containing material” includes reference to one or more materials and their equivalents known to an ordinary person skilled in the art, and so on.

[0061] Furthermore, when the terms "comprising," "including," "containing," and "including" are used in this specification and below, the request is intended to specify the presence of the stated feature, integer, component, or operation, but does not preclude the presence or addition of one or more other features, integers, components, operations, actions, or groups.

[0062] 10: Processing System 24a-d: Processing chamber 20: Transfer Chamber 26: Service Chamber 28: Integrated metrology chamber 16a-b: Loading gate chamber 22: Conveying mechanism 22b: Extendable arm 22a: Blade 12: Factory Interface 18a-b: Robots 100: Processing Chamber 302:Substrate 105: Main body of the chamber 101: Chamber volume 112: Sidewall 118: Bottom 126: Ground wire 115: Padding 113: Tonglu Port 145: Pumping Port 160: Gas Panel 167: Gas pipeline 161, 162, 163, 164: Processing gas sources 166: Valve 165: Controller 110: Cover assembly 114: Nozzle 148: Antenna 142: Antenna power supply 141: Matching Circuit 135: Substrate support base 122: Electrostatic Chuck 124: Matching Circuit 121: Electrode 125: RF power supply 128: Isolator 136: Cathode pad 150: Power Supply 129: Cooling Base 130: Cap ring 300: Method 405:Substrate 305: Operation 410: Features 415: Padding Material 420: Mandrel Material 310: Operation 200: Method 315: Operation 320: Operation 325: Operation 425: Carbon-containing materials 330: Operation

[0063] Domestic storage information (please note in order of storage institution, date, and number) none Overseas storage information (please note in the order of storage country, institution, date, and number) none

Claims

1. A semiconductor processing method comprising the steps of: providing a carbon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed in the processing region of the semiconductor processing chamber, and wherein the substrate defines one or more recessed features along the substrate; providing a second precursor to the processing region of the semiconductor processing chamber; forming a plasma of the carbon-containing precursor and the second precursor in the processing region, wherein the plasma forming the carbon-containing precursor and the second precursor is performed at a plasma power greater than or about 500 W; depositing a carbon-containing material on the substrate, wherein the carbon-containing material extends within the one or more recessed features along the substrate; and after depositing the carbon-containing material on the substrate for a first time period, applying a bias power while simultaneously depositing the carbon-containing material on the substrate for a second time period.

2. The semiconductor processing method as described in claim 1, wherein, The carbon-containing precursor includes methane (CH4).

3. The semiconductor processing method as described in claim 1, wherein, The characteristic of one or more recessed features is that they have an aspect ratio greater than or about 1:

3.

4. The semiconductor processing method as described in claim 1, wherein, While the carbon-containing material is deposited on the substrate, the temperature inside the semiconductor processing chamber is maintained below or about 100°C.

5. The semiconductor processing method of claim 1, wherein when the carbon-containing material is deposited on the substrate, a pressure within the semiconductor processing chamber is maintained at less than or about 10 mTorr.

6. The semiconductor processing method as claimed in claim 1, wherein the second precursor comprises helium, a nitrogen-containing precursor, or argon.

7. The semiconductor processing method as claimed in claim 1 further includes the step of reducing a flow rate of the carbon-containing precursor between the first time period and the second time period.

8. The semiconductor processing method as claimed in claim 1, further comprising the step of increasing the flow rate of the second precursor between the first time period and the second time period.

9. The semiconductor processing method as described in claim 1, wherein: During the first time period, the flow rate of the carbon-containing precursor is greater than or about 10 sccm; and during the first time period, the flow rate of the second precursor is greater than or about 300 sccm.

10. The semiconductor processing method of claim 1, further comprising the step of: after depositing the carbon-containing material during the second time period, increasing the bias power of the processing region of the semiconductor processing chamber during a third time period while depositing the carbon-containing material on the substrate.

11. The semiconductor processing method of claim 1, wherein the carbon-containing material deposited on the substrate has substantially no seams or gaps within the one or more recessed features along the substrate.

12. A semiconductor processing method comprising the steps of: providing a carbon-containing precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed in the processing region of the semiconductor processing chamber, and wherein the substrate defines one or more recessed features along the substrate; forming a plasma of the carbon-containing precursor in the processing region; depositing a carbon-containing material on the substrate; treating the carbon-containing material with a second precursor, wherein the second precursor extends the carbon-containing material within the one or more recessed features along the substrate; and introducing a bias power simultaneously with the deposition of the carbon-containing material and the treatment of the carbon-containing material with the second precursor, wherein the bias power is gradually applied, and wherein an initial bias power is 0W.

13. The semiconductor processing method as described in claim 12, wherein: When the carbon-containing material is deposited and the carbon-containing material on the substrate is treated with the second precursor, a temperature in the semiconductor processing chamber is maintained below or about 75°C; and while the carbon-containing material is deposited and the carbon-containing material on the substrate is treated with the second precursor, a pressure in the semiconductor processing chamber is maintained above or about 7 mTorr.

14. The semiconductor processing method of claim 12, wherein after the carbon-containing material is deposited on the substrate for a first time period, the bias power is introduced such that the bias power is greater than or about 50W during a second time period.

15. The semiconductor processing method as claimed in claim 12, wherein the second precursor comprises helium.

16. A semiconductor processing method comprising the steps of: etching one or more recessed features along a substrate, wherein the substrate is disposed in a processing region of a semiconductor processing chamber; providing a carbon-containing precursor to a processing region of the semiconductor processing chamber; providing a second precursor to the processing region of the semiconductor processing chamber; forming a plasma of the carbon-containing precursor and the second precursor in the processing region, wherein the plasma is characterized by having an electron temperature greater than or about 6 eV; depositing a carbon-containing material on the substrate, wherein the carbon-containing material extends along the one or more recessed features of the substrate, and wherein the carbon-containing material is deposited in the same semiconductor processing chamber as the etching; and after a first time period following the deposition of the carbon-containing material on the substrate, applying a bias power to the processing region of the semiconductor processing chamber.

17. The semiconductor processing method as claimed in claim 16, wherein the bias power applied after the first time period is greater than or about 75W.

18. The semiconductor processing method as described in claim 16, wherein, The second precursor includes helium.

19. The semiconductor processing method of claim 16, further comprising, after the first time period of depositing the carbon-containing material, reducing a flow rate of the carbon-containing precursor into the semiconductor processing chamber.

20. The semiconductor processing method of claim 16, wherein during the first time period, the flow rate of the second precursor is maintained at a ratio of more than or about 10:1 to the flow rate of the carbon-containing precursor.

Citation Information

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