Package structure

Abstract

A packaging structure is provided, including a packaging substrate, an interposer bonded to the packaging substrate, a first die and a second die bonded to the interposer via microbumps, an underfill material surrounding the microbumps and located between the first die and the interposer and between the second die and the interposer, a metal layer interfacing the interposer, the underfill material, the sidewalls of the first die and the sidewalls of the second die, a molding compound covering the metal layer, and a thermal interface material covering the molding compound, the metal layer, and the first and second dies.

Description

Technical Field

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 699,949, filed on September 27, 2024, the entire contents of which are incorporated herein by reference.

[0002] This disclosure relates to package structures, and in particular to the heat dissipation structure of the package structure. Prior Technology

[0003] In some three-dimensional integrated circuits (3DICs), the device die is bonded to a package substrate to form a package. The heat generated by the device die during operation needs to be dissipated to prevent performance degradation or even physical damage. Furthermore, the package structure itself may lack sufficient structural strength to prevent warping. Summary of the Invention

[0004] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first die and a second die, an underfill material, a metal layer, a molding compound, and a thermal interface material. The interposer is bonded to the packaging substrate. The first die and the second die are bonded to the interposer via a plurality of microbumps. The underfill material surrounds the microbumps and is disposed between the first die and the interposer, and between the second die and the interposer. The metal layer interfaces the interposer, the underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The molding compound is located above the metal layer. The thermal interface material is located above the molding compound, the metal layer, the first die, and the second die.

[0005] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first underfill material, a first die and a second die, a second underfill material, a metal layer, a first molding compound, a thermal interface material, and a second molding compound. The interposer is bonded to the packaging substrate via a plurality of first-type bumps. The first underfill material surrounds the first-type bumps. The first die and the second die are bonded to the interposer via a plurality of second-type bumps. The second underfill material surrounds the second-type bumps. The metal layer interfaces the interposer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The first molding compound is located on the metal layer. The thermal interface material is disposed on the first molding compound, the metal layer, the first die, and the second die. The second molding compound is located on the packaging substrate and surrounds the first underfill material and the first molding compound.

[0006] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first underfill material, a first die and a second die, a second underfill material, a metal layer, a first molding compound, a second molding compound, and a thermal interface material. The interposer is bonded to the packaging substrate via a plurality of first-type bumps. The first underfill material surrounds the first-type bumps. The first die and the second die are bonded to the interposer via a plurality of second-type bumps. The second underfill material surrounds the second-type bumps. The metal layer interfaces the interposer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The first molding compound is located on the metal layer. The second molding compound is located on the packaging substrate and surrounds the first underfill material and the first molding compound. The thermal interface material is located above the first molding compound, the second molding compound, the metal layer, the first die, and the second die. The metal layer includes titanium copper, copper, or gold. Simple Explanation of the Diagram

[0007] This disclosure will be better understood by reading the following detailed description and referring to the accompanying drawings. This disclosure follows industry standard practices and the illustrations are not to scale and are for illustrative purposes only. In fact, for ease of discussion, the dimensions of the features may be arbitrarily enlarged or reduced. Figure 1 shows a flowchart of a method 100 for forming an encapsulation structure according to various examples of this disclosure. Figure 2-24 shows a partial cross-sectional or top view of the work-in-progress structure when processed via different steps of method 100 of Figure 1 according to various examples of this disclosure. Figures 25-32 show alternative packaging structures formed by using modified method 100 according to various examples of this disclosure. Implementation

[0008] The following disclosure provides many different embodiments or examples to achieve the unique features of the provided subject matter. The following content will list specific examples for components and their configurations to simplify this disclosure. However, these are merely examples and are not intended to be limiting. For example, when the following description mentions "forming a first feature on or above a second feature," it may include cases where the first feature and the second feature are in direct contact, or cases where other features are formed between the first feature and the second feature, preventing direct contact between them. Furthermore, the same reference numerals or letters may be repeated in different embodiments in this disclosure; such repetition is solely for simplification and clarification and does not imply a necessary correspondence or relationship between these embodiments or configurations.

[0009] This document uses spatially relative terms, such as "below," "above," "lower," "higher," and other similar words, to describe the relationship between one or more elements in the accompanying drawings. These spatially relative terms are also intended to include orientations or positioning that differ from the devices shown in the drawings during actual application or operation. Devices may be oriented in other ways (e.g., rotated 90°, or positioned in other orientations), and the corresponding spatial descriptions will be interpreted accordingly.

[0010] Furthermore, when using terms such as "about" or "approximately" to describe a value or range, it means that the value itself is within an acceptable tolerance range, taking into account reasonable manufacturing tolerances known to those skilled in the art. For example, if it is known that the manufacturing tolerance is approximately ±15%, then "a material layer approximately 5 nm thick" means that it covers a range of approximately 4.25 nm to 5.75 nm. Early semiconductor packaging technology was simply a backend process used to assist in connecting chips to external circuits. However, today, highly evolved computing workloads have made packaging technology a cutting-edge area of ​​innovation. Modern packaging can integrate multiple chips or stacks of chips into a single semiconductor device. Depending on the level of stacking, modern semiconductor packaging can be a 2.5D or 3D structure. In a 2.5D structure, at least two dies communicate chip-to-chip via a redistribution layer (RDL) or silicon interposer. In a 3D structure, at least two dies are vertically stacked and interconnected via through-silicon vias (TSVs). Depending on the process flow used, either the 2.5D or 3D structure can be an integrated fan-out (InFO) or a chip-on-wafer-on-substrate (CoWoS®) package. For high-power-density 3DIC packages (e.g., system-on-chip (SoC) or system-on-integrated-chips (SoIC)), heat cannot be effectively dispersed or dissipated through the silicon substrate, easily forming hot spots on the dies, leading to overheating or even burnout. Since the molding compound or underfill materials surrounding the bare die are usually insulating and have poor thermal conductivity, they cannot effectively assist in heat dissipation.

[0011] This disclosure provides a method for forming a package structure, wherein a metal layer is deposited beneath and around an underfill material. The metal layer extends upward along the sidewalls of the die and interfaces with a thermal interface material (TIM). The metal layer facilitates heat conduction to the TIM and connects to a heat sink fin structure. In some embodiments, the die is first bonded to an interposer, and a portion of the metal layer interfaces with the top surface of the interposer. In further embodiments, a sealing ring structure is provided at an edge location in the interposer, and the metal layer interfaces with the sealing ring structure, allowing heat to be directed beneath the package substrate.

[0012] The various aspects of this disclosure will now be explained in more detail with reference to the figures. Figure 1 is a flowchart of method 100, illustrating how an encapsulation structure is formed on a work-in-progress (WIP) structure 200. Method 100 is merely an example and is not intended to limit the ways in which this disclosure can be used. Additional steps may be added before, after, or between this process, or some steps may be deleted or rearranged. Not all steps are presented in detail here for the sake of simplicity. Figures 2-19 are also shown below, which illustrate partial cross-sectional or top views of the work-in-progress structure 200 at different stages of the manufacturing process. Since the work-in-progress structure 200 will eventually be fabricated into an encapsulation structure, it may also be referred to as an encapsulation structure 200 where appropriate. To avoid confusion, the X, Y, and Z directions in Figures 2-24 are perpendicular to each other. In the following description, unless otherwise stated, the same reference numerals denote the same features.

[0013] Referring to Figures 1 and 2, method 100 includes block 102, forming an interposer layer 210 on a first carrier substrate 201A. In some embodiments, the first carrier substrate 201A may be a glass, ceramic, semiconductor, or polymer carrier substrate. Although not shown in the figures, a release film may be deposited on the first carrier substrate 201A prior to forming the interposer layer 210 thereon. The release film may contain a light-to-heat-conversion (LTHC) coating material and be deposited in a suitable manner. This release film is decomposed when heated by light or laser. Subsequently, a series of insulating layers and redistribution layers (RDLs) are formed on the release film. The redistribution layers may be fabricated on the release film by electroplating. For example, a seed layer may be deposited first using methods such as physical vapor deposition (PVD), plasma-enhanced chemical vapor deposition (PECVD), or atomic layer deposition (ALD). The seed layer may include an adhesive layer and a copper-containing layer. The adhesive layer can be titanium, titanium nitride, tantalum, tantalum nitride, etc., while the copper-containing layer can be copper or its alloy. An electroplating mask has openings to expose the seed layer. Copper, aluminum, nickel, cobalt, palladium, or other metals can then be deposited on the exposed areas of the seed layer using electroplating or electroless plating. The electroplating mask is then removed by ashing or chemical stripping. After removing the exposed seed layer, a redistribution layer is formed. Next, an insulating layer is deposited on the redistribution layer using spin coating or lamination. This insulating layer may contain polybenzoxazole (PBO), polyimide (PI), benzocyclobutene (BCB), or similar materials. After deposition, the insulating layer is patterned using photolithography and etching processes to form openings, and then another redistribution layer is deposited on the patterned insulating layer. This process can be repeated until the desired number of redistribution layers is achieved. In some embodiments, the interposer 210 may comprise 3 to 15 redistribution layers, also referred to as a redistribution structure. In step 102, microbumps 212 are formed on the interposer 210. Each microbump 212 comprises a metal pillar and a solder structure located on the metal pillar. In some implementations, the metal pillar may comprise copper, aluminum, gold, nickel, silver, palladium, tin, or similar materials, while the solder structure may comprise tin (Sn), silver (Ag), or a combination of both.

[0014] Referring to Figures 1, 3, and 4, method 100 includes block 104 for bonding dies to the front side of interposer 210. Figure 3 shows a top view of interposer 210. In this embodiment, the dies bonded to interposer 210 include multiple central dies and multiple peripheral dies. The central dies may include system dies, such as SoC dies or SoIC dies, while the peripheral dies may include memory dies, electronic dies, or photonic dies. SoC dies may include graphics processing units (GPUs), central processing units (CPUs), and neural processing units (NPUs); SoIC dies may include SoC dies and secondary dies electrically coupled to the SoC dies through silicon vias. In the example of Figure 3, the peripheral dies include first memory die 230-1, second memory die 230-2, third memory die 230-3, fourth memory die 230-4, fifth memory die 230-5, sixth memory die 230-6, seventh memory die 230-7, eighth memory die 230-8, ninth memory die 230-9, tenth memory die 230-10, eleventh memory die 230-11, and twelfth memory die 230-12, and the central dies include first system die 220-1, second system die 220-2, third system die 220-3, and fourth system die 220-4. In some cases, each system die may also be referred to as a SoC die. These memory dies may be high-bandwidth memory (HBM). HBM is a computer memory interface typically used in conjunction with high-performance graphics accelerators, high-performance data centers, application-specific integrated circuits (ASICs) for AI applications, packaged caches in CPUs, or high-performance computing ICs. In the depicted embodiment, each memory die includes a dynamic random access memory (DRAM) stack die (or memory stack die) and a controller die bonded to the DRAM stack die. In some cases, the DRAM stack die may include 2 to 10 vertically stacked DRAM dies. Vertical stacking enables higher bandwidth, lower power consumption, and smaller form factor. At block 104, the memory die and the central die are placed on the front side of the interposer 210 such that the microbumps 212 are aligned with the contact pads on the memory die and the central die. An annealing or bonding process is then performed to bond the memory die and the central die to the interposer 210. Figure 4 shows a partial cross-section along line A-A' in Figure 3.

[0015] Referring to Figures 1, 3, and 4, method 100 includes block 106, in which a first underfill material 214 is deposited between the die and the interposer layer 210. In some embodiments, the space between the interposer layer 210 and the die may be filled with the first underfill material 214. In some embodiments, the first underfill material 214 may be a capillary fill material. In an exemplary process, the first underfill material 214 is distributed around the die, and capillary forces cause the first underfill material 214 to fill the space between the die and the interposer layer 210. As shown in Figure 4, capillary force causes the first bottom filler material 214 to cover part of the sidewalls of the bare crystals (including memory bare crystals 230-1, 230-2, 230-3, 230-4, 230-5, 230-6, 230-7, 230-8, 230-9, 230-10, 230-11, 230-12 and system bare crystals 220-1, 220-2, 220-3, 220-4). However, as shown in Figure 4, the sidewalls of the bare crystals are not completely covered by the first bottom filler material 214.

[0016] Referring to Figures 1, 5, and 6, method 100 includes block 108, in which a metal layer 240 is formed over the die and a first underfill material 214. At block 108, the metal layer 240 can be deposited over the die and the first underfill material 214 using PVD. In some alternative embodiments, copper paste can be printed, sprayed, or brushed onto the die and the first underfill material 214, and an annealing process can be performed to cure the copper paste to form the metal layer 240. As shown in Figure 5, the metal layer 240 can conformally extend along the surface of the interposer 210, the sidewalls of the first underfill material 214, the sidewalls of the die, and the top surface of the die. Furthermore, the metal layer 240 can be deposited on the first underfill material 214 between two adjacent dies, for example, between a first system die 220-1 and a second system die 220-2 along the X direction in Figure 5. Figure 6 illustrates an example where the metal layer 240 completely fills the gap between the first system die 220-1 and the second system die 220-2. In the embodiment shown in Figure 6, the metal layer 240 completely covers the first bottom filler material 214 between two adjacent dies (e.g., two adjacent system dies, two adjacent memory dies, or one system die and one adjacent memory die).

[0017] Referring to Figures 1 and 7, method 100 includes block 110, in which a first molding material 216 is deposited over metal layer 240. In some embodiments, the first molding material 216 may include filler particles, such as silicon oxide particles, metal particles, or ceramic particles, to improve the mechanical properties and thermal conductivity of the first molding material 216. In some cases, a curing step is performed to cure the first molding material 216. The curing step may include using thermosetting or ultraviolet (UV) curing, etc. The first molding material 216 may be subjected to a grinding process and / or polishing process to provide a flat top surface.

[0018] Referring to Figures 1 and 8, method 100 includes block 112, wherein solder feature 206 is formed above the back side of package structure 200. The second carrier substrate 201B may be similar to the first carrier substrate 201A in thickness and construction. As the working structure 200 flips and bonds to the second carrier substrate 201B, solder feature 206 and passive element 250 are bonded to the back side of interposer 210. In some embodiments, solder feature 206 may include a ball grid array (BGA) connector, solder balls, metal pillars, controlled collapse die connection (C4) bumps, microbumps, bumps formed by electroless nickel-palladium-immersion gold (ENEPIG) technology, etc. In one embodiment, solder feature 206 includes C4 bumps, which may include lead, tin, silver, or alloys thereof. Passive element 250 may include capacitors, resistors, or inductors. Because the passive elements 250 are located on the back side and integrated with the interposer 210, they can be referred to as integrated passive devices (IPDs) 250 or land-side integrated passive devices (LSIPDs) 250. To bond the passive elements 250 to the back side of the interposer 210, they are placed over a contact pad, and then an annealing or reflow process is performed to bond the passive elements 250 to the back side of the interposer 210.

[0019] Referring to Figures 1 and 9, method 100 may optionally include block 114, in which thermal interface material (TIM) 260 is deposited over the bare die and the first molding compound 216. Block 114 is optional. The operation at block 114 deposits the thermal interface material 260 before the interposer 210 is bonded to the package substrate. As will be described in more detail below, in some alternative embodiments, the thermal interface material 260 is not deposited before the interposer 210 is bonded to the package substrate. Instead, a thicker or different thermal interface material (TIM) layer is deposited on the top surface of the bare die after the interposer 210 is bonded to the package substrate. In these alternative embodiments, the operation at block 114 is omitted.

[0020] As shown in Figure 9, block 114 deposits thermal interface material 260 on the top surface of the bare die and the first molding compound 216. This requires first forming an adhesive material 217 over the solder feature 206 and the passive component 250. The adhesive material 217 may include silicone, nylon, polyetheretherketone (PEEK), epoxy, or resin. After forming the adhesive material 217, a grinding and / or polishing process is performed to provide a flat surface. The planar surface of the adhesive material 217 is then bonded to a third carrier substrate 201C. The third carrier substrate 201C may be similar in thickness and construction to the first carrier substrate 201A. The second carrier substrate 201B is then debonded and removed. In some embodiments, chemical mechanical polishing (CMP) or a grinding process is performed after the second carrier substrate 201B is debonded to remove the metal layer 240 on the top surface of the wafer.

[0021] For the purposes of this disclosure, a thermal interface material refers to a material placed between an electronic device and a heat sink to improve heat dissipation in the electronic device. At block 114, the thermal interface material 260 may be applied in the form of a gel, a metal layer, or pre-cut tape. In some embodiments, the thermal interface material 260 may include boron nitride, graphene, graphite, aluminum (Al), titanium (Ti), nickel vanadium (NiV), gold (Au), or combinations thereof. In one embodiment, the thermal interface material 260 may include aluminum (Al), titanium (Ti), nickel vanadium (NiV), gold (Au), or alloys thereof. The thermal interface material 260 formed at block 114 may be referred to as a back-side metallization process.

[0022] Referring to Figures 1 and 10, method 100 includes block 116, in which the encapsulation structure 200 is segmented. At block 116, an interposer 210, together with the bare die bonded thereto, is separated from a third carrier substrate 201C and mounted onto a fourth carrier substrate 201D, with the thermal interface material 260 facing downwards. In some embodiments, the fourth carrier substrate 201D may be a carrier tape. In these embodiments, the fourth carrier substrate 201D may include a polymer, such as polycarbonate. As shown in Figure 10, adhesive material 217 is selectively removed to expose solder features 206 and passive element 250. As used herein, the encapsulation assembly includes an interposer 210, a bare die bonded to the interposer 210, a first molding material 216, a metal layer 240, a thermal interface material 260, solder features 206, and passive element 250.

[0023] Referring to Figures 1 and 11, method 100 includes block 118, wherein interposer 210 is bonded to package substrate 202. Although not explicitly shown in the features, package substrate 202 may include a through-substrate via (TSV) or through-hole connector extending from front surface 202F to back surface 202B of package substrate 202. For electrical connection to solder feature 206, package substrate 202 may also include a plurality of contact pads. At least one passive element 204 may be bonded to package substrate 202. At block 118, solder feature 206 is aligned with contact pads on package substrate 202, and an annealing process is performed to bond solder feature 206 to contact pads.

[0024] Referring to Figures 1 and 11, method 100 includes block 120, wherein a second underfill material 208 is formed between interposer 210 and package substrate 202. In some embodiments, the space between interposer 210 and package substrate 202 may be filled with the second underfill material 208. In some embodiments, the second underfill material 208 may be a capillary underfill material. In an exemplary process, the second underfill material 208 is dispensed around the bonded packaged elements, and capillary forces cause the second underfill material 208 to fill the space between interposer 210 and package substrate 202. In some embodiments, the second underfill material 208 includes epoxy resin, filler, or a combination thereof. As shown in Figure 10, capillary forces cause the second underfill material 208 to cover solder feature 206 and passive element 250. Furthermore, capillary forces may cause a portion of the second underfill material 208 to contact a portion of the sidewall of interposer 210.

[0025] Referring to Figures 1 and 11-24, method 100 includes block 122, in which further processing is performed. The further processes include forming protective and heat dissipation structures around the interposer 210 and the die. In the embodiment shown in Figures 11-15, block 122 attaches a first ring structure 270 to the package substrate 202. In the embodiment shown in Figures 16-20, block 122 forms on-substrate molding material 280 over the package substrate 202 and around the package assembly, and attaches a second ring structure 272 to the on-substrate molding material 280. In the embodiment shown in Figures 21-24, block 122 forms on-substrate molding material 280 over the package substrate 202 and around the package assembly, attaches a third ring structure 274 to the on-substrate molding material 280, forms a thermal interface material structure 290 within the third ring structure 274, and attaches a cap 276 over the third ring structure 274 and the thermal interface material structure 290.

[0026] Referring first to Figures 11-15, in some embodiments, the first ring structure 270 is attached to the encapsulation substrate 202 to rigidify the encapsulation structure 200. Referring to Figure 11, at block 122, the first ring structure 270 is positioned above the encapsulation substrate 202 and attached to the encapsulation substrate 202 via adhesive 262. In some embodiments, the first ring structure 270 may be formed of a metal or alloy, such as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), or alloys thereof. Exemplary alloys may include aluminum-copper alloys, iron-nickel alloys, or iron-nickel-cobalt alloys. In some embodiments, the top surface of the first ring structure 270 is higher than the top surface of the thermal interface material 260. Adhesive 262 may include silicone resin, nylon, polyetheretherketone (PEEK), epoxy resin, or resin. In the top view shown in Figure 12, the first ring structure 270 extends continuously around the package assembly, which includes an interposer 210 and bare dies bonded thereto (including memory dies 230-1, 230-2, 230-3, 230-4, 230-5, 230-6, 230-7, 230-8, 230-9, 230-10, 230-11, 230-12 and system dies 220-1, 220-2, 220-3 and 220-4). In the illustrated embodiment, the inner sidewalls of the first ring structure 270 are spaced apart from the sidewalls of the interposer 210, the first molding material 216, and the thermal interface material 260. The dashed area in Figure 11 is enlarged and shown in Figure 13. In some embodiments, a portion of the metal layer 240 is in physical and electrical contact with the sealing ring structure 2100 in the interposer 210. As shown in the top perspective view of Figure 12, the sealing ring structure 2100 extends vertically through the interposer 210 and continues along the edge of the interposer 210 to prevent moisture intrusion. Similar to the redistribution layers in the interposer 210, the sealing ring structure 2100 comprises titanium, titanium nitride, tantalum, tantalum nitride, copper, copper alloys, aluminum, nickel, cobalt, palladium, or combinations thereof. In some embodiments, the sealing ring structure 2100 is electrically floating and not connected to any redistribution layers in the interposer 210. In some other embodiments, the sealing ring structure 2100 is not connected to any redistribution layers in the interposer 210 but is bonded to ground potential. The connection between the metal layer 240 and the sealing ring structure 2100 facilitates the conduction of heat downwards to the interposer 210 or further grounding structures.

[0027] Figures 14 and 15 illustrate an embodiment where the metal layer 240 completely fills the gap between two adjacent bare dies. In Figure 14, the metal layer 240 completely fills the gap between the first system bare die 220-1 and the second system bare die 220-2. The metal layer 240 facilitates thermal conduction between the bare die and the thermal interface material 260, as well as between the bare die and the sealing ring structure (e.g., the sealing ring structure 2100 shown in Figure 13). In the top view shown in Figure 15, the metal layer 240 fills the gap between two adjacent bare dies. The first molding material 216 around the edge of the interposer layer 210 is in contact with the thermal interface material 260.

[0028] Referring then to Figures 16-20. Referring to Figure 16, at block 122, an on-substrate molding compound 280 can be deposited over the package substrate 202 and around the package components (including the interposer 210, the bare die, and the first molding compound 216). Then, a second ring structure 272 can be attached to the on-substrate molding compound 280 using an adhesive 262. In some embodiments, the on-substrate molding compound 280 may include epoxy resin, polymers, and combinations thereof. In some embodiments, the on-substrate molding compound 280 may include filler particles, such as silicon oxide particles, metal particles, or ceramic particles, to improve the mechanical properties and thermal conductivity of the on-substrate molding compound 280. The on-substrate molding compound 280 can be deposited over the package substrate 202 and the passive component 204 using compression molding, transfer molding, or suitable molding processes. In some cases, a curing step is performed to cure the on-substrate molding compound 280. The on-substrate molding compound 280 can be subjected to a grinding process and / or polishing process to provide a flat top. In some embodiments, the second ring structure 272 may be formed of a metal or alloy, such as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), or alloys thereof. Exemplary alloys may include aluminum-copper alloys, iron-nickel alloys, or iron-nickel-cobalt alloys. In some embodiments, the top surface of the second ring structure 272 is higher than the top surface of the thermal interface material 260. The adhesive 262 may include silicone resin, nylon, polyetheretherketone (PEEK), epoxy resin, or other resins.

[0029] In the top view shown in Figure 17, the substrate molding material 280 covers the sidewalls of the interposer 210 and the bare dies bonded thereto (including memory dies 230-1, 230-2, 230-3, 230-4, 230-5, 230-6, 230-7, 230-8, 230-9, 230-10, 230-11, 230-12 and system dies 220-1, 220-2, 220-3 and 220-4). A second ring structure 272 is attached to the top surface of the substrate molding material 280. When viewed along the vertical direction (i.e., the Z-direction), the substrate molding material 280 extends around the interposer 210 and the bare dies bonded thereto. The second ring structure 272 is attached to the top surface of the substrate molding material 280 and extends around the vertically projected area of ​​the interposer 210 and the bare dies. The dashed area in Figure 16 is enlarged and shown in Figure 18. In some embodiments, a portion of the metal layer 240 is in physical and electrical contact with the sealing ring structure 2100 in the interposer layer 210. As shown in the top perspective view in Figure 17, the sealing ring structure 2100 extends vertically through the interposer layer 210 and continues along the edge of the interposer layer 210 to prevent moisture intrusion. Similar to the redistribution layer in the interposer layer 210, the sealing ring structure 2100 comprises titanium, titanium nitride, tantalum, tantalum nitride, copper, copper alloys, aluminum, nickel, cobalt, palladium, or combinations thereof. In some embodiments, the sealing ring structure 2100 is electrically floating and not connected to any redistribution layer in the interposer layer 210. In some other embodiments, the sealing ring structure 2100 is not connected to any redistribution layer in the interposer layer 210, but is coupled to a ground potential. The connection between the metal layer 240 and the sealing ring structure 2100 facilitates the conduction of heat down to the interposer layer 210 or further grounding structures.

[0030] Figures 19 and 20 illustrate an embodiment where the metal layer 240 completely fills the gap between two adjacent bare dies. In Figure 19, the metal layer 240 completely fills the gap between the first system bare die 220-1 and the second system bare die 220-2. The metal layer 240 facilitates thermal conduction between the bare die and the thermal interface material 260, as well as between the bare die and the sealing ring structure (e.g., the sealing ring structure 2100 shown in Figure 18). In the top view shown in Figure 20, the metal layer 240 fills the gap between two adjacent bare dies. A first molding material 216 around the edge of the interposer layer 210 interfaces with the thermal interface material 260.

[0031] Referring now to Figures 21-24. As described above, in some embodiments, the operation at block 114 is omitted, and a thermal interface material 260 is not formed on the top surface of the bare die, the first molding compound 216 and the metal layer 240, and the package assembly (including the interposer 210, the bare die, and the passive element 250). At block 116, the interposer 210, together with the bare die bonded thereon, is separated from the second carrier substrate 201B (as shown in Figure 7), and then the working structure 200 is subjected to a die dicing or splitting process, such that each package assembly is divided. At block 118, the interposer 210, together with the wafer bonded thereon, is bonded to the package substrate 202. At block 118, the solder feature 206 is aligned with the contact pads on the package substrate 202, and an annealing process is performed to bond the solder feature 206 to the contact pads on the package substrate 202. At block 120, the space between the interposer 210 and the package substrate 202 is filled with a second bottom filler material 208. At block 122, an on-substrate molding compound 280 can be deposited over the package substrate 202 and the passive component 204 using compression molding, transfer molding, or a suitable molding process. A curing step can be performed on the on-substrate molding compound 280. Subsequently, a grinding and / or polishing process can be performed on the on-substrate molding compound 280 to provide a flat top. In some embodiments shown in FIG. 21, the top surfaces of the on-substrate molding compound 280, the first molding compound 216, the bare die, and the metal layer 240 can be coplanar.

[0032] Referring to Figure 22, at block 122, the third ring structure 274 is attached to the top surface of the molding compound 280 on the substrate via adhesive 262 to harden this structure. In some embodiments shown in Figure 22, the third ring structure 274 has an h-shaped profile to provide mechanical strength and stiffness. Like the first ring structure 270 and the second ring structure 272, the third ring structure 274 can be formed of a metal or alloy, such as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), or alloys thereof. Exemplary alloys may include aluminum-copper alloys, iron-nickel alloys, or iron-nickel-cobalt alloys. Adhesive 262 may include silicone, nylon, polyetheretherketone (PEEK), epoxy, or resin. Along the vertical direction (i.e., the Z-direction), the third ring structure 274 extends around the vertically projected region of the bare die and interposer 210. Referring now to Figure 22, a thermal interface material structure 290 is deposited in the region surrounded by the third ring structure 274. In some embodiments shown in Figure 22, the thermal interface material structure 290 is connected to the top surface of the substrate molding material 280, the first molding material 216, the metal layer 240, and the bare dies (including memory bare dies 230-1, 230-2, 230-3, 230-4, 230-5, 230-6, 230-7, 230-8, 230-9, 230-10, 230-11, 230-12 and system bare dies 220-1, 220-2, 220-3 and 220-4) and the sidewalls of the third ring structure 274. The thermal interface material structure 290 is in gel form and may include thermally conductive particles dispersed in silicone, acrylic gel, polyolefin gel or other polymer gels. When deposited, the thermal interface material structure 290 is thicker than the thermal interface material 260 to provide a certain volume. In some embodiments, the thickness of the thermal interface material structure 290 is 5 to approximately 100 times the thickness of the thermal interface material 260. The volume of the thermal interface material structure 290 allows it to deform and reduce stress applied to the bare die. As will be further described below, the third ring structure 274 and the cap 276 (as will be further described below) define a space larger than the volume of the thermal interface material structure 290, allowing the thermal interface material structure 290 to deform within the defined space. Compared to the thermal interface material structure 290, the thermal interface material 260 only provides a thermally conductive interface and is not designed to deform or absorb stress applied to the bare die. To maintain the fluidity of the thermal interface material structure 290, it may not be fully cured. In some cases, the thermal interface material structure 290 is not cured or partially cured, allowing it to exhibit greater fluidity at elevated temperatures.

[0033] Referring to Figure 23, at block 122, the cover 276 is connected to the third ring structure 274 to engage with the top surface of the thermal interface material structure 290. The composition of the cover 276 is similar to that of the third ring structure 274. That is, the cover 276 can be formed of a metal or alloy, such as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), or alloys thereof. The cover 276 can be connected to the third ring structure 274 via an adhesive 264, which can be similar to adhesive 262. To ensure a good thermal interface between the thermal interface material structure 290 and the cover 276, the central portion of the cover 276 can partially extend into the space enclosed by the third ring structure 274. The cover 276 includes an annular groove to accommodate the third ring structure 274 and provide an expansion space 292. The expansion space 292 can accommodate deformation of the thermal interface material structure 290 and prevent excessive stress from being applied to the bare crystal.

[0034] Figure 24 illustrates an embodiment where the metal layer 240 completely fills the gap between two adjacent bare crystals beneath the thermal interface material structure 290. In Figure 24, the metal layer 240 completely fills the gap between the first system bare crystal 220-1 and the second system bare crystal 220-2. The metal layer 240 facilitates thermal conduction between the bare crystal and the thermal interface material structure 290, as well as between the bare crystal and the sealing ring structure (e.g., the sealing ring structure 2100 shown in Figure 18).

[0035] Figures 25-32 illustrate an alternative embodiment in which the metal layer 240 remains on the top surface of the die to interface with the thermal interface material 260. As described above regarding the operation at block 114, a chemical mechanical polishing process or a polishing process can be performed before depositing the thermal interface material 260 to remove the metal layer 240 on the top surface of the die. In the alternative embodiment shown in Figures 25-32, the metal layer 240 on the top surface of the die is not removed, and the top surface of the die is still covered by the metal layer 240. Therefore, a portion of the metal layer 240 is sandwiched between the die and the thermal interface material 260 or between the die and the thermal interface material structure 290. In the embodiment shown in Figure 25, the first ring structure 270 is attached to the package substrate 202 to surround the interposer layer 210 and the die bonded thereon. The metal layer 240 extends continuously along the top surface of the interposer layer 210, the top surface of the die, the sidewalls of the first underfill material 214, and the sidewalls of the die. In the embodiment shown in FIG. 26, an on-substrate molding compound 280 is deposited over the package substrate 202 to surround the interposer 210 and the die, and a second ring structure 272 is attached to the top of the on-substrate molding compound 280. A metal layer 240 extends continuously along the top surface of the interposer 210, the top surface of the die, the sidewalls of the first underfill material 214, and the sidewalls of the die. In the embodiment shown in FIG. 27, an on-substrate molding compound 280 is deposited over the package substrate 202 to surround the interposer 210 and the die, a third ring structure 274 is attached to the top surface of the on-substrate molding compound 280, and a cap 276 is attached to the third ring structure 274 to interface with the thermal interface material structure 290. The metal layer 240 extends continuously along the top surface of the interposer 210, the top surface of the die, the sidewalls of the first underfill material 214, and the sidewalls of the die. FIG. 28 shows an embodiment similar to FIG. 25, but the metal layer 240 completely fills the gaps between the dies. Figure 29 shows an embodiment similar to Figure 26, but the metal layer 240 completely fills the gaps between the bare dies. Figure 30 shows an embodiment similar to Figure 27, but the metal layer 240 completely fills the gaps between the bare dies.

[0036] The dashed areas in Figures 25, 26, 28, or 29 are magnified and shown in Figure 31. In some embodiments, a portion of the metal layer 240 is in physical and electrical contact with a sealing ring structure 2100 in the interposer layer 210. The sealing ring structure 2100 extends vertically through the interposer layer 210 and continues along the edge of the interposer layer 210 to prevent moisture intrusion. As shown in Figure 31, the top surface of the die is separated from the thermal interface material 260 by a portion of the metal layer 240 on the top surface of the die.

[0037] The dashed area in Figure 27 or 30 is enlarged and shown in Figure 32. In some embodiments, a portion of the metal layer 240 is in physical and electrical contact with a sealing ring structure 2100 in the interposer layer 210. The sealing ring structure 2100 extends vertically through the interposer layer 210 and continues along the edge of the interposer layer 210 to prevent moisture intrusion. As shown in Figure 32, the top surface of the bare die is separated from the portion of the metal layer 240 on the top surface of the bare die by the thermal interface structure 290.

[0038] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first die and a second die, an underfill material, a metal layer, a molding compound, and a thermal interface material. The interposer is bonded to the packaging substrate. The first die and the second die are bonded to the interposer via a plurality of microbumps. The underfill material surrounds the microbumps and is disposed between the first die and the interposer, and between the second die and the interposer. The metal layer interfaces the interposer, the underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The molding compound is located above the metal layer. The thermal interface material is located above the molding compound, the metal layer, the first die, and the second die.

[0039] In one embodiment, a metal layer intersects a top surface of an interposer. In one embodiment, a metal layer separates the molding material from the sidewalls of the first and second bare crystals. In one embodiment, a metal layer separates the molding material from the underfill material. In one embodiment, a thermal interface material intersects the molding material from the top surface of the metal layer. In one embodiment, the metal layer comprises titanium copper, copper, or gold. In one embodiment, the first and second bare crystals are separated along a direction and are separated by the underfill material, the metal layer, and the molding material. In one embodiment, the interposer includes a plurality of polymer layers, a redistribution structure, and a sealing ring structure. The redistribution structure is disposed in the polymer layers. The sealing ring structure is disposed in the polymer layers and continuously surrounds the redistribution structure. In one embodiment, the metal layer and the sealing ring structure are in physical contact.

[0040] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first underfill material, a first die and a second die, a second underfill material, a metal layer, a first molding compound, a thermal interface material, and a second molding compound. The interposer is bonded to the packaging substrate via a plurality of first-type bumps. The first underfill material surrounds the first-type bumps. The first die and the second die are bonded to the interposer via a plurality of second-type bumps. The second underfill material surrounds the second-type bumps. The metal layer interfaces the interposer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The first molding compound is located on the metal layer. The thermal interface material is disposed on the first molding compound, the metal layer, the first die, and the second die. The second molding compound is located on the packaging substrate and surrounds the first underfill material and the first molding compound.

[0041] In one embodiment, the metal layer comprises titanium copper, copper, or gold. In one embodiment, a second molding compound interfaces with the metal layer and a first underfill material. In one embodiment, a top surface of the second molding compound does not interface with a thermal interface material. In one embodiment, the encapsulation structure further includes a metal ring attached to a top surface of the second molding compound. In one embodiment, the metal ring comprises aluminum, copper, iron, nickel, cobalt, or an alloy thereof.

[0042] This disclosure provides a packaging structure including a packaging substrate, an interposer, a first underfill material, a first die and a second die, a second underfill material, a metal layer, a first molding compound, a second molding compound, and a thermal interface material. The interposer is bonded to the packaging substrate via a plurality of first-type bumps. The first underfill material surrounds the first-type bumps. The first die and the second die are bonded to the interposer via a plurality of second-type bumps. The second underfill material surrounds the second-type bumps. The metal layer interfaces the interposer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die. The first molding compound is located on the metal layer. The second molding compound is located on the packaging substrate and surrounds the first underfill material and the first molding compound. The thermal interface material is located above the first molding compound, the second molding compound, the metal layer, the first die, and the second die. The metal layer includes titanium copper, copper, or gold.

[0043] In one embodiment, the encapsulation structure further includes a metal ring attached to a top surface of a second molding material. In one embodiment, a thermal interface material intersects an inner sidewall of the metal ring. In one embodiment, the thermal interface material includes aluminum, titanium, nickel-vanadium, or gold. In one embodiment, the second molding material intersects a metal layer and a first underfill material.

[0044] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand the scope of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis to design or modify other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and various changes, substitutions, and alterations can be made without departing from the spirit and scope of this disclosure.

[0045] 100: Method 102: Square 104: Square 106: Square 108: Square 110: Square 112: Square 114: Square 116: Square 118: Square 120: Square 122: Square 200: In-process structure, encapsulation structure 201A: First carrier substrate 201B: Second carrier substrate 201C: Third carrier substrate 201D: Fourth carrier substrate 202: Packaging substrate 202B: Back surface of the packaging substrate 202F: Front surface of the packaging substrate 204: Passive Components 206: Welding characteristics 208: Second bottom filling material 210: Intermediary layer 212: Microbumps 214: First bottom filling material 216: First molding material 217: Adhesive materials 220-1: First System Bare Crystal 220-2: Second System Bare Crystal 220-3: Third System Bare Crystal 220-4: Fourth System Bare Crystal 230-1: First memory bare crystal 230-2: Second Memory Bare Crystal 230-3: Third Memory Bare Crystal 230-4: Fourth Memory Bare Crystal 230-5: Fifth Memory Block Bare Crystal 230-6: Sixth Memory Bare Crystal 230-7: Seventh Memory Bare Crystal 230-8: Eighth Memory Bare Crystal 230-9: Ninth Memory Core Bare Crystal 230-10: Tenth Memory Bare Crystal 230-11: Eleventh Memory Block Bare Crystal 230-12: Twelfth Memory Cell Bare Crystal 240: Metal layer 250: Passive Components 260: Thermal interface materials 262: Adhesive 264: Adhesive 270: First ring structure 272: Second ring structure 274: Third Ring Structure 276: Cover 280: Molding material on substrate 290: Thermal interface material structure 292: Expansion Space 2100: Sealing ring structure

Claims

1. A packaging structure, comprising: One packaging substrate; An intermediate layer is bonded to the packaging substrate; A first bare die and a second bare die are bonded to the interposer layer by a plurality of microbumps; A bottom filler material is disposed between the first die and the interposer layer and between the second die and the interposer layer, surrounding the microbumps; a metal layer is disposed between the interposer layer, the bottom filler material, a plurality of sidewalls of the first die and a plurality of sidewalls of the second die; a molding compound is disposed above the metal layer; and a thermal interface material is disposed above the molding compound, the metal layer, the first die and the second die.

2. The packaging structure as described in claim 1, wherein the metal layer intersects a top surface of the interposer layer.

3. The packaging structure as described in claim 1, wherein the molding material is spaced from the sidewalls of the first die and the sidewalls of the second die by the metal layer.

4. The packaging structure as described in claim 1, wherein the molding material and the underfill material are separated by the metal layer.

5. The packaging structure as described in claim 1, wherein the thermal interface material interfaces the molding material with the top surface of the metal layer.

6. The packaging structure as described in claim 1, wherein the first die and the second die are separated along a direction, and the first die and the second die are separated by the underfill material, the metal layer and the molding material.

7. The encapsulation structure as described in claim 1, wherein the intermediary layer comprises: Multiple polymer layers; A redistributed structure is disposed within the polymer layers; And a sealing ring structure disposed in the polymer layers and continuously surrounding the redistribution structure.

8. A packaging structure, comprising: One packaging substrate; An intermediary layer is bonded to the package substrate by a plurality of first-type bumps; A first bottom fill material surrounds the first type of bumps; A first die and a second die are bonded to the interposer layer via a plurality of second-type bumps; a second underfill material surrounds the second-type bumps; a metal layer interfaces the interposer layer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die; a first molding compound is located on the metal layer; a thermal interface material is disposed on the first molding compound, the metal layer, the first die, and the second die; and a second molding compound is located on the packaging substrate and surrounds the first underfill material and the first molding compound.

9. The packaging structure as described in claim 8, wherein the second molding material interfaces with the metal layer and the first underfill material.

10. The packaging structure as described in claim 8, wherein a top surface of the second molding material is not in contact with the thermal interface material.

11. The encapsulation structure as described in claim 8, further comprising: A metal ring is attached to the top surface of the second molding material.

12. A packaging structure, comprising: One packaging substrate; An intermediary layer is bonded to the package substrate by a plurality of first-type bumps; A first bottom fill material surrounds the first type of bumps; A first die and a second die are bonded to the interposer layer via a plurality of second-type bumps; a second underfill material surrounds the second-type bumps; a metal layer interfaces the interposer layer, the second underfill material, a plurality of sidewalls of the first die, and a plurality of sidewalls of the second die; a first molding compound is located on the metal layer; a second molding compound is located on the package substrate and surrounds the first underfill material and the first molding compound. And a thermal interface material, located above the first molding material, the second molding material, the metal layer, the first bare crystal and the second bare crystal, wherein the metal layer includes titanium copper, copper or gold.

13. The encapsulation structure as described in claim 12, further comprising: A metal ring is attached to the top surface of the second molding material.

14. The encapsulation structure as described in claim 13, wherein the thermal interface material intersects an inner sidewall of the metal ring.

15. The packaging structure as described in claim 12, wherein the second molding material interfaces with the metal layer and the first underfill material.

Images