Switched-capacitor converter with zero-voltage and zero-current switching control and control method thereof

Abstract

This invention relates to a switching capacitor converter comprising N flying capacitors (N1) and a plurality of switches for periodically switching between multiple switching phases to convert a first voltage to a second voltage or vice versa. When entering a first switching phase, this invention controls at least one of the N flying capacitors to have its first terminal conduct before its second terminal, electrically connecting it to the node corresponding to that switching phase to form the desired coupling relationship, and allowing its second terminal to conduct again gradually approaching zero voltage. This enables zero-voltage switching of the selected switch, effectively reducing switching losses and improving overall conversion efficiency.

Description

Technical Field

[0001] This invention relates to switching power conversion technology, and more specifically, to a switching capacitor converter with zero-voltage switching (ZVS) and zero-current switching (ZCS) control and its control method. Prior Technology

[0002] The current development trend of electronic devices places higher demands on power converters, especially in mobile devices, embedded systems, and other high-performance applications, where the requirements for power converter size, efficiency, and thermal management are increasing. Due to increasingly stringent space and temperature constraints, the design of traditional switched-capacitor converters faces challenges in high-power-density environments. In particular, when traditional converters undergo phase switching, voltage mismatch in the flying capacitors can lead to instantaneous large current transfers, resulting in significant switching losses and impacting overall efficiency.

[0003] In existing technologies, conventional 4:1 buck Dickson switching capacitor converters (as shown in Figure 1A) typically transfer energy through hard-charging, with the switching control signal shown in Figure 1B. In this design, the flying capacitor network is directly connected to the output terminal, and the output capacitor Co serves as the voltage source load. However, during phase switching, due to voltage mismatch between the flying capacitor and the output terminal, the charge redistribution process generates a large instantaneous current, resulting in high switching power loss, which in turn reduces conversion efficiency and increases system heat generation. Furthermore, the large instantaneous current also causes voltage spikes, increasing the voltage withstand requirements of the switch and consequently increasing costs.

[0004] To address the aforementioned problems, this invention provides a novel control method applied to switching capacitor converters, employing zero-voltage switching and zero-current switching technologies. Through appropriate timing control, this invention enables gradual voltage changes on key switching elements, allowing the switch to conduct under zero-voltage or zero-current conditions, effectively reducing switching losses. Furthermore, this invention can also be applied to switching capacitor converters with different architectures, such as Dickson structures, Pipeline structures, and hybrid series-parallel architectures, to further improve overall conversion efficiency, enhance thermal management, and suit high power density applications.

[0005] In view of this, the present invention addresses the shortcomings of the prior art by proposing a switching capacitor converter that can reduce surge current. Summary of the Invention

[0006] From one perspective, the present invention provides a switching capacitor converter comprising N flying capacitors (N ≥ 1) and a plurality of switches. Through the periodic switching of the plurality of switching phases, energy conversion or reverse conversion is performed between a first voltage and a second voltage. When entering the first switching phase, the first terminal of a selected flying capacitor is preferentially turned on and coupled to the node corresponding to that phase, so that its second terminal gradually approaches zero voltage, and is then turned on and coupled to the same node to achieve zero voltage switching.

[0007] In a preferred embodiment, during steady-state operation, the voltage at the first terminal is lower than the voltage at the second terminal.

[0008] In a preferred embodiment, the endpoint phase voltage difference of the second terminal is greater than or equal to the endpoint phase voltage difference of the first terminal, where the endpoint phase voltage difference refers to the absolute value of the voltage level difference between the corresponding nodes at different switching phases.

[0009] In a preferred embodiment, the terminal phase voltage difference may further encompass the voltage drop or increase across multiple flying capacitors under load variations.

[0010] In a preferred embodiment, when N is a complex number and multiple flying capacitors are connected in series in the first switching phase to form a voltage distribution, the first terminal of the key flying capacitor with the largest terminal phase voltage difference is turned on first, and its second terminal is turned on later, so as to ensure that the second terminal gradually approaches zero voltage and completes zero voltage switching.

[0011] In a preferred embodiment, during the aforementioned first switching phase, other flying capacitors sequentially turn on their first terminals according to the voltage distribution order, so that the second terminal of the key flying capacitor gradually decreases across the voltage to near zero before turning on again.

[0012] In a preferred embodiment, during the first switching phase, the second terminal of the critical flying capacitor is the last terminal of all series-connected flying capacitors to be turned on to the corresponding node of the phase.

[0013] In a preferred embodiment, during the first switching phase, multiple flying capacitors are turned on sequentially, causing the voltage across each flying capacitor to gradually increase.

[0014] In a preferred embodiment, when multiple flying capacitors simultaneously have the maximum terminal phase voltage difference, the one with the highest first terminal potential is designated as the key flying capacitor.

[0015] In a preferred embodiment, multiple flying capacitors are connected in series in the first switching phase to form a voltage distribution. When switching to the second switching phase, the first terminal of the flying capacitor with the lowest potential in the voltage distribution is turned on and connected to the new phase node. The first terminals of the remaining flying capacitors are turned on gradually according to the potential order, so as to gradually disassemble the series connection and achieve at least part of the zero voltage switching.

[0016] In a preferred embodiment, during the second switching phase, the plurality of speeding capacitors are switched from a series connection to a parallel connection.

[0017] In a preferred embodiment, during the second switching phase, the step-through process ensures that the voltage across each speeding capacitor gradually decreases.

[0018] In a preferred embodiment, in the second switching phase, the conduction sequence of the multiple flying capacitors is the opposite of the conduction sequence in which they form a series connection in the first switching phase.

[0019] In a preferred embodiment, the complex switches may include a first to a fourth switch, respectively coupled to a first voltage, a second voltage, a ground potential and the two ends of a flying capacitor, thereby forming a basic 2:1 switching topology.

[0020] In a preferred embodiment, during the first switching phase, the second switch is turned on earlier than the first switch, causing the first switch to switch on at zero voltage to charge the flying capacitor; during the second switching phase, the fourth switch is turned on earlier than the third switch, causing the third switch to switch on at zero voltage to discharge the flying capacitor.

[0021] In a preferred embodiment, the conversion ratio between the first voltage and the second voltage is 2:1.

[0022] In a preferred embodiment, the first switch turns on after a preset delay time after the second switch turns on, or the third switch turns on after a preset delay time after the fourth switch turns on.

[0023] In a preferred embodiment, a first switch is turned on when its cross voltage is below a threshold to achieve zero-voltage switching, or a third switch is turned on when its cross voltage is below a threshold to achieve zero-voltage switching.

[0024] In a preferred embodiment, the conversion ratio between the first voltage and the second voltage can be a series-parallel switching capacitor topology of K:1, where K is a positive integer greater than 2.

[0025] In a preferred embodiment, the switching capacitor converter may correspond to a K:1 pipeline switching capacitor converter or a K:1 Dickson switching capacitor converter, where K is a positive integer greater than 2.

[0026] From another perspective, the present invention provides a method for switching capacitive power conversion, comprising: performing periodic switching of multiple switching phases to achieve a conversion between a first voltage and a second voltage, wherein when entering the first switching phase, controlling the first terminal of a flying capacitor to preferentially form an electrical connection with the corresponding node, so that its second terminal gradually approaches zero voltage, and then turning on the second terminal to achieve zero voltage switching.

[0027] The following detailed description through specific embodiments will make it easier to understand the purpose, technical content, features and effects achieved by this invention. Simple Explanation of the Diagram

[0028] Figure 1A shows a circuit diagram of a prior art switching capacitor converter.

[0029] Figure 1B shows the timing diagram of the switching control signals corresponding to the converter shown in Figure 1A.

[0030] Figure 2A shows a schematic diagram of a single-flying capacitor switching capacitor converter according to one embodiment of the present invention.

[0031] Figure 2B shows a schematic diagram of the switching state of the capacitor converter in the charging phase corresponding to Figure 2A.

[0032] Figure 2C shows a schematic diagram of the switching state of the capacitor converter in the discharge phase corresponding to Figure 2A.

[0033] Figure 3 shows a schematic diagram of the control signals and trans-voltage waveforms corresponding to the switching capacitor converter in Figure 2A.

[0034] Figure 4 shows a schematic diagram of a zero-voltage detection circuit according to one embodiment of the present invention.

[0035] Figure 5A shows a schematic diagram of a three-speed capacitor switching capacitor converter according to another embodiment of the present invention.

[0036] Figure 5B shows a schematic diagram of the switching state of the capacitor converter in the charging phase corresponding to Figure 5A.

[0037] Figure 5C shows a schematic diagram of the switching state of the capacitor converter in the discharge phase corresponding to Figure 5A.

[0038] Figure 6 shows a schematic diagram of the control signal and voltage waveform of the switching capacitor converter corresponding to Figure 5A during a complete switching cycle.

[0039] Figure 7A shows a schematic diagram of a two-phase interleaved pipeline switching capacitor converter according to one embodiment of the present invention.

[0040] Figure 7B shows a schematic diagram of the switching state of the switching capacitor converter in the first switching phase corresponding to Figure 7A.

[0041] Figure 7C shows a schematic diagram of the switching state of the switching capacitor converter in the second switching phase corresponding to Figure 7A.

[0042] Figure 8 shows a schematic diagram of the control signal and key transvoltage waveform corresponding to the two-phase interleaved switching capacitor converter in Figure 7A.

[0043] Figure 9A shows a schematic diagram of a 4:1 Dickson switching capacitor converter according to one embodiment of the present invention.

[0044] Figure 9B shows a schematic diagram of the electrical connection state of the switching capacitor converter corresponding to Figure 9A in the first switching phase.

[0045] Figure 9C shows a schematic diagram of the electrical connection state of the switching capacitor converter in the second switching phase corresponding to Figure 9A.

[0046] Figure 10 shows a schematic diagram of the control signal and voltage waveform of the switching capacitor converter corresponding to Figure 9A during a complete switching cycle. Implementation

[0047] The diagrams in this invention are all schematic and are mainly intended to show the coupling relationship between circuits and the relationship between signal waveforms. The circuits, signal waveforms and frequencies are not drawn to scale.

[0048] Figure 2A is a schematic diagram of a switching capacitor converter circuit according to a preferred embodiment of the present invention. As shown, the converter includes a flying capacitor C1 and at least four switches Q1 to Q4, which are sequentially connected in series between a first voltage and a ground potential. Specifically, the first switch Q1 is coupled between the first voltage and the second terminal of the flying capacitor C1; the second switch Q2 is coupled between the first terminal of the flying capacitor C1 and the second voltage; the third switch Q3 is coupled between the second terminal of the flying capacitor C1 and the second voltage; and the fourth switch Q4 is coupled between the first terminal of the flying capacitor C1 and the ground potential. It should be noted that the first terminal of the flying capacitor C1 is the right end relative to Figure 2A, while the second terminal is the left end of Figure 2A (at switch node Na). The control circuit 101 generates switch control signals S1 to S4 to control the on and off of the aforementioned switches, thereby performing periodic switching operations between different switching phases. Through an optimized conduction sequence, key switches (such as Q1 and Q3) are turned on under zero-voltage switching conditions, reducing switching losses and improving conversion efficiency. Furthermore, the flyback capacitor C1 and the output capacitor Co can be coupled to form a voltage divider structure to stabilize the second voltage output and support energy transfer from the first voltage to the second voltage. It can also achieve bidirectional power transfer in reverse operation.

[0049] As shown in Figure 2A, in this embodiment, the flying capacitor C1 and the output capacitor Co together form a voltage divider structure, converting the first voltage V1 into a stable second voltage V2. In the first switching phase, the control circuit 101 controls Q2 to turn on first, and then Q1 to turn on, so that Q1 can turn on under zero-voltage switching conditions. In the second switching phase, Q4 turns on first, and then Q3 to ensure that Q3 also turns on under zero-voltage switching conditions.

[0050] In some embodiments, the switching capacitor converter may include N flying capacitors (C1 ~ CN, N ≥ 1) and a plurality of switches (Q1 ~ Qx, x ≥ 4), which periodically switch between multiple switching phases to convert a first voltage V1 to a second voltage V2, or vice versa. When entering any switching phase (e.g., the first switching phase), the first terminal of a flying capacitor can be turned on before its second terminal to the node corresponding to that switching phase (e.g., the first switching phase), and the second terminal of the flying capacitor will only turn on as the voltage difference gradually decreases. This sequential design reduces switching losses and improves conversion efficiency.

[0051] In one embodiment, in steady state, the voltage at the first terminal of a certain flying capacitor may be lower than the voltage at the second terminal. Upon entering a certain switching phase (e.g., a first switching phase), if the first terminal of the flying capacitor is turned on before the second terminal and electrically connected to the node corresponding to the first switching phase, the coupling relationship required for that switching phase can be formed. This allows the second terminal to gradually approach a zero-voltage state before being turned on, facilitating its subsequent turn-on under low trans-voltage conditions. This turn-on sequence design helps reduce switching losses and improve conversion efficiency, and can be further optimized in conjunction with the multi-capacitor embodiments described later.

[0052] Figure 2B further illustrates the switching state of the charging phase. As shown in Figure 2B, in the charging phase, switches Q1 and Q2 are turned on, while switches Q3 and Q4 are turned off, forming a state where the flying capacitor C1 is connected in series with the first voltage V1 and the second voltage V2, allowing the flying capacitor C1 to charge from the first voltage V1 to the second voltage V2, completing the energy transfer. According to the present invention, the following sub-phases may be included for switching control at this time:

[0053] First sub-phase of charging: Switch control signal S2 first switches to the enable level, causing switch Q2 to turn on first, and the first end (right end) of the flying capacitor C1 is electrically connected to the second voltage V2.

[0054] Second sub-phase of charging: Switch control signal S1 then switches to the enable level, causing switch Q1 to turn on, electrically connecting the second end (left end) of flying capacitor C1 to the first voltage V1, so that it completes the coupling state of the charging phase, and thereby enabling switch Q1 to achieve zero voltage switching.

[0055] Figure 2C illustrates the switching state of the discharge phase. As shown in Figure 2C, in the discharge phase, switches Q3 and Q4 are turned on, while switches Q1 and Q2 are turned off. The flying capacitor C1 is then connected in parallel with the second voltage V2 and the ground potential, allowing energy to be released from the flying capacitor C1 to the second voltage V2. The following sub-phases can be included for switching control at this time:

[0056] First phase of discharge: Switch control signal S4 first switches to the enable level, making switch Q4 conduct and connecting the right end of flying capacitor C1 to the ground potential.

[0057] Discharge of the second sub-phase: The switch control signal S3 then switches to the enable level, causing switch Q3 to conduct, connecting the left end of the flying capacitor C1 to the second voltage V2, thus completing the coupling state of the discharge phase, and thereby enabling switch Q3 to achieve zero voltage switching.

[0058] Figure 3 is a schematic diagram of the signal waveforms of a switching capacitor converter according to one embodiment of the present invention. As shown in Figure 3, a complete switching cycle Tsw (time points t0~t6) includes a charging phase and a discharging phase, and the control timing is as follows:

[0059] Charging Phase (Time Points t0~t2): At time point t0, the switch control signal S2 goes high, turning on switch Q2, and the voltage across switch Q1, VQ1, begins to decrease. At time point t1, the voltage across switch VQ1 has decreased to 0, and switch Q1 can then turn on under zero-voltage switching conditions to charge the flying capacitor C1. Here, t0~t1 and t1~t2 correspond to the first and second sub-phases of the charging phase, respectively. At time point t2, the switch control signals S1 and S2 go low, turning off switches Q1 and Q2, maintaining a lag time (t2~t3), during which switches Q1~Q4 are all turned off to prevent short circuits.

[0060] Discharge Phase (Time Points t3~t5): At time point t3, the switch control signal S4 goes high, turning on switch Q4, and the voltage across switch Q3, VQ3, begins to decrease. At time point t4, the voltage across switch VQ3 has dropped to 0, and switch Q3 can then turn on under zero-voltage switching conditions to discharge the speedaway capacitor C1. t3~t4 and t4~t5 correspond to the first and second sub-phases of the discharge phase, respectively. At time point t5, the switch control signals S3 and S4 go low, turning off switches Q3 and Q4, and the system re-enters the idle time period, preparing for the next switching cycle.

[0061] Therefore, in this switching sequence, switches Q1 and Q3 can be turned on under zero-voltage switching conditions, while switches Q2 and Q4 are turned on through zero-current switching, ensuring maximum conversion efficiency while reducing switching losses and switching stress.

[0062] In one embodiment, during the charging phase, after the first terminal switch (such as Q2 or Q4) is turned on, a fixed delay time (as shown in Figure 3) can be preset as the timing for the second terminal switch (such as Q1 or Q3) to turn on. This ensures that the second terminal switch turns on only after its voltage drop has sufficiently decreased, thereby achieving zero-voltage switching. This preset delay time can be set according to the component characteristics and circuit design so that even without immediate voltage detection, the critical switch can still operate under zero-voltage switching conditions, achieving the effect of reducing switching losses.

[0063] Please refer to Figure 4, which shows a zero-voltage detection circuit according to one embodiment of the present invention. In another embodiment, the aforementioned delay time can also be adaptive. As shown in Figure 4, the zero-voltage detection circuit 1011 is used to detect the voltage across switch Qx (e.g., the aforementioned Q1 or Q3) after the first terminal switch (e.g., Q2 or Q4) is turned on, and trigger a switch control signal when the voltage across switch Qx drops below a preset threshold voltage (VT) to achieve zero-voltage switching.

[0064] In this embodiment, the voltage detector VDT senses the voltage across switch Qx to generate a voltage signal VDS, and inputs the voltage signal VDS to the comparator CP. The comparator CP compares the voltage signal VDS with a preset threshold VT to generate a zero voltage signal SZV. When the voltage signal VDS is lower than the preset threshold VT, the logic control circuit 10111 generates a switch control signal Sx, which in turn controls switch Qx to turn on via the driver 10112.

[0065] For example, in the converter shown in Figure 2A, the voltage across switch Q1, VQ1, is determined by the voltage between the first voltage V1 and its switching node Na. When switch Q2 is turned on, the voltage across switch VQ1 gradually decreases. When it drops below a preset threshold, the logic control circuit 10111 generates a switch control signal Sx, causing switch Q1 to turn on under zero-voltage switching conditions. This mechanism can also be applied to switch Q3 to achieve zero-voltage switching.

[0066] Figure 5A is a circuit diagram of a switching capacitor converter according to another preferred embodiment of the present invention. As shown in Figure 5A, the switching capacitor converter 20 includes switches Q1-Q10, output capacitor Co, flying capacitors C1-C3, and control circuit 101. The flying capacitors C1-C3 are coupled to switches Q1-Q10 to form a voltage divider. The output capacitor Co is used to store a second voltage V2. The control circuit 101 generates switch control signals S1-S10 and performs sequential control on switches Q1-Q10 to achieve zero-voltage switching and / or zero-current switching, thereby improving conversion efficiency. Furthermore, this embodiment supports bidirectional power transfer, enabling power transfer from a first voltage V1 to a second voltage V2, or from a second voltage V2 to a first voltage V1.

[0067] In this embodiment, flying capacitors C1 to C3 are connected in series or parallel via multiple sets of switches during the charging and discharging phases to transfer energy. Specifically, during the charging phase, as shown in Figure 5B, flying capacitors C1 to C3 are sequentially connected in series: in the first charging sub-phase, switch Q2 is turned on, connecting the right end of C1 to the left end of C2. In the second charging sub-phase, switch Q3 is turned on, connecting the right end of C2 to the left end of C3. In the third charging sub-phase, switch Q4 is turned on, connecting the right end of C3 to the second voltage V2. Finally, in the fourth charging sub-phase, switch Q1 is turned on, connecting the left end of C1 to the first voltage V1, completing the charging process of the flying capacitors. This sequence of turns on allows for step-by-step voltage superposition and promotes zero-voltage or zero-current switching through stepped voltage changes, reducing switching losses and surge currents.

[0068] Conversely, during the discharge phase, the flying capacitors C1~C3 switch to parallel or partially parallel connection to output the second voltage V2. As shown in Figure 5C, the discharge process is also divided into four sub-phases, gradually dismantling the series connection: In the first sub-phase of discharge, switch Q10 is turned on, connecting the right end of C3 to ground. In the second sub-phase of discharge, switches Q7 and Q9 are turned on, connecting the left end of C3 to the second voltage V2, and connecting the right end of C2 to ground. In the third sub-phase of discharge, switches Q6 and Q8 are turned on, connecting the left end of C2 to the second voltage V2, and connecting the right end of C1 to ground. In the fourth sub-phase of discharge, switch Q5 is turned on, connecting the left end of C1 to the second voltage V2, completing the electrical connection state of the entire discharge phase. This step-by-step turn-on design also promotes the voltage reduction across the switches, allowing switches Q5, Q6, and Q7 to achieve zero-voltage switching when they are turned on, suppressing surge current.

[0069] Figure 6 is a schematic diagram of the signal waveforms of a switching capacitor converter according to one embodiment of the present invention, covering the complete switching cycle Tsw (time points t0 to t10), including the charging and discharging phases of the flying capacitors C1 to C3. In this embodiment, each flying capacitor has the same DC bias voltage (Vc1 = Vc2 = Vc3 = V2) under steady-state operation, and V1 = 4*V2. In the charging phase, switch Q2 is turned on at time points t0~t1 (corresponding to the first sub-phase of charging), causing the voltage across switch Q1 VQ1 to drop from 3*V2 to 2*V2, corresponding to a voltage difference (V1 – Vc1 – Vc2 = 2*V2). Then, at time points t1~t2, Q3 is turned on (corresponding to the second sub-phase of charging), causing VQ1 to drop from 2*V2 to V2, that is, the voltage across Q1 is (V1 – Vc1 – Vc2 – Vc3 = V2). At times t2 to t3, Q4 is turned on (corresponding to the third sub-phase of charging), causing VQ1 to drop to zero. That is, the voltage across Q1 is (V1–Vc1–Vc2–Vc3–Vc4=0), ensuring that Q1 can achieve zero-voltage switching when it is turned on at time t3. During the period from t3 to t4 (corresponding to the fourth sub-phase of charging), C1 to C3 are connected in series between the first voltage V1 and the second voltage V2 for charging.

[0070] Then, during the idle time (t4~t5), switches Q1~Q10 are all turned off to prevent short circuits.

[0071] Next, during the discharge phase, at times t5-t6 (corresponding to the first sub-phase of discharge), Q10 conducts, causing the voltage across Q5, Q6, and Q7 to decrease by one V2, with the voltage across Q7 decreasing from V2 to zero. At times t6-t7 (corresponding to the second sub-phase of discharge), Q7 conducts to achieve zero-voltage switching, while Q9 conducts, causing the voltage across Q5 and Q6 to decrease by another V2, further reducing the voltage across Q6 to zero. At times t7-t8 (corresponding to the third sub-phase of discharge), Q6 conducts to achieve zero-voltage switching, while Q8 conducts, causing the voltage across Q5 to decrease from V2 to zero. At time t8, Q5 conducts to achieve zero-voltage switching. During the period from t8 to t9 (corresponding to the fourth sub-phase of discharge), C1-C3 are connected in parallel between the second voltage V2 and the ground potential for discharge, supplying power to the second voltage V2.

[0072] In summary, this waveform also shows the voltage changes of Q1, Q7, Q6, and Q5. During the charging phase, because the terminal voltage of, for example, the flying capacitor C1 gradually increases with each charged electron phase, the voltage across Q1 gradually decreases with each charged electron phase, decreasing by approximately one V2 (i.e., one-quarter of V1) with each electron phase until it reaches zero, ensuring zero-voltage switching. Similarly, during the discharging phase, the voltage across Q7, Q6, and Q5 also decreases sequentially with each discharge phase (the terminal voltage of the flying capacitor C1 decreases), ultimately achieving zero-voltage switching upon conduction. In conclusion, Q1, Q5, Q6, and Q7 all achieve zero-voltage switching upon conduction, while the remaining switches operate in a zero-current switching mode, effectively suppressing surge current and switching losses.

[0073] Figure 7A illustrates a pipeline-type switching capacitor converter with a two-phase interleaved architecture according to another preferred embodiment of the present invention. As shown in Figure 7A, the converter 30 consists of three flying capacitors C1, C2, and C3 forming the main energy transfer component, and forms an interleaved switching network with the control circuit 101 via ten switches Q1~Q10 to perform two-phase alternating switching to achieve power conversion. In this structure, the flying capacitor C1 plays an intermediary role, with its left and right ends connected to two sets of sub-converters respectively:

[0074] - The first set of sub-converters includes switches Q2, Q6, Q7, and Q5, which operate in conjunction with flying capacitor C3. - The second set of sub-converters includes switches Q3, Q9, Q10, and Q8, which operate in conjunction with flying capacitor C2. The two sets of sub-converters, together with flying capacitor C1 and switches Q1 and Q4, perform switching operations to convert the power supply between the first voltage V1 and the second voltage V2.

[0075] This embodiment presents a left-right symmetrical but not completely parallel switching topology. The flying capacitor C1 and switches Q1 and Q4 can be regarded as bridges between two phases. The left and right ends of the flying capacitor C1 are alternately turned on in the two phases to realize the energy transmission like pipeline transmission. Furthermore, it is combined with zero voltage switching or zero current switching strategies to reduce switching losses and improve overall efficiency.

[0076] Figure 7B illustrates the switching state of this embodiment in the first switching phase, and its operating logic structurally corresponds to the charging phase shown in Figure 5B. In the first switching phase, flying capacitors C1 and C2 establish a series connection through the gradual conduction of Q3 and Q9 in the first and second sub-phases. Finally, in the third sub-phase, Q1 is turned on to achieve zero-voltage switching, so that C1 and C2 are connected in series between the first voltage V1 and the second voltage V2. In the first switching phase, C1 and C2 are charging and supplying power to V2. In addition, in one embodiment, in the first switching phase, through the sequential gradual conduction of Q7 and Q5 (which can be sequentially conducted in the first and second sub-phases, or sequentially conducted in the second and third sub-phases), flying capacitor C3 is also connected in parallel to the output voltage V2 and ground, realizing the discharge of C3 to supply power to V2. This up-and-down switching division of labor design can be regarded as an extension of the design in Figure 5B, and has the characteristics of pipeline power conversion.

[0077] Figure 7C illustrates the switching state of the second switching phase, and its function can be considered as a correspondence to the structure of the discharge phase shown in Figure 5C. In the second switching phase, the flying capacitor C2 is connected in parallel with the output capacitor Co after Q10 and Q8 are turned on sequentially to release the stored energy to V2. At the same time, the flying capacitors C1 and C3 are connected in series through Q4 and Q6, and are finally turned on by Q2, transferring their total energy to the output terminal. The overall switching sequence still follows the aforementioned principle of sequential turn-on of sub-phases. Key switches (such as Q2 and Q8) are turned on after their voltage across the capacitor gradually decreases, achieving zero-voltage switching.

[0078] Figure 8 is a signal waveform diagram according to a preferred embodiment of the present invention, corresponding to the interleaved two-phase pipeline switching capacitor converter in Figure 7A. During the switching period Tsw (time points t0 to t8), the switching control signals (S3~S10) of the two interleaved phases and the voltage waveforms of the key switches (VQ1, VQ5, VQ8, VQ2) are shown, revealing their conduction sequence and the corresponding zero-voltage switching conditions.

[0079] In the first switching phase, the switch control sequentially corresponds to three sub-phases: the first sub-phase t0~t1 is enabled by control signals S3 and S7, turning on switches Q3 and Q7 to establish a series connection between flying capacitors C1 and C2, while the right end of C3 is connected to ground. The second sub-phase t1~t2 is enabled by control signals S5 and S9, turning on Q5 and Q9 to complete the electrical connection between the left end of C3 and V2, and the right end of C2 and V2. In the third sub-phase t2~t3, after the cross-voltage VQ1 drops to zero, switch Q1 is turned on after a delay, achieving zero-voltage switching. During this three-stage conduction process, the waveforms of VQ1 and VQ5 respectively show the trend of their cross-voltage decreasing to zero. Switches Q1 and Q5 can both be turned on under zero-voltage switching conditions, reducing surge current and improving conversion efficiency.

[0080] In the second switching phase, it is also divided into three sub-phase operations: In the first sub-phase t4~t5, S6 and S10 are enabled, turning on switches Q6 and Q10, establishing electrical connections between the right end of C3 and V2, and between the right end of C2 and ground. In the second sub-phase t5~t6, S4 and S8 are enabled, turning on Q4 and Q8, establishing electrical connections between the right end of C1 and ground, and between the left end of C2 and V2. In the third sub-phase t6~t7, Q2 is turned on, completing the zero-voltage switching. The waveforms of VQ8 and VQ2 show that their corresponding switches Q8 and Q2 both experience a gradual voltage decrease and turn on when approaching zero voltage.

[0081] Overall, the waveform shown in Figure 8 further verifies the feasibility and efficiency advantages of the staggered two-phase design in the architecture of Figure 7A. Through the segmented conduction and cross-voltage control of multiple sub-phases within each phase, at least four key switches (Q1, Q5, Q8, Q2) are ensured to start under zero-voltage switching conditions, while the remaining switches can achieve zero-current switching as needed, comprehensively suppressing surge current and enhancing the stability and efficiency of energy conversion.

[0082] Figure 9A is a circuit diagram of a Dickson-type switching capacitor converter according to a preferred embodiment of the present invention. In this embodiment, the switching capacitor converter 40 includes three flying capacitors C1, C2, and C3, and switches Q1 to Q8. Through the switching timing control of the control circuit, two complementary switching phases are formed to perform switching capacitor power conversion. Under steady-state operation, the voltages of C1, C2, and C3 are 3*V2, 2*V2, and V2, respectively, to achieve a 4:1 buck conversion. This structure also supports bidirectional power transfer.

[0083] Figure 9B shows the electrical connection state in the first switching phase. In this phase, the positive terminal (upper end) of the flying capacitor C1 is electrically connected to the first voltage V1 (through Q1), and the negative terminal (lower end) is electrically connected to the second voltage V2 (through Q5). C2 and C3 form a series connection between the second voltage V2 and the ground potential. The negative terminal of C2 is connected to the ground potential (through Q8), and its positive terminal is electrically connected to the positive terminal of C3. The negative terminal of C3 is then electrically connected to the second voltage V2 via Q5.

[0084] Figure 9C corresponds to the electrical connection state under the second switching phase. In this phase, flying capacitors C1 and C2 form a series structure. The positive terminal of C1 is electrically connected to the positive terminal of C2, the negative terminal of C2 is connected to the second voltage V2 (through Q6), and the negative terminal of C1 is connected to the ground potential (through Q7). At the same time, flying capacitor C3 is directly connected in parallel between the second voltage V2 and the ground potential, and is connected through Q4 and Q7 respectively.

[0085] Figure 10 shows the voltage waveform changes of each control signal and corresponding key switch in the circuit described in Figure 9A during a complete switching cycle Tsw (time points t0 to t6). The first switching phase (t0 to t2) includes two sub-phases: in the first sub-phase t0~t1, control signals S5 and S8 are enabled, and switches Q5 and Q8 are turned on first, gradually reducing the voltage across Q1 and Q3. In the second sub-phase t1~t2, control signals S1 and S3 are enabled, and Q1 and Q3 are turned on under zero-voltage switching conditions.

[0086] The second switching phase (t3 to t5) also includes two sub-phases. In the first sub-phase (t3~t4), control signals S6 and S7 are enabled, turning on Q6 and Q7 and gradually reducing the voltage across Q2 and Q4. In the second sub-phase (t4~t5), control signals S2 and S4 are enabled, turning on Q2 and Q4 when the voltage across them drops to near zero, achieving zero-voltage switching. In summary, this embodiment gradually reduces the voltage across the critical switches, enabling switches Q1, Q2, Q3, and Q4 to conduct under zero-voltage switching conditions, thereby reducing switching losses and improving conversion efficiency.

[0087] As can be seen from the foregoing figures and embodiments, to effectively suppress inrush current and reduce switching losses, this invention proposes a systematic control principle applicable to various switching capacitor converter topologies with single or multiple flying capacitors, including but not limited to the basic 2:1 architecture, series-parallel architecture, pipeline architecture, and Dixon architecture. In a more general design, the conversion ratio of the first voltage V1 to the second voltage V2 can be K:1 (or 1:K), where K is a positive integer greater than 2, such as 4:1, 5:1, 6:1, or even higher-order multi-stage converters. In such architectures, through the periodic switching electrical connection of multiple flying capacitors, combined with the step-by-step strategy disclosed in this invention—first turning on the low-voltage end, gradually turning on the high-voltage end, voltage reduction across voltages, and delayed timing—zero-voltage switching and zero-current switching can be widely achieved, effectively improving overall conversion efficiency.

[0088] In a converter with multiple flying capacitors, this invention first defines "terminal phase voltage difference" as the absolute value of the difference between the voltage levels of corresponding nodes at a certain terminal of any flying capacitor during two switching phases (such as charging and discharging). This "terminal phase voltage difference" can serve as the basis for selecting key flying capacitors and corresponding switches. That is, since a larger terminal phase voltage difference will result in higher instantaneous current and losses if directly turned on at the switching instant, a zero-voltage switching strategy should be prioritized. If multiple flying capacitors have similar terminal phase voltage differences, the absolute values ​​of the terminal potentials can be further compared to determine the conduction sequence and ensure that the voltage across the capacitor decreases gradually from high to low, effectively promoting zero-voltage switching.

[0089] In actual control timing, the flying capacitor should first turn on its lower voltage end to form an electrical connection between the relative nodes, allowing the voltage across the higher voltage end to drop naturally through the flying capacitor. Then, at the appropriate time, the switch at the higher voltage end should be turned on to achieve zero-voltage switching. Other flying capacitors should be turned on sequentially from low to high voltage according to the voltage distribution, forming a stepped voltage transfer, further reducing the overall system surge current and electromagnetic interference (EMI).

[0090] When the topology needs to be converted to different electrical connections between switching phases (e.g., from series to parallel), this invention suggests that at the beginning of the new switching phase, the terminal with the lowest potential in the original series structure should be turned on first, and the voltage should be gradually released so that the high-voltage terminal is turned on last, thereby completing a smooth energy transfer. From one perspective, this sequence corresponds to the gradual disassembly of the series electrical connection. Regarding the terminal voltage of the capacitor, the conduction sequence is reversed, thereby ensuring that the conduction of each switch is accompanied by a voltage reduction process, in order to enable the most switches to achieve zero-voltage switching.

[0091] Furthermore, in situations involving load current fluctuations, this invention also incorporates the voltage shift caused by these fluctuations into the control strategy. Even if the voltage difference between each endpoint is predicted under steady-state conditions, actual voltage variations may occur due to load influences during practical operation, affecting the turn-on timing. Therefore, the "endpoint phase voltage difference" defined in this invention, in addition to static analysis, can also be dynamically evaluated and adjusted in the controller through real-time measurement or prediction, enabling critical switches to maintain better zero-voltage switching conduction even under non-steady-state conditions.

[0092] For application architectures containing only a single flying capacitor, the present invention can perform the same endpoint voltage difference evaluation based on the "endpoint phase voltage difference" of the corresponding switching phase nodes at both ends, select the one with the larger endpoint phase voltage difference as the zero-voltage switching control object, and can preset a fixed delay time or conduct after the voltage drop across the preset threshold through a voltage sensing circuit to achieve high-efficiency switching.

[0093] In summary, the flying capacitor conduction sequence and switching control strategy provided by this invention not only provides operational optimization for a single topology, but is also applicable to various topologies composed of multi-stage flying capacitors. It is highly flexible and expandable, and its conduction priority and delay time settings can be adjusted according to different topologies and load conditions, enabling the most switches to achieve zero-voltage / zero-current switching. It is widely applicable to high-efficiency, low-loss switching capacitor power conversion applications.

[0094] The present invention has been described above with reference to preferred embodiments. However, the above description is only intended to facilitate understanding of the invention by those skilled in the art and is not intended to limit the broadest scope of the invention. The described embodiments are not limited to individual application and can also be combined. For example, two or more embodiments can be used in combination, and a component of one embodiment can replace a corresponding component in another embodiment. Furthermore, within the same spirit of the invention, those skilled in the art can conceive of various equivalent changes and combinations. For example, the phrase "processing or calculating based on a signal or generating an output result" in the present invention is not limited to the signal itself, but also includes, when necessary, performing voltage-to-current conversion, current-to-voltage conversion, and / or proportional conversion on the signal, and then processing or calculating based on the converted signal to generate an output result. Therefore, within the same spirit of the invention, those skilled in the art can conceive of various equivalent changes and combinations, and there are many combinations, which will not be listed here. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

[0095] 20, 30, 40: Switching Capacitor Converter 101: Control Circuit 1011: Zero Voltage Detection Circuit 10111: Logic control circuit 10112: Drive C1~C3: Flying capacitors Co: Output capacitor CP: Comparator K: Conversion ratio Na: Switch node Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10: Switches S1, S2, S3, S4, S5, S6, S7, S8, S9, S10: Switch control signals SZV: Zero Voltage Signal Td: Preset delay time Tsw: Switching cycle V1: First voltage V2: Second voltage Vc1: Flying capacitor; C1 DC bias voltage Vc2: Flying capacitor; C2 DC bias voltage Vc3: Flying capacitor C3 DC bias voltage VDS: Voltage Detection Signal VQ1, VQ2, VQ3, VQ4, VQ5, VQ6, VQ7, VQ8: Switching voltage across the circuit VT: Threshold voltage

Claims

1. A switching capacitor converter, comprising: N flying capacitors, where N ≥ 1; a plurality of switches for periodically switching between a plurality of switching phases to convert a first voltage to a second voltage, or vice versa; wherein, upon entering a first switching phase among the plurality of switching phases, a first terminal of one of the N flying capacitors is turned on before a second terminal to be electrically connected to the node corresponding to the first switching phase, forming the coupling relationship required for the first switching phase, thereby allowing the second terminal to gradually approach a zero-voltage state and then be turned on to be electrically connected to the node corresponding to the first switching phase to achieve zero-voltage switching; wherein the terminal phase voltage difference (ΔV_T) of the second terminal is greater than or equal to the terminal phase voltage difference of the first terminal, wherein the terminal phase voltage difference refers to the absolute value of the difference between the voltage levels of the corresponding first terminal or the second terminal at the plurality of switching phases.

2. The switching capacitor converter as claimed in claim 1, wherein, in steady state, the voltage at the first terminal is lower than the voltage at the second terminal.

3. The switching capacitor converter as claimed in claim 1, wherein the terminal phase voltage difference includes at least a portion of the N flying capacitors undergoing a voltage drop or increase under load variation.

4. The switching capacitor converter as claimed in claim 1, wherein when N is a complex number (N > 1), in the first switching phase in which the complex flying capacitors are connected in series to form a voltage distribution, among the complex flying capacitors, a selected flying capacitor having the largest terminal phase voltage difference has its first terminal turned on first, and then its second terminal turned on, to ensure that the second terminal of the selected flying capacitor gradually approaches a zero voltage state to achieve zero voltage switching.

5. The switching capacitor converter as described in claim 4, wherein in the first switching phase, the other flying capacitors of the plurality of flying capacitors sequentially turn on their corresponding first terminals according to their voltage distribution order, so that the second terminal of the selected flying capacitor gradually approaches a zero voltage state, thereby achieving near-zero voltage switching when the second terminal of the selected flying capacitor is turned on and electrically connected to the node corresponding to the first switching phase.

6. The switching capacitor converter as claimed in claim 4, wherein in the first switching phase, the second terminal of the selected flying capacitor is the node that is last turned on to the first switching phase among all the series-connected complex flying capacitors.

7. The switching capacitor converter as claimed in claim 4, wherein in the first switching phase, the plurality of flying capacitors are sequentially turned on such that the voltage change at the first terminal and the second terminal of each flying capacitor is progressively increasing.

8. The switching capacitor converter as described in claim 4, wherein when N is a complex number (N > 1), in the first switching phase, when the number of the complex flying capacitors having the largest terminal phase voltage difference is complex, the one with the highest potential at the corresponding first terminal corresponds to the selected flying capacitor.

9. The switching capacitor converter as claimed in claim 1, wherein the multiple flying capacitors are connected in series to form a voltage distribution in the first switching phase, and when switching to the second switching phase, the multiple flying capacitors are converted from the series connection to a non-series connection, and during this conversion process, the first terminal corresponding to the flying capacitor at the low voltage end in the voltage distribution is turned on first, so as to connect it to the node corresponding to the second switching phase, and according to the voltage distribution sequence, the first terminals of the remaining flying capacitors in the multiple flying capacitors are turned on step by step to ensure the gradual disassembly of the series connection to achieve at least a partial zero-voltage switching.

10. The switching capacitor converter as claimed in claim 9, wherein in the second switching phase, the complex flying capacitors are switched from a series state to a parallel state.

11. The switching capacitor converter as claimed in claim 9, wherein in the second switching phase, the plurality of flying capacitors are gradually turned on to ensure that the voltage change at the first and second terminals of each flying capacitor is gradually decreasing.

12. The switching capacitor converter as claimed in claim 9, wherein in the second switching phase, the conduction sequence of the complex flying capacitors is opposite to the conduction sequence forming the series connection in the first switching phase.

13. The switching capacitor converter as claimed in claim 4, wherein the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch, and wherein: The first switch (Q1) is coupled between the first voltage and the second terminal of the selected flying capacitor (C1); the second switch (Q2) is coupled between the first terminal of the selected flying capacitor and the second voltage; the third switch (Q3) is coupled between the second terminal of the selected flying capacitor and the second voltage; and the fourth switch (Q4) is coupled between the first terminal of the selected flying capacitor and a ground potential.

14. The switching capacitor converter as claimed in claim 13, wherein in the first switching phase, the second switch is turned on earlier than the first switch, such that the first switch is turned on at zero voltage to charge the selected flying capacitor; and in the second switching phase, the fourth switch is turned on earlier than the third switch, such that the third switch is turned on at zero voltage to discharge the selected flying capacitor.

15. The switching capacitor converter as claimed in claim 13, wherein the conversion ratio of the first voltage to the second voltage is 2:

1.

16. The switching capacitor converter as described in claim 14, wherein the first switch turns on after the second switch turns on, and after a preset delay time, the third switch turns on after the fourth switch turns on, and / or after a preset delay time.

17. The switching capacitor converter as claimed in claim 14, wherein the first switch is turned on when the voltage across it is below a threshold to achieve zero-voltage switching, and / or the third switch is turned on when the voltage across it is below a threshold to achieve zero-voltage switching.

18. The switching capacitor converter as claimed in claim 1, wherein the switching capacitor converter corresponds to a series-parallel switching capacitor converter with a conversion ratio of K:1 between the first voltage and the second voltage, wherein K is a positive integer greater than 2.

19. The switching capacitor converter as described in claim 1, wherein the switching capacitor converter corresponds to a K:1 pipeline switching capacitor converter or a K:1 Dickson switching capacitor converter, wherein K is a positive integer greater than 2.

20. A method for switching a capacitor power supply, comprising: performing periodic switching of a complex switching phase to achieve a conversion between a first voltage and a second voltage; wherein, When entering a first switching phase, the first terminal of a flying capacitor is controlled to preferentially form an electrical connection with the corresponding node, so that its second terminal can gradually approach zero voltage, and then the second terminal is turned on to achieve zero voltage switching; wherein the second terminal has an endpoint phase voltage difference greater than or equal to the first terminal, and the endpoint phase voltage difference refers to the absolute value of the difference between the voltage levels of the corresponding nodes at the complex switching phases.

21. The method as described in claim 20, wherein, under steady-state operation, the potential of the first terminal is lower than the potential of the second terminal.

22. The method as described in claim 20, wherein when a plurality of flying capacitors are connected in series in a first switching phase of the plurality of switching phases to form a voltage distribution, the flying capacitor with the largest terminal phase voltage difference is selected as the selected flying capacitor, and its first terminal is controlled to be turned on first, and its second terminal is turned on later, so as to ensure that the second terminal gradually approaches the zero voltage state before being turned on to achieve zero voltage switching.

23. The method as described in claim 22, wherein the second terminal of the selected flying capacitor is the last of all the series-connected flying capacitors to be turned on to the node corresponding to the first switching phase.

24. The method as described in claim 22, wherein when there are multiple flying capacitors having the same maximum terminal phase voltage difference, the one with the highest corresponding first terminal potential is selected as the selected flying capacitor.

25. The method as described in claim 22, wherein in the first switching phase, the multiple flying capacitors are sequentially turned on to form a voltage distribution; when switching to a second switching phase of the multiple switching phase, the first terminal of the flying capacitor with the lowest potential in the voltage distribution is controlled to be turned on first, and the first terminals of other flying capacitors are turned on gradually according to the potential order, so as to gradually dismantle the series electrical connection and achieve partial or complete zero-voltage switching.

26. The method as described in claim 25, wherein the conduction sequence of the complex flying capacitors in the second switching phase is the opposite of the conduction sequence forming the series electrical connection in the first switching phase.

27. The method as described in claim 20, wherein the conduction of the first terminal is delayed relative to the second terminal by a preset time, or the conduction of the second terminal is delayed relative to the first terminal by a preset time, so that the voltage at the corresponding terminal drops, thereby achieving zero-voltage switching.

28. The method as described in claim 20, wherein the second terminal is turned on only when the voltage across its corresponding switch is below a preset threshold, so as to ensure that the switch corresponding to the terminal achieves zero-voltage switching.

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