Semiconductor device and fabrication method thereof

Abstract

A semiconductor device includes a substrate, a second semiconductor layer, electronic components, a dicing opening, and a contact structure. The substrate includes a semiconductor base, an insulating layer, and a first semiconductor layer, wherein the first semiconductor layer is on the insulating layer, and the insulating layer covers the semiconductor base. The second semiconductor layer is disposed on the substrate, and the electronic components are disposed on the second semiconductor layer. The dicing opening passes through the second semiconductor layer and the first semiconductor layer, exposes the insulating layer of the substrate, and surrounds the electronic components. The contact structure is disposed at the dicing opening and includes a conductive layer disposed oriented along the sidewalls and bottom surface of the dicing opening, and the conductive layer is electrically connected to the first semiconductor layer.

Claims

1. A semiconductor device, comprising: A substrate includes a semiconductor substrate, an insulating layer, and a first semiconductor layer, wherein the first semiconductor layer is on the insulating layer and the insulating layer covers the semiconductor substrate; a second semiconductor layer is disposed on the substrate, wherein the second semiconductor layer directly contacts the first semiconductor layer; an electronic component is disposed on the second semiconductor layer; a dicing opening extends through the second semiconductor layer and the first semiconductor layer, exposes the insulating layer of the substrate, and surrounds the electronic component; and a contact structure is disposed in the dicing opening, including a conductive layer disposed oriented in the sidewalls and bottom surface of the dicing opening, and the conductive layer is electrically connected to the first semiconductor layer.

2. The semiconductor device as claimed in claim 1, wherein the contact structure further includes: A first dielectric layer is disposed oriented on the conductive layer; A second dielectric layer is disposed oriented on the first dielectric layer; A third dielectric layer is disposed on the second dielectric layer and fills the cut-out opening; A conductive plug is disposed in the cut channel opening, penetrating the third dielectric layer, the second dielectric layer and the first dielectric layer, and the conductive plug is electrically connected to the conductive layer.

3. The semiconductor device as claimed in claim 2, wherein the bottom surface of the conductive plug contacts the conductive layer located on the bottom surface of the dicing opening.

4. The semiconductor device as claimed in claim 2 further includes an interconnect layer electrically connected to the conductive plug, and the substrate is electrically connected to a ground voltage through the conductive layer, the conductive plug and the interconnect layer.

5. The semiconductor device as claimed in claim 2 further includes a third semiconductor layer disposed on the second semiconductor layer, and the third semiconductor layer being laterally connected to the conductive layer.

6. The semiconductor device as claimed in claim 1, wherein the contact structure further comprises: A first dielectric layer is disposed oriented on the conductive layer; A second dielectric layer is disposed oriented on the first dielectric layer; A third dielectric layer is disposed on the second dielectric layer and fills the remaining space of the dicing opening; and a contact pad is disposed on the second semiconductor layer and electrically connected to the conductive layer.

7. The semiconductor device as claimed in claim 6, wherein the contact pad and the conductive layer have the same composition, and the contact pad extends laterally from the top surface of the conductive layer to the second semiconductor layer.

8. The semiconductor device as claimed in claim 6 further includes an interconnect layer electrically connected to the contact pad, and the substrate is electrically connected to a ground voltage through the conductive layer, the contact pad and the interconnect layer.

9. The semiconductor device as claimed in claim 6 further includes a third semiconductor layer disposed between the contact pad and the second semiconductor layer.

10. The semiconductor device as claimed in claim 1, wherein the conductive layer located on the bottom surface of the dicing opening directly contacts the side surface of the first semiconductor layer, and the conductive layer located on the sidewall of the dicing opening directly contacts the side surface of the second semiconductor layer.

11. The semiconductor device as claimed in claim 1, further comprising a metal layer disposed above the second semiconductor layer, wherein a first portion of the metal layer directly contacts the contact structure, the electronic element includes a high electron mobility transistor, and a second portion of the metal layer constitutes a gate of the high electron mobility transistor.

12. The semiconductor device as claimed in claim 1, wherein the substrate includes an engineering substrate or a semiconductor on insulator substrate, and the engineering substrate includes a composite engineering material layer encapsulating the semiconductor substrate, the insulating layer being disposed on the composite engineering material layer.

13. A method for manufacturing a semiconductor device, comprising: A substrate is provided, comprising a semiconductor substrate, an insulating layer, and a first semiconductor layer, wherein the first semiconductor layer is on the insulating layer and the insulating layer covers the semiconductor substrate; a second semiconductor layer is formed on the substrate, wherein the second semiconductor layer directly contacts the first semiconductor layer; an electronic component is formed on the second semiconductor layer; a dicing opening is formed through the second semiconductor layer and the first semiconductor layer to expose the insulating layer of the substrate and surround the electronic component; and a contact structure is formed in the dicing opening, the contact structure comprising a conductive layer oriented in the sidewalls and bottom surface of the dicing opening, and the conductive layer being electrically connected to the first semiconductor layer.

14. A method for manufacturing a semiconductor device as described in claim 13, wherein forming the contact structure comprises: On the second semiconductor layer and within the dicing opening, the conductive layer, a first dielectric layer, and a second dielectric layer are sequentially deposited in a forward orientation. A third dielectric layer is deposited to fill the remaining space of the cut channel opening; the conductive layer, the first dielectric layer, and the second dielectric layer located outside the cut channel opening are removed; and a conductive plug is formed in the cut channel opening, penetrating the third dielectric layer, the second dielectric layer, and the first dielectric layer, and the conductive plug is electrically connected to the conductive layer.

15. The method of manufacturing a semiconductor device as claimed in claim 14, further comprising forming a third semiconductor layer on the second semiconductor layer, wherein the dicing opening passes through the third semiconductor layer, the conductive layer is deposited on the third semiconductor layer, and the third semiconductor layer is exposed after removing the conductive layer, the first dielectric layer and the second dielectric layer located outside the dicing opening.

16. The method of manufacturing a semiconductor device as claimed in claim 14, further comprising forming an interconnect layer located above the second semiconductor layer, and the interconnect layer being electrically connected to the conductive plug.

17. A method of manufacturing a semiconductor device as claimed in claim 13, wherein forming the contact structure comprises: On the second semiconductor layer and within the dicing opening, the conductive layer, a first dielectric layer, and a second dielectric layer are sequentially deposited in a forward orientation. A third dielectric layer is deposited to fill the remaining space of the cut channel opening; the first dielectric layer and the second dielectric layer located outside the cut channel opening are removed; and the conductive layer located outside the cut channel opening is patterned to form a contact pad, and the contact pad is electrically connected to the conductive layer.

18. The method of manufacturing a semiconductor device as claimed in claim 17, further comprising forming a third semiconductor layer on the second semiconductor layer, wherein the dicing opening passes through the third semiconductor layer, the conductive layer is deposited on the third semiconductor layer, and the conductive layer and the third semiconductor layer located outside the dicing opening are simultaneously patterned, the third semiconductor layer being located between the contact pad and the second semiconductor layer.

19. The method of manufacturing a semiconductor device as claimed in claim 17, further comprising forming an interconnect layer located above the second semiconductor layer, and the interconnect layer being electrically connected to the contact pad.

20. A method of manufacturing a semiconductor device as claimed in claim 13, wherein the conductive layer formed on the bottom surface of the dicing opening directly contacts the side surface of the first semiconductor layer, and the substrate is electrically connected to a ground voltage through the contact structure.

Images