Semiconductor structure and manufacturing method thereof

Abstract

A semiconductor structure includes a substrate structure, a first wafer structure, and a second wafer structure. The first wafer structure and the second wafer structure are bonded to the substrate structure. A first bonding interface between the first wafer structure and the substrate structure is different from a second bonding interface between the second wafer structure and the substrate structure.

Claims

1. A semiconductor structure, comprising: A substrate structure includes: a substrate layer; a first dielectric layer disposed on the substrate layer; and a first pad, a second pad, and an interconnect structure disposed in the first dielectric layer; a first wafer structure and a second wafer structure bonded to the substrate structure, wherein a first bonding interface between the first wafer structure and the substrate structure is different from a second bonding interface between the second wafer structure and the substrate structure, and the first wafer structure includes: a first wafer layer; a second dielectric layer disposed on the first wafer layer and bonded to the first dielectric layer; and a third pad disposed in the second dielectric layer and bonded to the first pad; and a first substrate via disposed in the first wafer layer and the second dielectric layer and connected to the third pad.

2. The semiconductor structure as described in claim 1, further comprising: A third wafer structure is bonded to the substrate structure, wherein the third bonding interface between the third wafer structure and the substrate structure is different from the first bonding interface and the second bonding interface.

3. The semiconductor structure as claimed in claim 2, wherein the first wafer structure, the second wafer structure and the third wafer structure include a transistor wafer structure.

4. The semiconductor structure as claimed in claim 2, wherein the first bonding interface, the second bonding interface and the third bonding interface include a hybrid bonding interface, a bump bonding interface or a fused bonding interface.

5. The semiconductor structure as claimed in claim 2, wherein the second wafer structure comprises: Second wafer layer; And a bump structure located on the second wafer layer and bonded to the second pad.

6. The semiconductor structure as described in claim 5, further comprising: The second substrate via is located in the second wafer layer and is connected to the bump structure.

7. The semiconductor structure as claimed in claim 5, wherein the third wafer structure comprises: Third wafer layer; And a third dielectric layer, located on the third wafer layer and bonded to the first dielectric layer.

8. The semiconductor structure as described in claim 7, further comprising: The second substrate via is located in the third wafer layer, the third dielectric layer and the first dielectric layer, and is connected to the interconnect structure.

9. The semiconductor structure as described in claim 7, further comprising: An encapsulation layer is located on the substrate structure, wherein the first wafer structure, the second wafer structure and the third wafer structure are located within the encapsulation layer.

10. The semiconductor structure of claim 9, wherein the encapsulation layer exposes the top surface of the first wafer structure, the top surface of the second wafer structure, and the top surface of the third wafer structure.

11. The semiconductor structure of claim 9, wherein the encapsulation layer covers the top surface of the first wafer structure, the top surface of the second wafer structure, and the top surface of the third wafer structure.

12. A method for manufacturing a semiconductor structure, comprising: A substrate structure is provided, wherein the substrate structure includes: a substrate layer; a first dielectric layer disposed on the substrate layer; and a first pad, a second pad, and an interconnect structure disposed in the first dielectric layer; a first wafer structure is bonded to the substrate structure, wherein the first wafer structure includes: a first wafer layer; a second dielectric layer disposed on and bonded to the first dielectric layer; and a third pad disposed in the second dielectric layer and bonded to the first pad; a second wafer structure is bonded to the substrate structure, wherein a first bonding interface between the first wafer structure and the substrate structure is different from a second bonding interface between the second wafer structure and the substrate structure; and a substrate via is formed in the first wafer layer and the second dielectric layer, wherein the substrate via is connected to the third pad.

13. The method for manufacturing a semiconductor structure as described in claim 12, further comprising: A third wafer structure is bonded to the substrate structure, wherein the third bonding interface between the third wafer structure and the substrate structure is different from the first bonding interface and the second bonding interface.

14. A method for manufacturing a semiconductor structure as claimed in claim 13, wherein the first wafer structure further comprises: A first carrier substrate, wherein the second dielectric layer is located on the opposite side of the first carrier substrate from the first wafer layer; And a first release layer, located between the first carrier substrate and the first wafer layer.

15. A method for manufacturing a semiconductor structure as claimed in claim 14, wherein the second wafer structure comprises: Second wafer layer; And a bump structure and a second carrier substrate, located on opposite sides of the second wafer layer, wherein the bump structure is engaged with the second pad; And a second release layer, located between the second carrier substrate and the second wafer layer.

16. A method for manufacturing a semiconductor structure as claimed in claim 15, wherein the third wafer structure comprises: Third wafer layer; The third dielectric layer and the third carrier substrate are located on opposite sides of the third wafer layer, wherein the third dielectric layer is bonded to the first dielectric layer; And a third release layer, located between the third carrier substrate and the third wafer layer.

17. The method of manufacturing a semiconductor structure as described in claim 16 further includes: After bonding the first wafer structure to the substrate structure, the first release layer and the first carrier substrate are removed; After bonding the second wafer structure to the substrate structure, the second release layer and the second carrier substrate are removed; And after bonding the third wafer structure to the substrate structure, the third release layer and the third carrier substrate are removed.

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