Low dropout regulator, sensing circuit and transient enhancement circuit with reverse current protection
Patent Information
- Application Number
- TW114130667
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2025-06-05
- Filing Date
- 2025-08-12
- Publication Date
- 2026-10-11
- Estimated Expiration
- 2045-08-11
Smart Images

Figure TWG2TB001915615_001 
Figure TWG2TB001915615_002 
Figure TWG2TB001915615_003
Abstract
Claims
1. A low dropout (LDO) regulator comprising: a reverse current protection (RCP) sensing circuit coupled between an input terminal and an output terminal for detecting the direction of current between the input terminal and the output terminal and generating a voltage difference signal corresponding to the current direction; a comparator coupled to the RCP sensing circuit for comparing the voltage difference signal with a threshold value and generating a control signal thereon; a power transistor coupled to the output terminal; and a switching transistor coupled between the input terminal and the power transistor for selectively coupling or disconnecting the power transistor from the input terminal based on the control signal during normal operation and reverse current conditions; wherein normal operation occurs when the input voltage exceeds the output voltage, and the reverse current condition occurs when the output voltage exceeds the input voltage.
2. The low-dropout regulator as claimed in claim 1, further comprising: an error amplifier including: a first input terminal for receiving a reference voltage; a second input terminal coupled to a feedback node; and an output terminal coupled to a control terminal of the power transistor; a resistor divider coupled between the output terminal and a ground terminal, including a first resistor and a second resistor connected in series to the feedback node for providing a feedback voltage to the second input terminal of the error amplifier; a first diode coupled in parallel with the switching transistor to the input terminal; and a second diode coupled in parallel with the power transistor.
3. The low-dropout regulator as claimed in claim 1, wherein the reverse current protection sensing circuit comprises: a first sensing transistor coupled to the input terminal; a second sensing transistor coupled to the output terminal; a third sensing transistor coupled between the first sensing transistor and the second sensing transistor; and a sensing resistor coupled between the first sensing transistor and the third sensing transistor; wherein current flows through the sensing resistor in a first direction during normal operation and in a second direction during the reverse current condition.
4. The low-dropout regulator as described in claim 3, wherein: The voltage difference signal is generated by comparing a first voltage at a first node between the first sensing transistor and the sensing resistor with a second voltage at a second node between the sensing resistor and the second sensing transistor; and the first voltage is lower than the second voltage during normal operation and higher than the second voltage during reverse current conditions.
5. The low-dropout regulator as described in claim 3, wherein: The first sensing transistor, the second sensing transistor, and the third sensing transistor are turned on during normal operation; and the first sensing transistor, the second sensing transistor, and the third sensing transistor are turned off during the reverse current condition.
6. The low-dropout regulator as described in claim 1 further includes a transient enhancement circuit coupled to the comparator to increase the bias current of the comparator when the output is under high load conditions.
7. The low-dropout regulator as claimed in claim 6, wherein the transient enhancement circuit comprises: a bias current source; a first current mirror coupled to the bias current source; a high-voltage transistor coupled to the first current mirror; and a load sensing transistor coupled to the control terminal of the high-voltage transistor and the power transistor, for turning on when the gate-source voltage of the power transistor exceeds a critical voltage.
8. The low-dropout regulator as described in claim 7, wherein the threshold voltage of the load sensing transistor is higher than the threshold voltage of the power transistor, so that the load sensing transistor remains off under light load conditions.
9. The low-dropout regulator as claimed in claim 6, wherein the transient enhancement circuit further comprises: a second current mirror coupled to the first current mirror; and a third current mirror coupled to the second current mirror.
10. The low-dropout regulator as claimed in claim 1, wherein the control signal: turns on the switching transistor by providing a high voltage to the gate-source junction of the switching transistor during normal operation; and turns off the switching transistor by providing a low voltage to the gate-source junction of the switching transistor under reverse current conditions.
11. The low-dropout regulator as claimed in claim 1, wherein the comparator comprises: an input stage including a plurality of high-voltage input transistors coupled in a differential configuration; a plurality of high-voltage transistors, each with its gate terminal biased to a predetermined voltage and coupled to a corresponding high-voltage input transistor; and an output stage including a plurality of current mirrors coupled to the input stage for generating the control signal based on the differential current distribution of the input stage.
12. The low-dropout regulator as described in claim 11, wherein the comparator further includes a bias current circuit for providing bias current.
13. A reverse current protection sensing circuit, comprising: a first detection node for providing a first detection voltage; a second detection node for providing a second detection voltage; a first sensing transistor comprising: a first terminal coupled to an input voltage node; a second terminal coupled to the first detection node; and a control terminal for receiving a control signal; a second sensing transistor comprising: a first terminal coupled to the second detection node; a second terminal coupled to an output voltage node; and a control terminal coupled to the first terminal of the second sensing transistor; a third sensing transistor comprising: a first terminal for receiving an internal node voltage; a second terminal coupled to the second detection node; and a control terminal for receiving the control signal; and a sensing resistor coupled between the first detection node and the second detection node.
14. The reverse current protection sensing circuit as described in claim 13, wherein: The first detection voltage and the second detection voltage form a voltage difference signal; the voltage difference signal has a first polarity when current flows from the input voltage node to the output voltage node during normal operation, and a second polarity when current flows from the output voltage node to the input voltage node during reverse current conditions; and the first sensing transistor, the second sensing transistor, and the third sensing transistor are simultaneously turned on during normal operation and simultaneously turned off during the reverse current conditions.
15. The reverse current protection sensing circuit as described in claim 14, wherein the second sensing transistor remains off during the reverse current condition.
16. The reverse current protection sensing circuit as described in claim 14, further comprising: a comparator including a first input coupled to the first detection node, a second input coupled to the second detection node, and an output for providing the control signal; wherein the control signal provides a first voltage during normal operation to turn on the first sensing transistor and the third sensing transistor, and provides a second voltage during reverse current conditions to turn off the first sensing transistor and the third sensing transistor.
17. The reverse current protection sensing circuit as described in claim 14, wherein the first sensing transistor and the third sensing transistor are P-type transistors, and the threshold voltages of the transistors are set to be simultaneously turned on during normal operation and simultaneously turned off during reverse current conditions.
18. A transient enhancement circuit, comprising: a bias current source for generating a reference current; a first current mirror coupled to the bias current source for mirroring the reference current; a first transistor comprising: a first terminal coupled to a voltage node; a second terminal; and a control terminal coupled to a bias voltage; a second transistor comprising: a first terminal coupled to the second terminal of the first transistor; a second terminal; and a control terminal for receiving a drive voltage; a second current mirror coupled to the first current mirror; and a third current mirror coupled to the second current mirror for enhancing the bias current.
19. The transient enhancement circuit as described in claim 18, wherein: The critical voltage of the second transistor is higher than that of the power transistor; and the bias current is substantially equal to the reference current under light load conditions and greater than the reference current under heavy load conditions.
20. The transient enhancement circuit as described in claim 19, wherein: The second current mirror does not function under light load conditions because the second transistor is turned off; and the third current mirror is used to amplify the reference current by a predetermined factor under heavy load conditions to enhance the bias current.
Citation Information
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