Electronic package and manufacturing method thereof

Abstract

An electronic package and its manufacturing method are disclosed, which mainly involves forming a plurality of conductive pads and a plurality of conductive bumps on a carrier and an electronic component, respectively, and a first covering layer and a second covering layer covering the plurality of conductive pads and the plurality of conductive bumps. Solder material is then formed on the plurality of conductive pads and the plurality of conductive bumps, so that when the electronic component and the carrier are joined by the solder material, the solder material can be prevented from sag and causing insufficient height between the electronic component and the carrier through the first covering layer and the second covering layer.

Claims

1. An electronic package, comprising: A carrier has a first surface and a second surface opposite to each other, and a plurality of conductive pads and a first covering layer covering the plurality of conductive pads are formed on the first surface; an electronic component has an active surface and a non-active surface opposite to each other, and a plurality of conductive bumps and a second covering layer covering the plurality of conductive bumps are formed on the active surface; and a plurality of conductive elements are sandwiched between the plurality of conductive pads and the plurality of conductive bumps, so that the electronic component is electrically connected to the plurality of conductive pads of the carrier through the plurality of conductive bumps and the plurality of conductive elements, wherein the ends of the plurality of conductive pads and the ends of the plurality of conductive bumps protrude outward from the first covering layer and the second covering layer, respectively.

2. The electronic package as described in claim 1 further includes a plurality of conductive elements disposed on the second surface of the carrier.

3. The electronic package as claimed in claim 2 further includes a substrate for the carrier to be disposed on the substrate through the plurality of conductive elements.

4. The electronic package as described in claim 1, wherein, The carrier is an intermediary board or substrate, and includes a dielectric layer and a circuit layer bonded to the dielectric layer.

5. The electronic package as described in claim 4, wherein, The complex conductive pads are electrically connected to the circuit layer.

6. The electronic package as described in claim 1, wherein, The conductive component includes a flat portion and an arc portion, and the size of the flat portion is proportional to the size of the conductive bump.

7. The electronic package as described in claim 1, wherein, The thickness of the first coating layer is different from the thickness of the conductive pad.

8. The electronic package as described in claim 1, wherein, The thickness of the second coating layer is different from the thickness of the conductive bump.

9. The electronic package as described in claim 1, wherein, The thickness of the first coating layer and the second coating layer is less than the thickness of the conductive pad and the conductive bump, respectively.

10. The electronic package as described in claim 1, wherein, The conductive element covers the end of the conductive pad and the end of the conductive bump.

11. A method for manufacturing an electronic package, comprising: A carrier and an electronic component are provided. The carrier has opposing first and second surfaces, and a plurality of conductive pads and a first covering layer covering the plurality of conductive pads are formed on the first surface. The electronic component has opposing active and non-active surfaces, and a plurality of conductive bumps and a second covering layer covering the plurality of conductive bumps are formed on the active surface. The electronic component is electrically connected to the plurality of conductive pads of the carrier through the plurality of conductive bumps and the plurality of conductive components, such that the plurality of conductive components are sandwiched between the plurality of conductive pads and the plurality of conductive bumps. The first covering layer and the second covering layer are removed.

12. The method for manufacturing an electronic package as described in claim 11, wherein, The thickness of the first coating layer and the second coating layer is less than the thickness of the conductive pad and the conductive bump, respectively.

13. The method of manufacturing an electronic package as described in claim 11 further includes forming a plurality of conductive elements on a second surface of the carrier, so that the carrier is disposed on a substrate through the plurality of conductive elements.

14. The method for manufacturing an electronic package as described in claim 11, wherein, The method for manufacturing the carrier and the electronic component includes: forming a plurality of first conductive materials on the end face of the plurality of conductive pads that are exposed to the first covering layer on the carrier, and forming a plurality of second conductive materials on the end face of the plurality of conductive bumps that are exposed to the second covering layer on the electronic component.

15. The method of manufacturing an electronic package as described in claim 14 further includes placing the electronic component in connection with the plurality of conductive pads and the plurality of first conductive materials on the carrier through the plurality of conductive bumps and the plurality of second conductive materials, such that each of the first conductive materials and the corresponding second conductive materials are bonded together to form the conductive component.

16. The method for manufacturing an electronic package as described in claim 11, wherein, The carrier is an intermediary board or substrate, and includes a dielectric layer and a circuit layer bonded to the dielectric layer.

17. The method of manufacturing an electronic package as described in claim 16, wherein, The complex conductive pads are electrically connected to the circuit layer.

18. The method for manufacturing an electronic package as described in claim 11, wherein, The conductive component includes a flat portion and an arc portion, and the size of the flat portion is proportional to the size of the conductive bump.

19. The method for manufacturing an electronic package as described in claim 11, wherein, The thickness of the first coating layer is different from the thickness of the conductive pad.

20. A method for manufacturing an electronic package as described in claim 11, wherein, The thickness of the second coating layer is different from the thickness of the conductive bump.

21. The method for manufacturing an electronic package as described in claim 11, wherein, The ends of the plurality of conductive pads and the ends of the plurality of conductive bumps protrude outward from the first covering layer and the second covering layer, respectively.

22. The method for manufacturing an electronic package as described in claim 11, wherein, The conductive element covers the end of the conductive pad and the end of the conductive bump.

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