Semiconductor structure and method for forming the same

Abstract

This disclosure provides a semiconductor structure and a method for forming the same. The semiconductor structure includes a substrate, a first insulating layer, a shielding electrode, a gate electrode, and an isolation pattern. The substrate includes a trench extending from a surface of the substrate into the substrate. The first insulating layer is disposed on the bottom surface and sidewalls of the trench. The shielding electrode is disposed on the first insulating layer in the trench. The gate electrode has a first conductivity type, is disposed above the shielding electrode in the trench, and is electrically isolated from the shielding electrode. An isolation pattern is disposed between the shielding electrode and the gate electrode, and the gate electrode and the shielding electrode are spaced apart by the isolation pattern. The shielding electrode includes a first shielding pattern having a first conductivity type and a second shielding pattern having a second conductivity type different from the first conductivity type, and the second shielding pattern is between the first shielding pattern and the gate electrode.

Claims

1. A semiconductor structure, comprising: The substrate includes a trench extending from the surface of the substrate into the substrate; A first insulating layer is disposed on the bottom surface and sidewalls of the ditch; a shielding electrode is disposed on the first insulating layer in the ditch; a gate electrode having a first conductivity type is disposed above the shielding electrode in the ditch and electrically isolated from the shielding electrode; and an isolation pattern is disposed between the shielding electrode and the gate electrode, and the gate electrode and the shielding electrode are spaced apart by the isolation pattern, wherein the shielding electrode includes a first shielding pattern having the first conductivity type and a second shielding pattern having a second conductivity type different from the first conductivity type, and the second shielding pattern is between the first shielding pattern and the gate electrode.

2. The semiconductor structure of claim 1, wherein the first masking pattern includes a top surface, a bottom surface, and opposing side surfaces connecting the top surface and the bottom surface, wherein the top surface and the bottom surface have symmetrical surface profiles.

3. The semiconductor structure as claimed in claim 2, wherein the curved profile of the bottom surface corresponds to the profile of the bottom surface of the trench.

4. The semiconductor structure as claimed in claim 2, wherein the first insulating layer comprises: The lower layer pattern surrounds the first masking pattern; And an upper pattern surrounding the second masking pattern, wherein the upper pattern has a portion with a thickness less than that of the lower pattern.

5. The semiconductor structure of claim 4, wherein the second masking pattern has a portion with a width greater than the horizontal distance between the opposite side surfaces of the first masking pattern.

6. The semiconductor structure of claim 1, wherein the second masking pattern includes a top surface, a bottom surface, and opposing side surfaces connecting the top surface and the bottom surface, wherein the top surface and the bottom surface have asymmetrical profiles.

7. The semiconductor structure as described in claim 1, further comprising: A device isolation structure is disposed in the substrate and defines an active region in the substrate, including a first insulating layer, a shielding electrode, a gate electrode, and a gate structure of the isolation pattern disposed in the active region, and the device isolation structure includes a first pattern having a first conductivity type and a second pattern having a second conductivity type on the first pattern.

8. The semiconductor structure of claim 7, wherein the maximum width of the second pattern in the horizontal direction is greater than the maximum width of the first pattern in the horizontal direction.

9. A method for forming a semiconductor structure, comprising: A substrate is provided, wherein the substrate includes a trench extending from a surface of the substrate into the substrate; A first insulating material layer is formed on the bottom surface and sidewalls of the trench; a first shielding layer is formed in the trench on the first insulating material layer, the first shielding layer containing a first dopant having a first conductivity type; The first insulating material layer exposed in the trench and by the first shielding layer is laterally removed to form a first insulating layer; a second shielding material layer is formed in the trench on the first shielding layer and the first insulating layer; and the second shielding material layer is doped to form a second shielding layer, wherein the second shielding layer contains a second dopant having a second conductivity type different from the first conductivity type, and the first dopant of the first shielding layer diffuses into the second shielding material layer during the doping process to form a first shielding pattern.

10. The method of claim 9, wherein the first shielding layer is a polycrystalline silicon layer doped with the first dopant of the first conductivity type, and the second shielding material layer is an undoped polycrystalline silicon layer prior to the doping process.

Images