Semiconductor device
Patent Information
- Application Number
- TW114134636
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-09-10
- Publication Date
- 2026-10-11
- Estimated Expiration
- 2045-09-09
Smart Images

Figure TWG2TB001915654_001 
Figure TWG2TB001915654_002 
Figure TWG2TB001915654_003
Abstract
Claims
1. A semiconductor device, characterized in that it comprises: a substrate including a first contact pad region; a plurality of first contact pads disposed within the first contact pad region, wherein the first contact pads include a first density; and a plurality of dummy contact pads surrounding the first contact pad region on at least three sides, wherein the dummy contact pads include a second density.
2. The semiconductor element as described in claim 1 further comprises: a second contact pad region disposed adjacent to the first contact pad region; and a plurality of second contact pads disposed within the second contact pad region, wherein the second contact pads comprise a third density.
3. The semiconductor element as described in claim 2, wherein the dummy contact pads are disposed between the first contact pads and the second contact pads.
4. The semiconductor element as described in claim 2, wherein the third density is less than the first density.
5. The semiconductor element as described in claim 2, wherein the third density is greater than the second density.
6. The semiconductor element as described in claim 1, wherein the second density is less than the first density.
7. The semiconductor element as described in claim 1, wherein the first contact pads comprise hybrid bonding.
8. The semiconductor element as described in claim 1, wherein the dummy contact pads comprise hybrid bonding.
9. A semiconductor device, characterized in that it comprises: a substrate including a first contact pad region; a first dummy contact pad region surrounding the first contact pad region; a plurality of first dummy contact pads disposed within the first dummy contact pad region, wherein the first dummy contact pads include a first density; a second dummy contact pad region disposed adjacent to the first dummy contact pad region; and a plurality of second dummy contact pads disposed within the second dummy contact pad region, wherein the second dummy contact pads include a second density.
10. The semiconductor element as described in claim 9 further comprises: a third dummy contact pad region disposed next to the second dummy contact pad region; and a plurality of third dummy contact pads disposed within the third dummy contact pad region, wherein the third dummy contact pads comprise a third density.
11. The semiconductor element as described in claim 10, wherein the third density is less than the second density.
12. The semiconductor element as described in claim 9, wherein the second density is less than the first density.
13. The semiconductor element as described in claim 9, wherein each of the first dummy contact pads comprises a square.
14. The semiconductor element as described in claim 9, wherein each of the first dummy contact pads comprises an octagon.
15. The semiconductor element as described in claim 9, wherein the first dummy contact pads include a rhombus surrounding the first contact pad region.
Citation Information
Patent Citations
Semiconductor device and contact pad layout, contact pad structure and mask plate combination thereof
CN111640733A
