Multi-voltage output stage and associated power switch cell

Abstract

This invention relates to a multi-voltage output stage, comprising a power switching element and an output element. The power switching element receives an intermediate voltage, a core voltage, a ground voltage, and a mode signal set. Based on the mode signal set, the power switching element provides one of the intermediate voltage, core voltage, and ground voltage as a first reference voltage, and provides the intermediate voltage as a second reference voltage. The output element receives the first reference voltage, the second reference voltage, the main voltage, and the ground voltage. The output element receives internal signals and generates an output signal on its output pad. Based on the mode signal set, the main voltage received by the output element has different voltage values.

Claims

1. A multi-voltage output stage, comprising: A power switching element receives an intermediate voltage, a core voltage, a ground voltage, and a mode signal group; wherein the ground voltage is less than the core voltage, and the core voltage is less than the intermediate voltage; wherein, according to the mode signal group, the power switching element provides one of the intermediate voltage, the core voltage, and the ground voltage as a first reference voltage, and provides the intermediate voltage as a second reference voltage; and an output element receives a main voltage and the ground voltage, the output element comprising: a control circuit that receives the first reference voltage, the second reference voltage, and an internal signal, and generates a first control signal, a first bias signal, a second bias signal, and a second control signal; and a first transistor, wherein a first drain / source terminal of the first transistor receives the main voltage, and a gate terminal of the first transistor receives the first control signal; A second transistor, wherein a first drain / source terminal of the second transistor is connected to a second drain / source terminal of the first transistor, a gate terminal of the second transistor receives the first bias signal, a second drain / source terminal of the second transistor is connected to an output pad, and the voltage of the output pad serves as an output signal; a third transistor, wherein a first drain / source terminal of the third transistor is connected to the output pad, a gate terminal of the third transistor receives the second bias signal; and a fourth transistor, wherein a first drain / source terminal of the fourth transistor is connected to a second drain / source terminal of the third transistor, a gate terminal of the fourth transistor receives the second control signal, and a second drain / source terminal of the fourth transistor receives the ground voltage; wherein, according to the internal signal, the output element generates the output signal; and, according to the mode signal group, the main voltage received by the output element has different voltage values; The mode signal group determines a first voltage mode, a second voltage mode, or a third voltage mode; in the first voltage mode, the main voltage is a first voltage; in the second voltage mode, the main voltage is a second voltage; in the third voltage mode, the main voltage is a third voltage; and the first voltage is greater than the second voltage, and the second voltage is greater than the third voltage.

2. The multi-voltage output stage as claimed in claim 1, wherein in the first voltage mode, a logic high level of the output signal is the first voltage; in the second voltage mode, the logic high level of the output signal is the second voltage; and in the third voltage mode, the logic high level of the output signal is the third voltage.

3. The multi-voltage output stage as described in claim 1, wherein the intermediate voltage is less than or equal to the primary voltage.

4. The multi-voltage output stage as claimed in claim 1, wherein in the first voltage mode, the first reference voltage is the intermediate voltage and the second reference voltage is the intermediate voltage; in the second voltage mode, the first reference voltage is the core voltage and the second reference voltage is the intermediate voltage; and in the third voltage mode, the first reference voltage is the ground voltage and the second reference voltage is the intermediate voltage.

5. The multi-voltage output stage as claimed in claim 4, wherein the power switching element comprises: A fifth transistor, wherein a first drain / source terminal of the fifth transistor receives the intermediate voltage, a gate terminal of the fifth transistor receives a first mode signal, and a second drain / source terminal of the fifth transistor is connected to a first node; A sixth transistor, wherein a first drain / source terminal of the sixth transistor receives the core voltage, a gate terminal of the sixth transistor receives a second mode signal, and a second drain / source terminal of the sixth transistor is connected to the first node; a seventh transistor, wherein a first drain / source terminal of the seventh transistor is connected to the first node, a gate terminal of the seventh transistor receives a third mode signal, and a second drain / source terminal of the seventh transistor receives the ground voltage; wherein a voltage of the first node is the first reference voltage; an intermediate voltage is the second reference voltage; and the first module signal, the second module signal, and the third module signal constitute the mode signal group.

6. The multi-voltage output stage as claimed in claim 5, wherein in the first voltage mode, the fifth transistor is on, the sixth transistor is off, the seventh transistor is off, and the first reference voltage is the intermediate voltage; in the second voltage mode, the fifth transistor is off, the sixth transistor is on, the seventh transistor is off, and the first reference voltage is the core voltage; and in the third voltage mode, the fifth transistor is off, the sixth transistor is off, the seventh transistor is on, and the first reference voltage is the ground voltage.

7. The multi-voltage output stage as claimed in claim 6, wherein the control circuitry includes: A first transformer, wherein a first power supply terminal of the first transformer receives the main voltage, a second power supply terminal of the first transformer receives the first reference voltage, an input terminal of the first transformer receives the internal signal, and an output terminal of the first transformer generates the first control signal; a first bias controller, wherein an input terminal of the first bias controller receives the first reference voltage, and an output terminal of the first bias controller generates the first bias signal; a second bias controller, wherein an input terminal of the second bias controller receives the second reference voltage, and an output terminal of the second bias controller generates the second bias signal; and a second transformer, wherein a first power supply terminal of the second transformer receives the second reference voltage, a second power supply terminal of the second transformer receives the ground voltage, an input terminal of the second transformer receives the internal signal, and an output terminal of the second transformer generates the second control signal.

8. The multi-voltage output stage as claimed in claim 7, wherein the first bias controller is a first short-circuit element and the first bias signal is the first reference voltage; and the second bias controller is a second short-circuit element and the second bias signal is the second reference voltage.

9. The multi-voltage output stage as claimed in claim 7, wherein the first bias controller and the second bias controller are connected to the output pad to receive the output signal.

10. The multi-voltage output stage as claimed in claim 9, wherein during a transient period of the output signal logic level switching, the first bias controller selects the output signal as the first bias signal, and the second bias controller selects the output signal as the second bias signal; and during a steady-state period following the transient period, the first bias controller selects the first reference voltage as the first bias signal, and the second bias controller selects the second reference voltage as the second bias signal.

11. The multi-voltage output stage as claimed in claim 9, wherein during a transient period in which the output signal switches from a logic high level to a logic low level, the first bias controller selects the output signal as the first bias signal, and the second bias controller selects the second reference voltage as the second bias signal; and during a steady-state period following the transient period, the first bias controller selects the first reference voltage as the first bias signal, and the second bias controller selects the second reference voltage as the second bias signal.

12. The multi-voltage output stage as claimed in claim 9, wherein during a transient period in which the output signal switches from a logic low level to a logic high level, the first bias controller selects the first reference voltage as the first bias signal, and the second bias controller selects the output signal as the second bias signal; and during a steady-state period following the transient period, the first bias controller selects the first reference voltage as the first bias signal, and the second bias controller selects the second reference voltage as the second bias signal.

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