Electro-optic modulators and imaging systems

Abstract

This invention discloses an electro-optic modulator, which is a liquid crystal-based electro-optic modulator. This liquid crystal-based electro-optic modulator is manufactured using surface microelectromechanical systems (MEMS) technology. This electro-optic modulator is used for inspecting flat panel displays or similar devices. Utilizing surface MEMS technology allows for a significantly thinner electro-optic modulator and enables the use of pure liquid crystal without the need for a thick sealing plate.

Description

Method for fabricating liquid crystal based electro-optical modulators for flat panel display inspection using surface MEMS technology The present invention relates generally to electro-optics and, more particularly, to liquid crystal materials for use in electro-optical applications. Electro-optic modulators (EOMs) that use liquid crystals (specifically, Nematic Curved Aligned Phase (NCAP) films or Polymer Dispersed Liquid Crystal (PDLC) films) for modulation are used to test the conductivity of thin film transistors and interconnects in flat panel displays (FPDs) during manufacturing. EOMs are mechanically fabricated from glue, Mylar, and other materials. TM Mechanical manufacturing of thick stack sub-assemblies of NCAP film, protective film dielectric reflector and hard coating. Electro-optical modulators are subject to a high degree of variability and performance trade-off, resulting in increased noise, reduced dynamic range, and decreased sensitivity. For example, an NCAP film with a thickness of 12 or 25 microns will have a 20% thickness variation. Therefore, it would be advantageous to provide a device, system, and method that addresses one of these drawbacks. According to one or more embodiments of the present invention, an electro-optical modulator is described. The electro-optical modulator includes a glass substrate. The electro-optical modulator includes a transparent electrode disposed on the glass substrate. The electro-optical modulator includes a first alignment layer disposed on the transparent electrode. The electro-optical modulator includes a liquid crystal layer disposed on the first alignment layer. The electro-optical modulator includes a second alignment layer disposed on the liquid crystal layer. The electro-optical modulator includes a polymer layer disposed on the second alignment layer. The electro-optical modulator includes a plurality of polymer pillars. The plurality of polymer pillars extend through at least a portion of the liquid crystal layer. The plurality of polymer pillars mechanically support the polymer layer. The electro-optical modulator includes a dielectric reflector disposed on the polymer layer. The electro-optical modulator includes a hard coating disposed on the dielectric reflector. In some embodiments, the liquid crystal layer comprises a thickness between 2 micrometers and 5 micrometers. In some embodiments, the liquid crystal layer is not a nematic phase or a polymer dispersed liquid crystal. In some embodiments, the plurality of polymer pillars extend from the polymer layer through at least the portion of the second alignment layer and the liquid crystal layer. In some embodiments, the electro-optical modulator includes a plurality of alignment posts. The plurality of alignment posts extend from the second alignment layer to the first alignment layer. The plurality of polymer posts extend through at least the portion of the liquid crystal layer to the alignment posts. The plurality of polymer posts are disposed on the plurality of alignment posts. In some embodiments, the electro-optical modulator includes an anti-reflection coating, and the glass substrate is disposed on the anti-reflection coating. In some embodiments, the plurality of polymer pillars extend from the second alignment layer through the liquid crystal layer to the first alignment layer, and the plurality of polymer pillars are separated from the polymer layer by the second alignment layer. In some embodiments, the plurality of polymer pillars each comprise a width less than 1.4 microns and a thickness between 2 microns and 5 microns. In some embodiments, the plurality of polymer pillars each comprise a side wall angle between 83° and 93°. In some embodiments, the transparent electrode includes at least one of indium tin oxide (ITO) or silver nanowires. In some embodiments, the first alignment layer and the second alignment layer each include at least one of silicon oxynitride or silicon dioxide. In some embodiments, the first alignment layer and the second alignment layer each comprise a refractive index between 1.51 and 1.55. In some embodiments, the polymer layer and the plurality of polymer pillars each include a cross-linked polymer. In some embodiments, the dielectric mirror has a reflectivity greater than 80% for light having a wavelength between 570 nm and 670 nm. In some embodiments, the dielectric mirror is a stack of repeating layers of silicon nitride and silicon dioxide. In some embodiments, the dielectric mirror is a stack of repeating layers of zirconium oxide and silicon dioxide. In some embodiments, the electro-optical modulator includes an epoxy resin sealant that seals the liquid crystal layer between the first alignment layer and the second alignment layer. According to one or more embodiments of the present invention, an imaging system is described. The imaging system includes an illumination source configured to generate illumination. The imaging system includes a stage for a sample. The imaging system includes a detector for generating an image of at least a portion of the sample. The imaging system includes an electro-optical modulator disposed in a path of the illumination from the illumination source and separated from the sample by an air gap. The electro-optical modulator includes a glass substrate. The electro-optical modulator includes a transparent electrode disposed on the glass substrate. The electro-optical modulator includes a first alignment layer disposed on the transparent electrode. The electro-optical modulator includes a liquid crystal layer disposed on the first alignment layer. The electro-optical modulator includes a second alignment layer disposed on the liquid crystal layer. The electro-optical modulator includes a polymer layer disposed on the second alignment layer. The electro-optical modulator includes a plurality of polymer pillars. The plurality of polymer pillars extend through at least a portion of the liquid crystal layer. The plurality of polymer pillars mechanically support the polymer layer. The electro-optic modulator includes a dielectric reflector disposed on the polymer layer. The electro-optic modulator includes a hard coating disposed on the dielectric reflector. According to one or more embodiments of the present invention, an electro-optical modulator is described. The electro-optical modulator includes a glass substrate. The electro-optical modulator includes a transparent electrode disposed on the glass substrate. The electro-optical modulator includes a first alignment layer disposed on the transparent electrode. The electro-optical modulator includes a liquid crystal layer disposed on the first alignment layer. The electro-optical modulator includes a second alignment layer disposed on the liquid crystal layer. The electro-optical modulator includes a plurality of alignment posts. The plurality of alignment posts extend from the second alignment layer, through the liquid crystal layer, to the first alignment layer. The electro-optical modulator includes a dielectric reflector disposed on the second alignment layer. The electro-optical modulator includes a plurality of dielectric pillars. The plurality of dielectric pillars extend from the dielectric reflector, through a first portion of the liquid crystal layer, to the plurality of alignment posts. The plurality of dielectric pillars are disposed on the plurality of alignment posts. The electro-optical modulator includes a polymer layer disposed on the dielectric reflector. The electro-optical modulator includes a plurality of polymer pillars. The plurality of polymer pillars extend from the polymer layer through the dielectric reflector, the second alignment layer and a second portion of the liquid crystal layer to the plurality of dielectric pillars. The plurality of polymer pillars are disposed on the plurality of dielectric pillars. In some embodiments, the liquid crystal layer comprises a thickness between 2 micrometers and 5 micrometers. In some embodiments, the liquid crystal layer is not a nematic phase or a polymer dispersed liquid crystal. CROSS-REFERENCE TO RELATED APPLICATIONS This application claims the benefit under 35 USC § 119(e) of U.S. Provisional Application No. 63 / 406,712, filed on September 14, 2022, entitled “METHOD FOR FABRICATING A LIQUID-CRYSTAL-BASED ELECTRO-OPTICAL LIGHT MODULATOR USING SURFACE MEMS TECHNIQUES FOR INSPECTION FLAT PANEL DISPLAYS,” the entirety of which is incorporated herein by reference. The present invention has been particularly shown and described with respect to specific embodiments and specific features thereof. The embodiments described herein are to be considered as illustrative rather than restrictive. It will be readily apparent to those skilled in the art that various changes and modifications in form and detail may be made without departing from the spirit and scope of the present invention. Reference will now be made in detail to the disclosed subject matter illustrated in the accompanying drawings. Embodiments of the present invention are generally directed to electro-optic modulators, methods for manufacturing electro-optic modulators, and imaging systems using electro-optic modulators. The electro-optic modulators are liquid crystal-based. These electro-optic modulators are manufactured using surface microelectromechanical systems (MEMS) technology. Electro-optic modulators are used to inspect flat-panel displays and the like. Using surface MEMS technology significantly thins the electro-optic modulators and allows the use of pure liquid crystal, eliminating the need for thick sealing plates. The following are incorporated herein by reference in their entirety: U.S. Patent No. 5,432,461, entitled “Method of testing active matrix liquid crystal display substrates”; U.S. Patent No. 7,817,333, entitled “Modulator with improved sensitivity and life time,” filed on February 6, 2007; U.S. Patent No. 8,801,964, entitled “Encapsulated polymer network liquid crystal material, device and applications,” filed on December 22, 2010; U.S. Patent No. 7,639,319, entitled “Polymer dispersed liquid crystal formulations for modulator fabrication,” filed on April 7, 2005; and U.S. Patent No. 6,151,153, entitled “Modulator transfer process and assembly.” Referring now to FIG. 1A and FIG. 1B , an electro-optic (EO) modulator 100 according to one or more embodiments of the present invention is described. EO modulator 100 may also be referred to as an EO modulator, a liquid crystal-based EO modulator, and the like. EO modulator 100 is a flat panel display (FPD) spatial light modulator (SLM). EO modulator 100 is a narrow bandgap device having two dielectric layers separated by polymer pillars and an integrated dielectric mirror. The electro-optic modulator 100 may include one or more films, layers, or coatings. One or more film layers selectively allow light to pass through. For example, the electro-optic modulator 100 may include one or more layers such as, but not limited to, an anti-reflective coating 102, a glass substrate 104, a transparent electrode 106, an alignment layer 108, a liquid crystal layer 110, alignment posts 112, polymer posts 114, an epoxy seal 115, an alignment layer 116, a polymer layer 118, a dielectric mirror 120, a hard coating 122, and the like. In some embodiments, the electro-optic modulator 100 includes an anti-reflection coating 102. The anti-reflection coating 102 may also be referred to as a dielectric anti-reflection layer stack. In some embodiments, the electro-optic modulator 100 includes a glass substrate 104 . The glass substrate 104 may include BK-7 glass or the like. The glass substrate 104 is disposed on the anti-reflection coating 102 . In some embodiments, the electro-optical modulator 100 includes a transparent electrode 106. The transparent electrode 106 may refer to a transparent conductive layer. The transparent electrode 106 is disposed on the glass substrate 104. The transparent electrode 106 may include any conductive coating that is transparent to the wavelength of interest. For example, the transparent electrode 106 may include a material such as, but not limited to, indium tin oxide (ITO), silver nanowires, conductive polythiophene, or carbon nanotubes. The material may be applied to the glass substrate via sputtering and masking techniques, or the like. The transparent electrode 106 may have a thickness. For example, the transparent electrode 106 may have a thickness between 1600 Å and 1700 Å. In some embodiments, the transparent electrode 106 may have a thickness between 1600 Å and 1700 Å and a variation of less than 1.8% across the transparent electrode 106. The transparent electrode 106 may capacitively couple with a sample to induce a local voltage and, similarly, an electric field. The local voltage may generate an electric field. In some embodiments, the electro-optic modulator 100 includes an alignment layer 108. The alignment layer 108 is disposed on the transparent electrode 106. The alignment layer 108 is a dielectric. The alignment layer 108 is disposed between the liquid crystal layer 110 and the transparent electrode 106. By being a dielectric and disposed between the liquid crystal layer 110 and the transparent electrode 106, the alignment layer 108 insulates the liquid crystal layer 110 from the transparent electrode 106. The alignment layer 108 includes a refractive index (n). For example, the alignment layer 108 may include a refractive index between 1.51 and 1.55. The alignment layer 108 may include any material that is a dielectric and includes a desired refractive index. In some embodiments, the alignment layer 108 is silicon oxynitride (SiOxNy). In some embodiments, the alignment layer 108 is silicon dioxide (SiO 2) The alignment layer 108 has a thickness. For example, the alignment layer 108 may have a thickness between 230 Å and 270 Å. An alignment layer generally refers to a layer that helps align the liquid crystal layer 110. An alignment layer may also be referred to as a photoresponsive layer, as the alignment layer is formed from a photoresponsive material. The photoresponsive material can be photopatterned to create an alignment layer for the liquid crystal material. In some embodiments, the alignment layer 108 is etched. The alignment layer 108 is etched with one or more grooves (not depicted). Grooves may also be referred to as continuous nanochannels, lines, or the like. Grooves can be fabricated by etching, plasma ashing, and stripping. In some embodiments, the grooves are etched to a depth. For example, the grooves may be etched to a depth of 200 Å. In some embodiments, the grooves define a checkerboard pattern in the alignment layer 108. The alignment layer 108 includes a line spacing (LS). The line spacing is the distance between the grooves. In some embodiments, the line spacing may be 350 nm or less. In some embodiments, the line spacing may be 120 nm or less. In some embodiments, the line spacing may be 110 nm or less. Although the electro-optical modulator 100 is described as including the alignment layer 108, this is not intended to be a limitation of the present invention. It is contemplated that the transparent electrode 106 may be etched with one or more grooves. In some embodiments, electro-optic modulator 100 includes a liquid crystal layer 110. Liquid crystal layer 110 is disposed on alignment layer 108. In some embodiments, liquid crystal layer 110 is inserted between alignment layer 108 and alignment layer 116 by vacuum or by capillary action. In some embodiments, liquid crystal layer 110 is discontinuous. Alignment pillars 112 and polymer pillars 114 extend through liquid crystal layer 110. Liquid crystal layer 110 can sense an electric field. When an electric field is applied across the liquid crystals, the optical properties of liquid crystal layer 110 change. The intensity of light transmitted through liquid crystal layer 110 is modulated by variations in the strength of the electric field across liquid crystal layer 110. Light transmitted through liquid crystal layer 110 can vary depending on the magnitude of the electric field applied to liquid crystal layer 110. The electric field causes liquid crystal layer 110 to align along the direction of the electric field. In some embodiments, liquid crystal layer 110 is a pure liquid crystal. A pure liquid crystal is a nematic liquid crystal. Liquid crystal layer 110 aligns planarly in the absence of an electric field. Liquid crystal layer 110 aligns planarly in the absence of an electric field due to alignment layer 108 and alignment layer 116. Liquid crystal layer 110 is not a polymer / liquid crystal composite layer. For example, liquid crystal layer 110 is not a nematically aligned phase (NCAP) or a polymer dispersed liquid crystal (PDLC). In this sense, the liquid crystals in liquid crystal layer 110 are not encapsulated as droplets in a polymer. Liquid crystal layer 110 has a thickness. For example, liquid crystal layer 110 has a thickness between 2 microns (μm) and 5 μm. Liquid crystal layer 110 is significantly thinner than a polymer / liquid crystal composite NCAP or PDLC material. Modulator sensitivity and defect detectability should be significantly enhanced by utilizing pure liquid crystal rather than NCAP or PDLC. Therefore, electro-optical modulator 100 provides higher sensitivity and throughput for defect detection during flat panel display manufacturing. In some embodiments, the electro-optical modulator 100 includes alignment posts 112. The alignment posts 112 are disposed above or below the alignment layer 108. The alignment posts 112 separate the polymer posts 114 from the liquid crystal layer 110. In some embodiments, the alignment posts 112 are used in a form to form the polymer posts 114. The alignment posts 112 extend from the alignment layer 108 to the alignment layer 116. The alignment posts 112 may have a thickness. For example, the alignment posts 112 may have a thickness of 0.3 μm ± 0.012 μm. The alignment posts 112 define one or more openings between the alignment posts 112. The liquid crystal layer 110 is added to the electro-optical modulator 100 through the openings. In some embodiments, the openings are sealed with glue. For example, the openings may be sealed with UV-curable glue, epoxy, or the like. In some embodiments, the electro-optic modulator 100 includes a polymer pillar 114. The polymer pillar 114 may comprise a corrosion-resistant material. The polymer pillar 114 is made of a cross-linkable photoresponsive polymer. For example, the polymer pillar 114 may comprise, but is not limited to, polyimide (PI). Polymer pillars 114 mechanically support polymer layer 118. For example, polymer pillars 114 transfer the weight of polymer layer 118 into alignment layer 108. In some embodiments, polymer pillars 114 transfer the weight of polymer layer 118 into alignment layer 108 via alignment pillars 112. Polymer pillars 114 extend through at least a portion of liquid crystal layer 110. In some embodiments, polymer pillars 114 extend from polymer layer 118. Polymer pillars 114 extend from polymer layer 118 through alignment layer 116 and at least a portion of liquid crystal layer 110. In some embodiments, polymer pillars 114 extend through at least a portion of liquid crystal layer 110 to alignment pillars 112. In some embodiments, polymer pillars 114 are disposed on alignment pillars 112. The polymer pillars 114 may include a width. The width of the polymer pillars 114 may be based on the width of the support structure 211 minus twice the thickness of the alignment pillars 112 (e.g., for both sides of the polymer pillars 114). The polymer pillars 114 include a width less than 1.4 μm. In some embodiments, the polymer pillars 114 include a width between 0.776 μm and 0.824 μm. The electro-optic modulator 100 includes a pitch between the polymer pillars 114. The pitch defines the distance between the center of one of the pillars 114 to the center of an adjacent pillar 114. In some embodiments, the electro-optic modulator 100 includes a pitch between the polymer pillars 114 between 10 μm and 20 μm. In some embodiments, the polymer pillars 114 include a thickness. For example, the polymer pillars 114 may include a thickness between 2 μm and 5 μm. In some embodiments, the polymer pillars 114 include a sidewall angle. The sidewall angle of the polymer pillars 114 may be between 83° and 93°. A sidewall angle of 90° is normal to the alignment layer 108. The polymer pillars 114 may be considered to include a concave profile and / or utilize a breadcrumb-like buildup. In some embodiments, the electro-optical modulator 100 includes an epoxy seal 115. The epoxy seal 115 may also be referred to as a glue seal. The epoxy seal 115 seals the liquid crystal layer 110 between the alignment layer 108 and the alignment layer 116. The epoxy seal 115 is disposed around the edges of the liquid crystal layer 110. The epoxy seal 115 seals the liquid crystal layer 110 to prevent the liquid crystal material from escaping. The epoxy seal 115 is disposed in the openings defined between the polymer pillars 114. In some embodiments, the electro-optic modulator 100 includes an alignment layer 116. The alignment layer 116 is disposed above or below the liquid crystal layer 110. The alignment layer 116 is a dielectric. The alignment layer 116 has a refractive index (n). For example, the alignment layer 116 may have a refractive index between 1.51 and 1.55. The alignment layer 116 may comprise any material that is a dielectric and has a desired refractive index. In some embodiments, the alignment layer 116 is silicon oxynitride (SiOxNy). In some embodiments, the alignment layer 116 is silicon dioxide (SiO 2) The alignment layer 116 has a thickness. For example, the alignment layer 116 may have a thickness between 2880 Å and 3120 Å. For another example, the alignment layer 116 may have a thickness between 285 Å and 315 Å. In some embodiments, the electro-optical modulator 100 includes a polymer layer 118. The polymer layer 118 may also be referred to as a polymer layer, a polymer film, or the like. The polymer layer 118 is disposed on the alignment layer 116. The alignment layer 108 and the alignment layer 116 are between the polymer layer 118 and the glass substrate 104. The polymer layer 118 may comprise a corrosion-resistant material. The polymer layer 118 is made of a cross-linkable photoresponsive polymer. For example, the polymer layer 118 may comprise, but is not limited to, polyimide (PI). Polyimide is highly cross-linked to survive a corrosive environment. The polymer layer 118 has a thickness. For example, the polymer layer 118 has a thickness between 4 μm and 6 μm. Therefore, the polymer layer 118 and the polymer pillars 114 each comprise a cross-linked polymer, such as polyimide. In some embodiments, the electro-optical modulator 100 includes a dielectric mirror 120. The dielectric mirror 120 may also be referred to as a film dielectric mirror, a quarter-wavelength mirror, or the like. The dielectric mirror 120 is disposed or coated on the polymer layer 118. In some embodiments, the dielectric mirror 120 is attached to the polymer layer 118 via a carbonyl bond. The dielectric mirror 120 has a reflectivity for light having a desired wavelength. For example, the dielectric mirror 120 has a reflectivity greater than 80% for light having a wavelength between 570 nm and 670 nm. The dielectric mirror 120 may have a thickness. For example, the dielectric mirror 120 may have a thickness of approximately 1 μm. For example, the dielectric mirror 120 may have a thickness between 0.9 μm and 1.1 μm. The dielectric mirror is a multilayer dielectric mirror. The multilayer dielectric mirror comprises a first material and a second material. The dielectric mirror 120 may start with a first material layer and end with a second material layer. In this regard, the dielectric mirror 120 may be coated as follows: a first material layer, a second material layer, ..., a first material layer. The dielectric mirror 120 may include any number of first material layers and second material layers. For example, the dielectric mirror 120 may include 6 first material layers and 5 second material layers, for a total of 11 layers. The first material layer and the second material layer each include a thickness. The thickness depends on the refractive index of the dielectric mirror 120. In some embodiments, the first material layer has a thickness of 790 Å + / - 10%. In some embodiments, the second material layer has a thickness of 1070 Å + / - 10%. The first material and the second material may include any suitable material. For example, the dielectric mirror may be silicon nitride (SiN x ) / Silicon dioxide (SiO 2) Multilayer dielectric mirror. Silicon nitride can be the first material and silicon dioxide can be the second material. For another example, the dielectric mirror 120 can be zirconium dioxide (ZrO 2) / Silicon dioxide (SiO 2) Multilayer dielectric mirror. Zirconium dioxide can be the first material and silicon dioxide can be the second material. For another example, the dielectric mirror 120 can be hafnium oxide (HfO 2) and the second material may be silicon oxide. In some embodiments, the first material may be any element from Group 4B of the periodic table. In some embodiments, the dielectric mirror 120 includes an overcoat. The overcoat may be disposed adjacent to the polymer layer 118. In some embodiments, the electro-optical modulator 100 includes a hard coating 122. The hard coating 122 is disposed on the dielectric reflector 120. The hard coating 122 protects the dielectric reflector 120. The hard coating 122 is a photodefinable hard coating. In some embodiments, the hard coating 122 comprises an organic hard coating. The hard coating 122 may include a hard coating composition described in U.S. Patent No. 7,099,067. The hard coating 122 has a thickness. For example, the hard coating 122 has a thickness between 2.37 μm and 5 μm. The hard coating 122 has a hardness. In some embodiments, the hard coating 122 has a hardness exceeding 5H pencil hardness. The hard coating 122 may include a primary hard coating and a thinner lubricant layer. Referring now to Figures 2A through 2N , a method 200 according to one or more embodiments of the present invention is described. A method may also refer to a process for fabricating an electro-optical modulator. The embodiments and enabling techniques previously described herein within the context of electro-optical modulator 100 should be interpreted as extending to the method. However, it should be further noted that the method is not limited to the electro-optical modulator architecture. Method 200 is a single-piece fabrication technique in which silicon (Si) or silicon germanium (SiGe) is used as a sacrificial layer and a release layer on a glass substrate. In step 202 , a glass substrate 104 is provided. The glass substrate 104 is disposed on the anti-reflective coating 102 . In step 204 , a transparent electrode 106 is deposited on the glass substrate 104 by sputtering deposition. In step 206, an alignment layer 108 is deposited on the transparent electrode 106. The alignment layer 108 is deposited on the transparent electrode 106 by chemical vapor deposition (CVD). For example, the alignment layer 108 is deposited on the transparent electrode 106 by plasma enhanced chemical vapor deposition (PECVD). The step may also include patterning one or more trenches in the alignment layer 108. The one or more trenches are patterned by etching, plasma ashing, and stripping. For example, the one or more trenches may be patterned by a 248 nm phase shift mask (PSM), 193 nm photolithography, or the like. In step 208, a sacrificial layer 209 is deposited. The sacrificial layer 209 includes a sacrificial layer 209a deposited on the alignment layer 108. The sacrificial layer 209 includes a sacrificial layer 209b deposited below the anti-reflective coating 102. The sacrificial layer 209 is deposited by CVD. For example, the sacrificial layer 209 is deposited by PECVD, low-pressure chemical vapor deposition (LPCVD), atmospheric pressure chemical vapor deposition (APCVD), or the like. The sacrificial layer 209 may include amorphous silicon (a-Si), polycrystalline silicon (poly-Si), polycrystalline silicon germanium (poly-SiGe), or the like. In some embodiments, the sacrificial layer 209a on the alignment layer 108 is a-Si deposited by PECVD. In some embodiments, the sacrificial layer 209b below the anti-reflective coating 102 is poly-Si or poly-SiGe deposited by LPCVD, PECVD, or APCVD. It is anticipated that depositing poly-Si and / or poly-SiGe by LPCVD may cause the glass substrate 104 to warp, making PECVD or APCVD desirable. This step may include patterning one or more trenches (not depicted) in a sacrificial layer 209a disposed on the alignment layer 108. The one or more trenches are patterned by etching, plasma ashing, and lift-off. For example, the one or more trenches may be patterned by 193 nm photolithography or the like. The one or more trenches may have a line spacing of 120 nm or less. The trenches form nanochannels in the a-Si. In a step 210, a support structure 211 is patterned in a sacrificial layer 209a disposed on the alignment layer 108. The support structure 211 is patterned by photolithography, plasma etching, and lift-off. Overetching from the sacrificial layer 209a into the alignment layer 108 may be allowed. The support structure 211 provides support when forming the alignment posts 112 and the polymer posts 114. The support structure 211 includes a pitch, a width, a height, and a sidewall angle. For example, the support structure 211 includes a pitch between adjacent support structures 211 of between 10 um and 20 um. As another example, the support structure 211 includes a width of 1.4 um. As another example, the support structure 211 includes a thickness of between 2 um and 5 um. As another example, the support structure 211 includes a sidewall angle of between 83° and 93°. In step 212, alignment posts 112 and alignment layer 116 are deposited on sacrificial layer 209a disposed on alignment layer 108. For example, alignment posts 112 are deposited in support structure 211. Alignment posts 112 and alignment layer 116 are deposited by chemical vapor deposition (CVD). For example, alignment posts 112 and alignment layer 116 are deposited by plasma-enhanced chemical vapor deposition (PECVD). Alignment posts 112 and alignment layer 116 may include a stress. For example, alignment posts 112 and alignment layer 116 may include a tensile stress between 50 MPa and 150 MPa. In a step 214, the polymer pillars 114 and the polymer layer 118 are spin-coated and cured. For example, the polymer pillars 114 are spin-coated into the support structure, onto the alignment pillars 112. As another example, the polymer layer 118 is spin-coated onto the alignment layer 116. The polymer pillars 114 and the polymer layer 118 can be cross-linked by exposure. A developer can also be applied to the polymer pillars 114 and the polymer layer 118. The developer can remove the uncross-linked portions of the polymer pillars 114 and the polymer layer 118. The polymer pillars 114 and the polymer layer 118 are cured at a temperature. The polymer pillars 114 and the polymer layer 118 are cured at an elevated temperature to reduce shrinkage of the polymer pillars 114. Shrinkage of the polymer pillars 114 is undesirable because shrinkage can cause the polymer pillars 114 to separate from the alignment pillars 112. In some embodiments, the polymer pillars 114 and the polymer layer 118 are cured at a temperature between 350°C and 400°C. In some embodiments, the polymer pillars 114 and polymer layer 118 are spin-coated as a liquid polyimide, which is then hardened during a curing process. In a step 216, a dielectric reflector 120 is deposited on the polymer layer 118. The dielectric reflector 120 is deposited on the polymer layer 118 by PECVD or sputtering deposition. In some embodiments, the dielectric reflector 120 is deposited by forming a SiN x and SiO 2 to deposit the dielectric mirror 120 on the polymer layer 118. In some embodiments, the dielectric mirror 120 is deposited on the polymer layer 118 by forming a ZrO 2 and SiO 2 is repeated to deposit the dielectric reflector 120 on the polymer layer 118. The dielectric reflector 120 may include a stress. For example, the dielectric reflector 120 may include a tensile stress between 50 MPa and 150 MPa. In some embodiments, the polymer layer 118 is formed of a CF 4 / O 2. Etching pre-treatment to form carbonyl bonds on the polymer layer 118 for improving the adhesion of the dielectric reflector 120 to the polymer layer 118. In step 218, an active region 219 is patterned from the electro-optical modulator 100. The active array 219 is patterned using photoresist (PR) stripping. PR stripping is compatible with the polymer layer 118. The active region 219 may also be referred to as a modulation definition. In some embodiments, the active region 219 is patterned based on a critical dimension (CD) of an array to be tested. The active region 219 is patterned through the dielectric reflector 120, polymer layer 118, alignment layer 116, sacrificial layer, and alignment layer 108. In some embodiments, the active region 219 is patterned all the way to the transparent electrode 106. In some embodiments, the active region 219 is patterned into the transparent electrode 106. For example, the active region 219 may be patterned into up to 500 Å of the transparent electrode 106. In a step 220, a hard coating 122 is deposited on the dielectric mirror 120. In some embodiments, the hard coating 122 is spin-coated and cured on the dielectric mirror 120. The hard coating 122 may be cured using a low temperature (LT) cure to prevent cracking of the dielectric mirror 120. In step 222, the sacrificial layer is removed. The sacrificial layer can be removed by gluing, sawing, debonding, backside etching, and releasing. In some embodiments, the polymer layer 118 is re-anchored at the edges to tension the polymer layer 118 with self-tensile stress. Once the sacrificial layer is removed, the electro-optic modulator 100 defines a cavity between the alignment layer 108 and the alignment layer 116. The electro-optic modulator 100 may also define one or more openings. The cavity is accessible through the one or more openings. The one or more openings are defined at the edges of the active region. In step 224, a liquid crystal layer 110 is added between alignment layer 108 and alignment layer 116. Liquid crystal layer 110 is added through one or more openings. In some embodiments, liquid crystal layer 110 is added by vacuum insertion or capillary action. For example, liquid crystal layer 110 can be added through a cavity by capillary action. Adding liquid crystal layer 110 through a cavity by capillary action differs from the lamination method used to manufacture NCAP modulators or PDLC modulators. The steps may further include sealing one or more openings with an epoxy seal 115. 3 , an electro-optical modulator 300 according to one or more embodiments of the present invention is described. The entire discussion of the electro-optical modulator 100 is incorporated herein by reference into the electro-optical modulator 300 . The electro-optic modulator 300 may include one or more films, layers, or coatings. One or more film layers selectively allow light to pass through. For example, the electro-optic modulator 300 may include one or more layers, such as, but not limited to, a glass substrate 104, a transparent electrode 106, an alignment layer 108, a liquid crystal layer 110, polymer pillars 114, an epoxy seal 115, an alignment layer 116, a polymer layer 118, a dielectric mirror 120, a hard coating 122, and the like. The entire discussion of the glass substrate 104, transparent electrode 106, alignment layer 108, liquid crystal layer 110, polymer pillars 114, epoxy seal 115, alignment layer 116, polymer layer 118, dielectric mirror 120, and hard coating 122 of the electro-optic modulator 100 is hereby incorporated by reference into the electro-optic modulator 300. The electro-optic modulator 300 differs from the electro-optic modulator 100 in that the electro-optic modulator 100 includes alignment posts 112, while the electro-optic modulator 300 does not include alignment posts 112. The electro-optic modulator 300 also differs from the electro-optic modulator 100 in that the polymer posts 114 of the electro-optic modulator 100 extend from the polymer layer 118 and are not separated from the polymer layer 118, while the polymer posts 114 of the electro-optic modulator 300 are separated from the polymer layer 118 by the alignment layer 116. In some embodiments, polymer pillars 114 extend from alignment layer 116. Polymer pillars 114 are separated from polymer layer 118 by alignment layer 116. Therefore, polymer pillars 114 may or may not extend from polymer layer 118. Polymer pillars 114 extend from alignment layer 116 to alignment layer 108. Polymer pillars 114 are disposed on alignment layer 108. Polymer pillars 114 mechanically support polymer layer 118 by transferring the weight of polymer layer 118 to alignment layer 108 through alignment layer 116 and polymer pillars 114. In this example, electro-optic modulator 300 does not include alignment pillars 112. In some embodiments, polymer pillars 114 extend through the entire liquid crystal layer 110. For example, polymer pillars 114 extend through liquid crystal layer 110 to alignment layer 108. Referring now to Figures 4A through 4M , a method 400 according to one or more embodiments of the present invention is described. A method may also refer to a process for manufacturing an electro-optical modulator. The embodiments and enabling techniques previously described herein within the context of electro-optical modulator 100, method 200, and electro-optical modulator 300 should be interpreted as extending to the method. However, it should be further noted that the method is not limited to the architectures of electro-optical modulator 100, method 200, and electro-optical modulator 300. Method 400 is a two-piece manufacturing technique having a Si substrate flip-bonded to a glass substrate via release and polymerization. In step 402, silicon nitride (SiN x ) layer is deposited on a Si substrate 403. SiN xThe layer is deposited by CVD. For example, SiN x The layer is deposited by LPCVD. SiN x The layer has a thickness. For example, SiN x The layer has a thickness of 1100 Å. In step 404, the dielectric mirror 120 is deposited on the SiN x The dielectric reflector 120 is deposited by PECVD or sputtering deposition. SiN x The dielectric reflector 120 is formed by forming a SiN layer. x and SiO 2. The dielectric reflector 120 may include a stress. For example, the dielectric reflector 120 may include a tensile stress between 50 MPa and 150 MPa. In step 406, polymer layer 118 is spin-coated and cured. Polymer layer 118 is spin-coated and cured onto dielectric mirror 120. Polymer layer 118 is cured at a temperature. Polymer layer 118 is cured at an elevated temperature to reduce stress in dielectric mirror 120 due to shrinkage of polymer layer 118. In some embodiments, polymer layer 118 is cured at a temperature between 350°C and 400°C. In some embodiments, polymer layer 118 is spin-coated as a liquid polyimide, which then hardens during curing. Polymer layer 118 may be spin-coated to a thickness between 3.8 μm and 4.2 μm. In step 408, an alignment layer 116 is deposited on the polymer layer 118. The alignment layer 116 is deposited by CVD. For example, the alignment layer 116 is deposited by PECVD. In some embodiments, the alignment layer 116 is deposited to a thickness. For example, the alignment layer 116 is deposited to a thickness between 285 Å and 315 Å. The steps may also include patterning one or more trenches in the alignment layer 116. The one or more trenches are patterned by etching, plasma ashing, and stripping. In some embodiments, the trenches are etched to a depth. For example, the trenches may be etched to a depth of 250 Å. In some embodiments, the trenches define a checkerboard pattern in the alignment layer 116. The alignment layer 116 includes a line spacing (LS). The line spacing is the distance between the trenches. In some embodiments, the line spacing may be 300 nm or less. In some embodiments, the line spacing may be 110 nm or less. In a step 410, polymer pillars 114 are deposited on the alignment layer 116. In some embodiments, the polymer pillars 114 can be deposited using two masks. In some embodiments, the polymer pillars 114 can be deposited by using one mask for alignment. In some embodiments, the polymer pillars 114 are formed by one mask. 2 / CF 4. Post-treatment to form carbonyl bonds between the polymer pillars 114 and the alignment layer 116 to improve the adhesion of the polymer pillars 114 to the alignment layer 116. In a step 412, the transparent electrode 106 is deposited on the glass substrate 104 by sputter deposition. In this regard, the glass substrate 104 is not disposed on the anti-reflective coating 102. In step 414, an alignment layer 108 is deposited on the transparent electrode 106. The alignment layer 108 is deposited on the transparent electrode 106 by chemical vapor deposition (CVD). For example, the alignment layer 108 is deposited on the transparent electrode 106 by plasma enhanced chemical vapor deposition (PECVD). The alignment layer 108 requires a deep ultraviolet (DUV) polarizer mask for alignment within a desired period of time. The steps of depositing the transparent electrode 106 on the glass substrate 104 and depositing the alignment layer 108 can be performed by depositing the silicon nitride (SiN x ) layer on the Si substrate 403, depositing the dielectric reflector 120, spin coating and curing the polymer layer 118, and depositing the alignment layer 116 on the polymer layer 118 before, at the same time, or after the steps of. In step 416, the alignment layer 108 is bonded to the polymer pillars 114. The glass substrate 104, transparent electrode 106, and alignment layer 108 are flipped and aligned onto the polymer pillars 114. The alignment layer 108 is bonded to the polymer pillars 114 by vacuum pressing. The alignment layer 108 is pressed at a glass transition temperature of the polymer pillars 114. For example, the polymer pillars 114 may have a glass transition temperature between 150°C and 200°C. In step 418, the Si substrate is released from the dielectric mirror 120. The Si substrate is released from the dielectric mirror 120 by etching the Si substrate. For example, the Si substrate can be etched using potassium hydroxide (KOH) or the like. The edges of the polymer layer 118 can be clamped during etching. In some embodiments, the polymer layer 118 may require patterning and a protective layer at the edges, which may depend on the fixture and etching solution. In a step 420, a hard coating 122 is deposited on the dielectric mirror 120. In some embodiments, the hard coating 122 is spin-coated and cured on the dielectric mirror 120. The hard coating 122 may be cured using a low temperature (LT) cure to prevent cracking of the dielectric mirror 120. In step 422, a liquid crystal layer 110 is added between alignment layer 108 and alignment layer 116. Liquid crystal layer 110 is added through one or more openings. In some embodiments, liquid crystal layer 110 is added by vacuum or capillary insertion. For example, liquid crystal layer 110 can be added through a cavity by capillary action. Adding liquid crystal layer 110 through a cavity by capillary action differs from the lamination method used to manufacture NCAP modulators or PDLC modulators and prevents damage to the LC sensor when the top polyester film is removed during the assembly process. The steps may further include sealing one or more openings with an epoxy seal 115. In some embodiments, edge trimming / sealing is required without upstream definition etching. 5 , an electro-optical modulator 500 according to one or more embodiments of the present invention is described. The entire discussion of the electro-optical modulator 100 and the electro-optical modulator 300 is incorporated herein by reference into the electro-optical modulator 500 . The electro-optic modulator 100 may include one or more films, layers, or coatings. One or more film layers selectively allow light to pass through. For example, the electro-optic modulator 100 may include one or more layers such as, but not limited to, an anti-reflective coating 102, a glass substrate 104, a transparent electrode 106, an alignment layer 108, a liquid crystal layer 110, alignment posts 112, polymer posts 114, an epoxy seal 115, an alignment layer 116, a polymer layer 118, a dielectric mirror 120, a hard coating 122, and the like. The entire discussion of the anti-reflective coating 102, the glass substrate 104, the transparent electrode 106, the alignment layer 108, the liquid crystal layer 110, the alignment posts 112, the polymer posts 114, the epoxy seal 115, the alignment layer 116, the polymer layer 118, the dielectric mirror 120, and the hard coating 122 of the electro-optic modulator 100 is hereby incorporated by reference into the electro-optic modulator 500. The electro-optical modulator 500 also includes a dielectric post 502 . The electro-optic modulator 500 is similar to the electro-optic modulator 100, except that the electro-optic modulator 500 has a dielectric mirror 120 between the alignment layer 116 and the polymer layer 118. The dielectric mirror 120 is disposed on the alignment layer 116. The polymer layer 118 is disposed on the dielectric mirror 120. The alignment posts 112 extend from the alignment layer 116 through the liquid crystal layer 110 to the alignment layer 108. The alignment posts 112 are used in a form to fabricate the dielectric pillars 502. Electro-optical modulator 500 includes dielectric pillars 502. Dielectric pillars 502 extend from dielectric mirror 120. Dielectric pillars 502 extend from dielectric mirror 120 through a first portion of liquid crystal layer 110. Dielectric pillars 502 extend from dielectric mirror 120 through the first portion of liquid crystal layer 110 to alignment pillars 112. Dielectric pillars 502 are disposed on alignment pillars 112. Alignment pillars 112 separate dielectric pillars 502 from liquid crystal layer 110. Alignment pillars 112 also separate dielectric pillars 502 from alignment layer 108. Dielectric pillars 502 are used in a manner to form polymer pillars 114. Electro-optical modulator 500 includes polymer pillars 114. Polymer pillars 114 extend from polymer layer 118. Polymer pillars 114 extend from polymer layer 118 through dielectric mirrors 120 and alignment layer 116. Polymer pillars 114 extend from polymer layer 118 through dielectric mirrors 120 and alignment layer 116, through a second portion of liquid crystal layer 110, and onto dielectric pillars 502. The second portion of liquid crystal layer 110 is smaller than the first portion of liquid crystal layer 110. In this regard, dielectric pillars 502 extend further into liquid crystal layer 110 than polymer pillars 114. Polymer pillars 114 are disposed on dielectric pillars 502. Dielectric pillars 502 separate alignment pillars 112 from polymer pillars 114. Electro-optical modulator 500 can be manufactured by a process similar to method 200. Although method 200 is described as including spin coating and curing polymer pillars 114 and polymer layer 118 and then depositing dielectric mirrors 120, this is not intended to be a limitation of the present invention. In some embodiments, dielectric mirrors 120 can be deposited before spin coating and curing polymer pillars 114 and polymer layer 118. Dielectric mirrors 120 can then include dielectric pillars 502 disposed in a support structure on alignment pillars 112. Polymer layer 118 can then be deposited on dielectric mirrors 120, and polymer pillars 114 can then be deposited in a support structure on dielectric pillars 502. The steps in this method can be considered a mirror-first process rather than a polymer layer-first process. In some embodiments, the mirror-first process can use a photodefinable polymer layer 118. FIG6 is a conceptual diagram illustrating an imaging system 600 according to one or more embodiments of the present invention. For purposes of this disclosure, the term "imaging system" is interchangeable with the term "imaging tool." Imaging system 600 may also refer to an automated optical inspection (AOI) system, a voltage imaging optical system (VIOS), an array inspector, and the like. Imaging system 600 may generally include any type of imaging tool suitable for, such as, but not limited to, voltage imaging. Voltage imaging can be used to detect and measure defects in flat-panel thin-film transistor (TFT) arrays. The performance of a TFT array is simulated as if it were assembled into a TFT cell, and the characteristics of the TFT array are then measured by indirectly measuring the actual voltage distribution across the panel using an electro-optical modulator (100, 300, 500), or so-called voltage imaging. Voltage imaging can be performed by imaging system 600. Imaging system 600 may include one or more components used to inspect such TFT arrays or other samples. Electro-optical modulators (100, 300, 500) can facilitate a number of imaging tasks, such as modulating a light source of imaging system 600 to assist in detecting one or more defects in a sample 611, such as, but not limited to, a thin film transistor (TFT) array, a liquid crystal display (LCD) panel, an OLED panel, and the like. The TFT array can be formed on a substrate, such as a transparent sheet of thin glass. The TFT array can include one or more printed layers. The printed layers can be formed on the substrate through a number of processes, such as, but not limited to, one or more material deposition steps, one or more lithography steps, one or more etching steps, and the like. Manufacturing can occur in stages, where a material (e.g., indium tin oxide (ITO), etc.) is deposited over a previous layer or onto the glass substrate according to a process pattern. During manufacturing, the printed layers are fabricated within selected tolerances to properly construct the final device. The printed layers may exhibit defects outside of the selected tolerances. Characteristics of the TFT array can be measured by imaging system 600 to detect defects. In one embodiment, imaging system 600 includes an illumination source 606 for generating illumination 608. Illumination 608 may include one or more selected wavelengths of light, including, but not limited to, vacuum ultraviolet radiation (VUV), deep ultraviolet radiation (DUV), ultraviolet (UV), visible radiation, or infrared (IR). Illumination source 606 may further generate illumination 608 comprising any range of selected wavelengths. In one embodiment, illumination source 606 may include a spectrally tunable illumination source for generating illumination 608 having a tunable spectrum. In an embodiment, an illumination source 606 directs illumination 608 to a sample 611 via an illumination path 609. The illumination path 609 may include one or more lenses 612 or additional illumination optical components 614 suitable for modifying and / or conditioning the illumination 608. For example, the one or more illumination optical components 614 may include, but are not limited to, one or more polarizers, one or more filters, one or more beam splitters, one or more diffusers, one or more homogenizers, one or more apodizers, one or more shapers, one or more shutters (e.g., mechanical shutters, electro-optical shutters, acousto-optical shutters, or the like), one or more aperture stops, and / or one or more field stops. In one embodiment, imaging system 600 includes electro-optical modulator 100. Electro-optical modulator (100, 300, 500) is positioned in a path of illumination 608 from illumination source 606. Electro-optical modulator (100, 300, 500) can modulate one or more characteristics of illumination 608. During operation, light is transmitted through portions of electro-optical modulator (100, 300, 500), and defects can be detected by observing changes in reflected or transmitted light. Electro-optical modulator (100, 300, 500) is separated from sample 611 by an air gap. The electro-optic modulator (100, 300, 500) can be placed a selected number of microns (e.g., between 5 and 75 microns) above the surface of a sample 611 (e.g., a TFT array) and a voltage bias is applied across a transparent electrode of a layer of indium tin oxide (hereinafter referred to as "ITO") on one surface of the electro-optic modulator (100, 300, 500). The electro-optic modulator (100, 300, 500) is then capacitively coupled to the sample 611, such that an electric field associated with the sample 611 is sensed by one or more layers (e.g., a layer comprising liquid crystal) of the electro-optic modulator (100, 300, 500). The intensity of incident light transmitted through the liquid crystal of the electro-optic modulator varies (i.e., is modulated) based on the intensity of the electric field felt by the liquid crystal. For example, in a region where a normal pixel is located, a local voltage potential is applied (e.g., a capacitive coupling between the sample 611 and the electro-optic modulator (100, 300, 500)) to cause one or more films of the electro-optic modulator 100 to become locally translucent. In the locally translucent region, light from the light source 606 is allowed to pass through the electro-optic modulator (100, 300, 500) and reflect from the sample 611 to pass through a collection path 622 (e.g., for capture by the detector 604). As another example, in regions where no voltage potential is applied (e.g., no capacitive coupling), one or more films of the electro-optic modulator (100, 300, 500) remain locally opaque. In the case where the electro-optic modulator (100, 300, 500) is locally opaque, light from the light source 606 is scattered or otherwise prevented from being transmitted to the sample 611. Thus, a transmission voltage (TV) curve can be determined by applying a voltage. The intrinsic switching voltage of the electro-optical modulator 100 may correspond to a voltage across the electro-optical modulator (100, 300, 500) at which light transmission through the electro-optical modulator (100, 300, 500) has a maximum sensitivity to a voltage change. For example, the switching voltage may correspond to an electric field strength at which a given percentage of liquid crystal molecules substantially align with the electric field, allowing light transmission. In one embodiment, sample 611 comprises a thin film transistor (TFT) array. For example, sample 611 may comprise pixel elements disposed between inactive regions. Sample stage 618 may comprise any device suitable for positioning sample 611 within imaging system 600. In one embodiment, a detector 604 is configured to capture radiation (e.g., sample light 620) emitted from a sample 611 via a collection path 622. For example, the collection path 622 may include (but need not include) an electro-optical modulator (100, 300, 500), a collection lens (e.g., an objective lens), or one or more additional collection path lenses 624. In this regard, a detector 604 may receive radiation reflected or scattered from the sample 611 (e.g., via specular reflection, diffuse reflection, and the like) or generated by the sample 611 (e.g., luminescence associated with absorbed illumination 608, or the like). The system 600 may include, but is not limited to, a controller 603 . The controller 603 may include one or more processors and memory and may include or be coupled to a user interface 610 . The collection path 622 may further include any number of collection optical components 626 for directing and / or modifying the illumination collected by the electro-optic modulator (100, 300, 500), including, but not limited to, one or more collection path lenses 624, one or more filters, one or more polarizers, or one or more barriers. Additionally, the collection path 622 may include a field stop for controlling the spatial extent of the sample imaged onto the detector 604 or an aperture stop for controlling the angular extent of the illumination from the sample used to produce an image on the detector 604. In another embodiment, the collection path 622 includes an aperture stop positioned in a plane conjugate to the focal plane after an optical element to provide telecentric imaging of the sample. In an embodiment, the system 600 includes a beam splitter 628 oriented so that the electro-optic modulator 100 can simultaneously direct the illumination 608 to the sample 611 and collect radiation emitted from the sample 611. Detector 604 may include any type of optical detector suitable for measuring illumination received from sample 611. For example, detector 604 may include, but is not limited to, a CCD detector, a TDI detector, a photomultiplier tube (PMT), an avalanche photodiode (APD), a complementary metal oxide semiconductor (CMOS) sensor, or the like. In another embodiment, detector 604 may include a spectral detector suitable for identifying the wavelength of light emitted from sample 611. In one embodiment, the controller 603 is communicatively coupled to a detector 604. The controller 603 may include one or more processors configured to perform any of a variety of process steps. In one embodiment, the controller 603 is configured to generate and provide one or more control signals configured to perform one or more adjustments to one or more process tools based on the image signal 613 from the detector 604. The one or more processors of controller 603 may include any processor or processing element known in the art. For purposes of the present invention, the term "processor" or "processing element" is broadly defined to encompass any device having one or more processing or logic elements, such as one or more microprocessor devices, one or more application-specific integrated circuit (ASIC) devices, one or more field-programmable gate arrays (FPGAs), or one or more digital signal processors (DSPs). In this sense, the one or more processors may include any device configured to execute algorithms and / or instructions, such as program instructions stored in memory. In one embodiment, the one or more processors may be embodied as a desktop computer, a mainframe computer system, a workstation, an imaging computer, a parallel processor, a network computer, or any other computer system configured to execute a program configured to operate or operate in conjunction with imaging system 600, as described herein. Furthermore, various subsystems of system 600 may include a processor or logic element suitable for implementing at least a portion of the steps described herein. Therefore, the above description should not be construed as limiting the embodiments of the present invention, but rather as merely illustrative. Furthermore, the steps described herein can be performed by a single controller or, alternatively, multiple controllers. Furthermore, controller 603 can comprise one or more controllers housed in a common housing or multiple housings. In this manner, any controller or combination of controllers can be individually packaged as a module suitable for integration into imaging system 600. Furthermore, controller 603 can analyze data received from detector 604 and feed the data to additional components within or outside of imaging system 600. The memory medium may include any storage medium known in the art suitable for storing program instructions executable by an associated one or more processors. For example, the memory medium may include a non-transitory memory medium. As another example, the memory medium may include, but is not limited to, a read-only memory (ROM), a random access memory (RAM), a magnetic or optical memory device (e.g., a disk), a tape, a solid-state drive, and the like. It should be further noted that the memory medium may be housed in a common controller housing with the one or more processors. In one embodiment, the memory medium may be remotely located relative to the physical location of the one or more processors and the controller. For example, one or more processors of the controller 603 may access a remote memory (e.g., a server) that is accessible via a network (e.g., the Internet, an intranet, and the like). In one embodiment, the user interface 610 is communicatively coupled to the controller 603. In one embodiment, the user interface 610 may include, but is not limited to, one or more desktop computers, laptop computers, tablet computers, and the like. In one embodiment, the user interface 610 includes a display for displaying information about the system 600 to a user. The display of the user interface 610 may include any display known in the art. For example, the display may include, but is not limited to, a liquid crystal display (LCD), an organic light emitting diode (OLED)-based display, or a CRT display. Those skilled in the art will recognize that any display device capable of being integrated with a user interface 610 is suitable for implementation in the present invention. In one embodiment, a user may enter selections and / or commands via a user input device of the user interface 610 in response to information displayed to the user. Referring again generally to FIG. 1A through FIG. 6 , the electro-optical modulator (100, 300, 500) is expected to provide several benefits of an NCAP-based EO modulator. The electro-optical modulator (100, 300, 500) improves noise, dynamic range, and defect sensitivity and reduces the threshold field for detecting defects in the modulator product during flat panel manufacturing. The electro-optical modulator (100, 300, 500) achieves a desired level of flatness. The electro-optical modulator (100, 300, 500) reduces part-to-part variations resulting from mechanical processes. The electro-optical modulator (100, 300, 500) includes the improved defect detection sensitivity and reduced threshold field required for defect metrology during flat panel display manufacturing. In some embodiments, the electro-optic modulator (100, 300, 500) may include an area. For example, the electro-optic modulator (100, 300, 500) may include an area of ​​130 mm x 130 mm up to an area of ​​1 cm x 1 cm. As used herein, the term "sample" generally refers to a substrate formed from a semiconductor or non-semiconductor material (such as thin-film glass or the like). For example, a semiconductor or non-semiconductor material may include, but is not limited to, single crystal silicon, gallium arsenide, indium phosphide, or a glass material. A sample may include one or more layers. For example, these layers may include, but are not limited to, a photoresist (including a photoresist), a dielectric material, a conductive material, and a semiconducting material. Many different types of these layers are known in the art, and the term "sample" as used herein is intended to encompass a sample on which all types of these layers may be formed. The one or more layers formed on a sample may be patterned or unpatterned. For example, a sample may include a plurality of dies, each having repeatable patterned features. The formation and processing of these material layers may ultimately result in a completed device. Many different types of devices may be formed on a sample, and the term "sample" as used herein is intended to encompass a sample on which any type of device known in the art is fabricated. Furthermore, for purposes of the present invention, the terms "sample" and "wafer" should be interpreted as interchangeable. Furthermore, for purposes of the present invention, the terms "patterning device," "mask," and "reticle" should be interpreted as interchangeable. It is further contemplated that each of the above-described method embodiments may include any other step(s) of any other method(s) described herein. Furthermore, each of the above-described method embodiments may be performed by any of the systems described herein. In some embodiments, the method utilizes surface microelectromechanical system ("surface MEMS") fabrication technology that can be used in silicon wafer foundries to produce the electro-optic modulator 100. Those skilled in the art will recognize that the components, operations, devices, and objects described herein, and their accompanying discussions, are examples to clarify the concepts and that various configuration modifications are contemplated. Therefore, as used herein, the specific examples and accompanying discussions set forth are intended to represent their more general categories. Generally speaking, the use of any specific example is intended to represent its category, and the absence of specific components, operations, devices, and objects should not be considered limiting. As used herein, directional terms such as "top," "bottom," "above," "below," "up," "upward," "down," "below," and "downward" are intended to provide relative positions for descriptive purposes and are not intended to specify an absolute reference system. Those skilled in the art will appreciate various modifications to the described embodiments, and the general principles defined herein may be applied to other embodiments. With respect to the use of substantially any plural and / or singular terms herein, those skilled in the art can convert the plural to the singular and / or the singular to the plural depending on the context and / or application. For clarity, various singular / plural arrangements are not explicitly set forth herein. The subject matter described herein sometimes depicts different components contained within or connected to other components. It should be understood that these depicted architectures are for illustrative purposes only, and in fact, many other architectures that achieve the same functionality can be implemented. Conceptually, any configuration of components that achieve the same functionality is effectively "associated" to achieve the desired functionality. Therefore, regardless of the architecture or intermediate components, any two components combined herein to achieve a particular functionality can be considered to be "associated" with each other to achieve the desired functionality. Similarly, any two components so associated can also be considered to be "connected" or "coupled" to each other to achieve the desired functionality, and any two components capable of being so associated can also be considered to be "coupleable" to each other to achieve the desired functionality. Specific examples of "coupleable" include (but are not limited to) physically commingled and / or physically interacting components and / or wirelessly interacting and / or wirelessly interacting components and / or logically interacting and / or logically interacting components. Furthermore, it should be understood that the present invention is defined by the appended claims. Those skilled in the art will understand that, in general, the terms used herein and in particular in the appended claims (e.g., the body of the appended claims) are generally intended to be "open-ended" terms (e.g., the term "comprising" should be interpreted as "including (but not limited to)", the term "having" should be interpreted as "having at least", etc.). Those skilled in the art will further understand that if a specific number of claim recitations is intended, such intent is explicitly stated in the claim, and if such intent is not stated, such intent does not exist. For example, as an aid to understanding, the following appended claims may contain the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed as implying that the introduction of a claim recitation by the indefinite article "a" limits any particular claim containing the introduced claim recitation to inventions containing only one such recitation, even if the same claim includes the introductory phrase "one or more" or "at least one" and an indefinite article such as "a" (e.g., "a" should generally be interpreted as meaning "at least one" or "one or more"); the same applies to the use of definite articles used to introduce claim recitations. In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that this recitation should generally be interpreted as meaning at least the recited number (e.g., the bare recitation of "two recitations" without other modifiers generally means at least two recitations or two or more recitations). Furthermore, in instances where a convention similar to “at least one of A, B, and C, and the like” is used, such a construction is generally intended to be what one skilled in the art would normally understand (e.g., “a system having at least one of A, B, and C” would include, but not be limited to, systems having only A, only B, only C, both A and B, both A and C, both B and C, and / or both A, B, and C, etc.). In instances where a convention similar to “at least one of A, B, or C, and the like” is used, such a construction is generally intended to be what one skilled in the art would normally understand (e.g., “a system having at least one of A, B, or C” would include, but not be limited to, systems having only A, only B, only C, both A and B, both A and C, both B and C, and / or both A, B, and C, etc.). Those skilled in the art will further understand that, whether in the embodiments, claims, or drawings, any disjunctive term and / or phrase presenting two or more alternatives should be understood to encompass the possibility of including one, either, or both of the alternatives. For example, the phrase "A or B" should be understood to encompass the possibility of "A" or "B" or "A and B." It is believed that the present invention and many of its attendant advantages will be understood from the above description, and it should be understood that various changes can be made to the form, construction, and arrangement of the components without departing from the present invention or sacrificing all of its material advantages. The forms described are for illustration only and the following claims are intended to cover and include such changes. Furthermore, it should be understood that the present invention is defined by the appended patent applications. 100: Electro-Optical (EO) Modulator 102: Anti-Reflective Coating 104: Glass Substrate 106: Transparent Electrode 108: Alignment Layer 110: Liquid Crystal Layer 112: Alignment Pillars 114: Polymer Pillars 115: Epoxy Seal 116: Alignment Layer 118: Polymer Layer 120: Dielectric Mirror 122: Hard Coating 200: Method 202: Step 204: Step 206: Step 208: Step 209: Sacrificial Layer 209a: Sacrificial Layer 209b: Sacrificial Layer 210: Step 211: Support Structure 212: Step 214: Step 216: Step 218: Step 219: Active Area / Active Array 220: Step 222: Step 224: Step 30 0: Electro-Optic Modulator 400: Method 402: Step 403: Si Substrate 404: Step 406: Step 408: Step 410: Step 412: Step 414: Step 416: Step 418: Step 420: Step 422: Step 500: Electro-Optic Modulator 502: Dielectric Pillar 600: Imaging System 603: Controller 604: Detector 606: Illumination Source 608: Illumination 609: Illumination Path 610: User Interface 611: Sample 612: Lens 613: Image Signal 614: Illumination Optics 618: Sample Stage 620: Sample Light 622: Collection Path 624: Collection Path Lens 626: Collection Optics 628: Beam Splitter Those skilled in the art may better understand the advantages of the present invention by referring to the accompanying drawings, in which: FIG. 1A depicts a cross-sectional view of an electro-optical modulator according to one or more embodiments of the present invention. 1B depicts a top view of a liquid crystal layer, polymer pillars, alignment posts, and an epoxy seal of an electro-optic modulator according to one or more embodiments of the present invention. 2A-2B depict a flow chart of a method for producing an electro-optical modulator according to one or more embodiments of the present invention. 2C-2N depict a cross-sectional view of an electro-optical modulator during a method according to one or more embodiments of the present invention. 3 depicts a cross-sectional view of an electro-optical modulator according to one or more embodiments of the present invention. 4A-4B depict a flow chart of a method for producing an electro-optical modulator according to one or more embodiments of the present invention. 4C-4M depict a cross-sectional view of an electro-optical modulator during a method according to one or more embodiments of the present invention. 5 depicts a cross-sectional view of an electro-optical modulator according to one or more embodiments of the present invention. FIG. 6 depicts a simplified diagram of an imaging system according to one or more embodiments of the present invention. 100:Electro-Optical (EO) Modulator 102: Anti-reflective coating 104: Glass substrate 106: Transparent electrode 108: Alignment layer 110: Liquid crystal layer 112: Alignment Post 114: polymer column 116: Alignment layer 118: polymer layer 120: Dielectric Mirror 122: Hard coating

Claims

1. An electro-optic modulator, comprising: A glass substrate; A transparent electrode is disposed on the glass substrate; A first alignment layer is disposed on the transparent electrode; A liquid crystal layer disposed on the first alignment layer; a second alignment layer disposed on the liquid crystal layer; a polymer layer disposed on the second alignment layer; a plurality of polymer pillars, wherein the plurality of polymer pillars extend through at least a portion of the liquid crystal layer; The plurality of polymer pillars mechanically support the polymer layer; a dielectric mirror is disposed on the polymer layer; and a hard coating is disposed on the dielectric mirror.

2. The electro-optic modulator of claim 1, wherein the liquid crystal layer has a thickness between 2 micrometers and 5 micrometers.

3. The electro-optic modulator of claim 1, wherein the liquid crystal layer is not a nematic phase or a polymer-dispersed liquid crystal.

4. The electro-optic modulator of claim 1, wherein the plurality of polymer pillars extend from the polymer layer through at least a portion of the second alignment layer and the liquid crystal layer.

5. The electro-optic modulator of claim 4, comprising a plurality of alignment posts; wherein the plurality of alignment posts extend from the second alignment layer to the first alignment layer; wherein the plurality of polymer posts extend through at least the portion of the liquid crystal layer to the alignment posts; wherein the plurality of polymer posts are disposed on the plurality of alignment posts.

6. The electro-optic modulator of claim 5, comprising an anti-reflective coating; wherein the glass substrate is disposed on the anti-reflective coating.

7. The electro-optic modulator of claim 1, wherein the plurality of polymer pillars extend from the second alignment layer through the liquid crystal layer to the first alignment layer; wherein the plurality of polymer pillars are separated from the polymer layer by the second alignment layer.

8. The electro-optic modulator of claim 1, wherein each of the plurality of polymer pillars comprises a width of less than 1.4 micrometers and a thickness between 2 and 5 micrometers.

9. The electro-optic modulator of claim 8, wherein each of the plurality of polymer pillars comprises a side wall angle between 83° and 93°.

10. The electro-optic modulator of claim 1, wherein the transparent electrode comprises at least one of indium tin oxide (ITO) or silver nanowires.

11. The electro-optic modulator of claim 1, wherein the first alignment layer and the second alignment layer each comprise at least one of silicon oxynitride or silicon dioxide.

12. The electro-optic modulator of claim 1, wherein the first alignment layer and the second alignment layer each contain a refractive index between 1.51 and 1.

55.

13. The electro-optic modulator of claim 1, wherein the polymer layer and each of the plurality of polymer pillars comprises a cross-linked polymer.

14. The electro-optic modulator of claim 1, wherein the dielectric mirror has a reflectivity of more than 80% for light having a wavelength between 570 nm and 670 nm.

15. The electro-optic modulator of claim 1, wherein the dielectric mirror is a stack of repeating layers of silicon nitride and silicon dioxide.

16. The electro-optic modulator of claim 1, wherein the dielectric mirror is a stack of repeating layers of zirconium oxide and silicon dioxide.

17. The electro-optic modulator of claim 1, comprising an epoxy resin seal; wherein the epoxy resin seal seals the liquid crystal layer between the first alignment layer and the second alignment layer.

18. An imaging system comprising: A light source configured to generate illumination; a stage for a sample; a detector for generating an image of at least a portion of the sample; and an electro-optic modulator disposed in a path of the illumination from the light source and separated from the sample by an air gap, wherein the electro-optic modulator comprises: a glass substrate; a transparent electrode disposed on the glass substrate; a first alignment layer disposed on the transparent electrode; a liquid crystal layer disposed on the first alignment layer; a second alignment layer disposed on the liquid crystal layer; a polymer layer disposed on the second alignment layer; a plurality of polymer pillars extending through at least a portion of the liquid crystal layer; wherein the plurality of polymer pillars mechanically support the polymer layer; a dielectric mirror disposed on the polymer layer; and a hard coating disposed on the dielectric mirror.

19. An electro-optic modulator, comprising: A glass substrate; A transparent electrode is disposed on the glass substrate; A first alignment layer is disposed on the transparent electrode; A liquid crystal layer disposed on the first alignment layer; a second alignment layer disposed on the liquid crystal layer; a plurality of alignment posts; wherein the plurality of alignment posts extend from the second alignment layer through the liquid crystal layer to the first alignment layer; a dielectric mirror disposed on the second alignment layer; a plurality of dielectric posts; wherein the plurality of dielectric posts extend from the dielectric mirror through a first portion of the liquid crystal layer to the plurality of alignment posts; wherein the plurality of dielectric posts are disposed on the plurality of alignment posts; a polymer layer disposed on the dielectric mirror; and a plurality of polymer posts; wherein the plurality of polymer posts extend from the polymer layer through the dielectric mirror, the second alignment layer, and a second portion of the liquid crystal layer to the plurality of dielectric posts; wherein the plurality of polymer posts are disposed on the plurality of dielectric posts.

20. The electro-optic modulator of claim 19, wherein the liquid crystal layer has a thickness between 2 micrometers and 5 micrometers.

21. The electro-optic modulator of claim 19, wherein the liquid crystal layer is not a nematically aligned phase or a polymer-dispersed liquid crystal.

Images