Plasma treatment of barrier and liner layers

TWI943109BActive Publication Date: 2026-10-21APPLIED MATERIALS INC
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Patent Information

Application Number
TW112150210
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Priority Date
2023-01-29
Filing Date
2023-12-22
Publication Date
2026-10-21
Estimated Expiration
2043-12-21

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Abstract

The embodiments disclosed herein relate to methods for forming electrical interconnects. Other embodiments provide methods for forming and disposing of barrier layers and padding layers to improve film and material properties. In some embodiments, the resulting composite layer provides improved resistivity, reduced void formation, and improved device reliability.
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Description

Plasma treatment of barrier layer and backing layer The embodiments of this disclosure generally relate to methods for treating padding layers and barrier layers to improve performance. Specifically, the embodiments of this disclosure relate to plasma treatment methods for padding layers and barrier layers to improve layer properties, as well as gap-filling properties and behavior. Microelectronic devices (such as semiconductors or integrated circuits) can comprise millions of electronic circuit components, such as transistors and capacitors. To further increase the density of components on integrated circuits, even smaller feature sizes are required. To achieve these smaller feature sizes, the dimensions of wires, vias, interconnects, gates, etc., must be reduced. Reliably forming multilayer interconnect structures is also necessary to increase circuit density and quality. Advances in manufacturing technology have enabled the use of copper in conductors, interconnects, vias, and other structures. However, with the reduction in feature sizes and the increased use of copper for interconnects, electromigration in interconnect structures has become a greater obstacle to overcome. This electromigration can adversely affect the electrical properties of various components in integrated circuits. Furthermore, using copper for conductive filling typically requires the use of metal spacers to promote nucleation and adequate gap-filling efficiency. Specifically, for nodes of 5 nm and below, the barrier and pad thickness of copper interconnects become increasingly challenging for device reliability and the adhesion of the barrier layer to the dielectric layer. The reduced geometry also leads to higher resistance in the copper wires and makes them more susceptible to electromigration (EM) failures. High-quality bonding at the interface between the copper and the dielectric barrier layer can reduce or prevent EM failures. Conventional techniques for improving the nucleation and bonding of gap-fill metals to the underlying barrier layer typically rely on metal or metal alloy pads. The typical thickness of the barrier layer and pad at the 5 nm node is on the order of approximately 40 Å to 45 Å. Thicker barrier / pad layers result in less space for metal interstitial filling and tend to increase resistivity. Current methods to improve barrier adhesion to metals and filler metal migration during interstitial filling involve increasing the thickness of the barrier / pad film. However, this approach is limited by material properties and thickness. Therefore, it is necessary to improve one or more of the following treatments: barrier performance, barrier thickness, liner thickness, gap fill adhesion, gap fill nucleation, or gap fill resistivity. One or more embodiments of this disclosure are a method for forming electrical interconnects, the method comprising the steps of: forming a barrier layer within a substrate feature; forming a pad layer on the barrier layer; and treating the pad layer and the barrier layer to form a treated composite. The barrier layer is not densified prior to the deposition of the pad layer. Other embodiments of this disclosure are a method for forming electrical interconnects. The method includes the steps of: forming a barrier layer within a substrate feature; treating the barrier layer to form a treated barrier layer; forming a pad layer on the treated barrier layer; and treating the pad layer and the treated barrier layer to form a treated composite. Before describing several exemplary embodiments of this disclosure, it should be understood that this disclosure is not limited to the details of the construction or processing steps set forth in the following description. This disclosure can have other embodiments and can be practiced or implemented in various ways. As used herein, the term “about” means approximately or close to, and in the context of the numerical value or range described, it means a variation of ±15% or less of that value. For example, values ​​differing by ±14%, ±10%, ±5%, ±2%, ±1%, ±0.5%, or ±0.1% would satisfy the definition of “about”. As used in this specification and the appended claims, the terms "substrate" or "wafer" refer to a surface or part thereof on which processing is performed. Those skilled in the art will also understand that reference to a substrate may refer only to a portion of the substrate, unless the context clearly indicates otherwise. Furthermore, reference to deposition on a substrate may refer to a bare substrate and a substrate on which one or more films or features are deposited or formed. As used herein, "substrate surface" refers to any substrate or material surface formed on a substrate on which a film treatment is performed during manufacturing processes. For example, substrate surfaces on which treatments can be performed include materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. Substrates may be exposed to pretreatment processes such as polishing, etching, reduction, oxidation, hydroxylation, annealing, and / or baking of the substrate surface. In addition to performing film treatments directly on the surface of the substrate itself, any film treatment steps disclosed in this disclosure may also be performed on an underlayer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include such an underlayer as indicated by the context. Thus, for example, when a film / layer or a portion of a film / layer has been deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. The substrate surface may have one or more features formed therein, one or more layers formed thereon, and combinations thereof. The shape of the features may be any suitable shape, including but not limited to trenches, holes, and through-holes (circular or polygonal). As used herein, the term "feature" means any intentional surface irregularity. Suitable examples of features include, but are not limited to, trenches having extending into the top, two sidewalls, and bottom of the substrate, and through-holes having one or more sidewalls extending into the bottom of the substrate. The term "on" indicates that there is direct contact between elements. The term "directly on" indicates that there is direct contact between elements without any intermediate elements. As used in this specification and the appended claims, the terms "precursor," "reactant," "reactive gas," etc., are used interchangeably to refer to any gaseous substance capable of reacting with the substrate surface. Embodiments of this disclosure advantageously provide methods for forming electrical interconnects. Specific embodiments advantageously provide a method for depositing metal gap fills within substrate features lined with barrier layers and pad layers treated with one or more plasma treatment processes. In some embodiments, the method reduces the thickness of the barrier layer, reduces the thickness of the pad layer, increases the grain size of the pad layer, reduces the resistivity of the pad layer, reduces the resistivity of the metal gap fill, reduces the void volume in the metal gap fill, or facilitates the integration of one or more method operations. Embodiments of this disclosure are illustrated by means of drawings, showing processes, substrates, and apparatus according to one or more embodiments of this disclosure. The processes, solutions, and resulting substrates shown are merely illustrative of the disclosed processes, and those skilled in the art will understand that the disclosed processes are not limited to the illustrated applications. Referring to the figures, this disclosure relates to a method 100 for disposing of a barrier layer and a backing layer. Figure 1 depicts a process flow diagram of the method 100 according to one or more embodiments of this disclosure. Figures 2A to 2E depict the substrate 200 during processing according to one or more embodiments of this disclosure. Figure 2A illustrates a substrate 200 having a substrate surface 205. As described above, the substrate surface refers to the exposed surface of the substrate on which layers can be formed. In some embodiments, the substrate 200 includes a dielectric material. In some embodiments, the substrate 200 includes a low-k dielectric material. The substrate surface 205 has at least one feature 210 formed therein. Although only a single feature is shown in the figures, those skilled in the art will understand that multiple features will be affected by the disclosed method (each feature in a similar manner). At least one feature 210 has an opening 212 of width W. The opening 212 is formed in the top surface 215 of the substrate 200. Feature 210 also has one or more sidewalls 214 extending from the top surface 215 to the bottom 216 with a depth D. Although straight, vertical sidewalls are shown in the figures, the disclosed method can also be performed on inclined, irregular, or recessed sidewalls. In some embodiments, the width W of the opening 212 is greater than or equal to about 10 nm, greater than or equal to about 15 nm, greater than or equal to about 20 nm, greater than or equal to about 25 nm, greater than or equal to about 30 nm, or greater than or equal to about 35 nm. In some embodiments, the width W is in the range of about 5 nm to about 15 nm, or in the range of about 10 nm to about 35 nm. In some embodiments, the depth D of feature 210 is greater than or equal to about 50 nm, greater than or equal to about 75 nm, greater than or equal to about 100 nm, greater than or equal to about 150 nm, greater than or equal to about 200 nm, or greater than or equal to about 250 nm. In some embodiments, the depth D is in the range of about 50 nm to about 250 nm, or in the range of about 200 nm to about 250 nm. Those skilled in the art will understand that the challenge of depositing metallic gap-filling in features with narrowing width (also known as critical dimension (CD)) and / or increasing depth is increasing. The aspect ratio of at least one feature 210 is defined as the depth D of feature 210 divided by its width W. In some embodiments, at least one feature has an aspect ratio (D:W) greater than or equal to about 2:1, greater than or equal to about 5:1, greater than or equal to about 10:1, or greater than or equal to about 20:1. Referring to Figures 1 and 2B, method 100 begins at operation 110. At 110, a barrier layer 220 is formed on substrate surface 205 and within at least one feature 210. In some embodiments, the barrier layer 220 is formed directly on substrate surface 205. In some embodiments, as shown in Figure 2B, the barrier layer 220 is continuous and deposited on top surface 215, sidewalls 214, and bottom 216. In some embodiments, the barrier layer is substantially conformally oriented on the surface of substrate feature 210. As used in this respect, a “substantially conformally oriented” layer has an average thickness that varies by less than 10%, less than 5%, or less than 2%. In some embodiments, the barrier layer has an average thickness of less than 20 Å or less than 15 Å. In some embodiments, operation 110 represents an atomic layer deposition (ALD) process. In some embodiments, the ALD deposition process includes sequentially exposing a substrate surface to a metal precursor and a reactant to form a barrier layer 220. In some embodiments, the barrier layer comprises tantalum nitride or is substantially composed of tantalum nitride. As used herein, a layer “substantially composed of” said material comprises greater than about 95%, greater than about 98%, greater than about 99%, or greater than about 99.5% of said material. In some embodiments, method 100 continues to an optional operation 115 of the treatment with a barrier layer. Operation 115 will be described more fully below with reference to Figures 3A to 3E. In some embodiments, operation 115, also known as densification treatment, is not performed. Method 100 continues to operation 120. At 120, a padding layer 230 is formed on the barrier layer 220 (or the treated barrier layer 323). In some embodiments, the padding layer 230 is formed directly on the barrier layer 220 (or the treated barrier layer 323). In some embodiments, operation 120 represents a chemical vapor deposition (CVD) process. In some embodiments, operation 120 represents an atomic layer deposition (ALD) process. In some embodiments, the pad layer 230 is substantially conformally fitted to the surface of the barrier layer 220 (or the treated barrier layer 323). In some embodiments, the pad layer 230 comprises cobalt and / or ruthenium or is substantially composed of cobalt and / or ruthenium. In some embodiments, the pad layer 230 is substantially composed of ruthenium and cobalt, a cobalt / ruthenium alloy, or ruthenium-doped cobalt. Method 100 continues to operation 130. At 130, the cushion layer 230 and the barrier layer 220 (or the treated barrier layer 323) are treated to form the treated cushion layer 235 and the treated barrier layer 225. For simplicity, the treated cushion layer 235 and the treated barrier layer 225 may be collectively referred to as the treated composite. In some embodiments, disposing of the liner layer 230 and the barrier layer 220 includes exposing the liner layer to a second plasma formed from a second plasma gas comprising hydrogen. In some embodiments, the second plasma gas comprises one or more rare gases (e.g., helium, neon, argon, krypton, xenon). In some embodiments, the second plasma gas comprises both hydrogen and one or more rare gases. In some embodiments, the rare gas is substantially composed of argon. Accordingly, in some embodiments, the second plasma is referred to as H. 2 / Ar plasma. In some embodiments, the second plasma is an inductively coupled plasma (ICP). In some embodiments, the second plasma is a capacitively coupled plasma (CCP). In some embodiments, the second plasma is distal. In some embodiments, the second plasma is direct. In some embodiments, the second plasma is a hybrid of distal and direct. In some embodiments, the second plasma is an RF plasma. In some embodiments, the RF frequency is selected from about 2 MHz, about 13.56 MHz, about 27 MHz, about 40 MHz, or about 60 MHz. In some embodiments, the RF frequency is in the range of about 2 MHz to about 60 MHz. In some embodiments, the second plasma has a power in the range of about 100 W to about 1000 W, about 100 W to about 500 W, or about 500 W to about 1000 W. In some embodiments, the second plasma has a bias power in the range of 0 W to about 500 W. In some embodiments, the substrate 200 (including the barrier layer 220 and the pad layer 230) is maintained at a predetermined temperature during exposure to the second plasma. In some embodiments, the predetermined temperature is in the range of about 20 degrees Celsius to about 400 degrees Celsius, in the range of about 20 degrees Celsius to about 200 degrees Celsius, or in the range of about 200 degrees Celsius to about 400 degrees Celsius. In some embodiments, the liner 230 is exposed to a second plasma under pressure ranging from 0.1 mTorr to 1 Torr. In some embodiments, the pressure is ranging from 0.1 mTorr to 0.1 Torr, from 0.1 mTorr to 10 mTorr, or from 0.1 mTorr to 1 mTorr. To avoid any doubt, the operation 115 discussed below includes the formation of a first plasma from a first plasma gas. The ordinal numbers used herein are intended to refer to the order in which the disposals can be applied, even though they are discussed in reverse order herein. Unbound by theory, it is believed that the plasma treatment performed at operation 130 modifies the composition and properties of both the pad layer and the barrier layer. In some embodiments, the pad layer is densified by plasma treatment. In some embodiments, the barrier layer is densified by plasma treatment. In some embodiments, the method reduces the resistivity of the treated composite compared to a barrier layer and pad layer not treated by a second plasma as disclosed. In some embodiments, the method removes impurities (e.g., carbon, nitrogen, oxygen) from the barrier layer and / or liner layer. In some embodiments, the method increases the grain size of the barrier layer and / or liner layer. Again, without being bound by theory, it is believed that this increase in grain size and / or impurities affects the reflow of subsequently deposited metal filler within the feature. In some embodiments, method 100 continues to operation 140. At operation 140, metal filler 240 is deposited on the treated composite. In some embodiments, metal filler 240 is deposited only within substrate features. In some embodiments, metal filler 240 is deposited directly on the treated liner layer 235. In some embodiments, a metal filler is deposited by physical vapor deposition (PVD). In some embodiments, the metal filler comprises copper or is substantially composed of copper. In some embodiments, the metal filler is substantially free of voids. As used herein, a “substantial” void has a width greater than or equal to 1 nm. The inventors have discovered that the disclosed plasma treatment method also advantageously achieves greater processing throughput by minimizing substrate transfer between processing chambers. For example, in some embodiments, plasma treatment at operation 130 and metal deposition at operation 140 can be performed in the same chamber. Other embodiments of this disclosure are described below with reference to Figures 1 and 3A to 3E. Figure 3A illustrates a substrate 300 similar to the substrate 200 shown in Figure 2B. The component symbols of the 300 series refer to materials similar to those described above using the component symbols of the 200 series. Region B is identified in Figure 3A and is enlarged in the following figures. Following operation 110, Figure 3B illustrates a substrate 300 on which a barrier layer 320 is formed. The barrier layer 320 has a thickness T. B1 In some embodiments, as described above, method 100 includes operation 115. At operation 115, the barrier layer 320 is treated prior to the deposition of the liner layer to form a treated barrier layer 323. The treated barrier layer 323 has a thickness T greater than that of the barrier layer 320. B1 Thickness T B2 . In some embodiments, disposing of the barrier layer 320 includes exposing the barrier layer to a first plasma formed from a first plasma gas. In some embodiments, the first plasma gas includes one or more rare gases (e.g., helium, neon, argon, krypton, xenon). In some embodiments, the rare gas is substantially composed of argon. In some embodiments, the first plasma gas further includes hydrogen. Accordingly, in some embodiments, the first plasma is referred to as H2. 2 / Ar plasma. In some embodiments, the first plasma is an inductively coupled plasma (ICP). In some embodiments, the first plasma is a capacitively coupled plasma (CCP). In some embodiments, the first plasma is distal. In some embodiments, the first plasma is direct. In some embodiments, the first plasma is a hybrid of distal and direct. In some embodiments, the first plasma is an RF plasma. In some embodiments, the RF frequency is selected from about 2 MHz, about 13.56 MHz, about 27 MHz, about 40 MHz, or about 60 MHz. In some embodiments, the RF frequency is in the range of about 2 MHz to about 60 MHz. In some embodiments, the first plasma has a power in the range of about 100 W to about 1000 W, about 100 W to about 500 W, or about 500 W to about 1000 W. In some embodiments, the first plasma has a bias power in the range of 0 W to about 500 W. In some embodiments, the substrate 200 is maintained at a predetermined temperature during exposure to the first plasma. In some embodiments, the predetermined temperature is in the range of about 20 degrees Celsius to about 400 degrees Celsius, in the range of about 20 degrees Celsius to about 200 degrees Celsius, or in the range of about 200 degrees Celsius to about 400 degrees Celsius. In some embodiments, the substrate 300 is exposed to a first plasma under pressure ranging from 0.1 mTorr to 1 Torr. In some embodiments, the pressure is ranging from 0.1 mTorr to 0.1 Torr, from 0.1 mTorr to 10 mTorr, or from 0.1 mTorr to 1 mTorr. As described above, method 100 continues to operation 120. At operation 120, a liner layer 330 is deposited. In some embodiments, operation 120 does not change the thickness T of the treated barrier layer 323. B2 . As described above, the method continues to operation 130. At operation 130, the liner layer 330 and the treated barrier layer 323 are treated to form the treated liner layer 335 and the treated barrier layer 325, also referred to as the treated composite. The inventors were surprised to find that, in addition to the advantages mentioned above, when the barrier layer was treated as disclosed in operation 115, the thickness T of the treated barrier layer 325 was increased. B3 The thickness T is less than that of the treated barrier layer 323. B2 In some embodiments, the thickness T of the treated barrier layer 323 is... B2 The thickness was reduced by up to 1 Å. In some embodiments, the thickness was reduced by 0.1 Å to 1 Å, 0.2 Å to 1 Å, or 0.5 Å to 1 Å. The inventors were also surprised to find that, in addition to the advantages described above, when the barrier layer and the padding layer are treated as disclosed in operation 130, the thickness of the resulting treated composite is less than the thickness of the barrier layer 220 and the padding layer 230. In some embodiments, the thickness of the treated composite is at most 3 Å less than the combined thickness of the barrier layer 220 and the padding layer 230 before operation 130. In some embodiments, the thickness is reduced by 0.5 Å to 3 Å, 1 Å to 3 Å, or 2 Å to 3 Å. Throughout this specification, references to "one embodiment," "some embodiments," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with that embodiment is included in at least one embodiment of this disclosure. Therefore, phrases such as "in one or more embodiments," "in some embodiments," "in one embodiment," or "in one embodiment" appearing in different places throughout the specification do not necessarily refer to the same embodiment of this disclosure. Furthermore, in one or more embodiments, a particular feature, structure, material, or characteristic may be combined in any suitable manner. Although this disclosure has been described with reference to specific embodiments, those skilled in the art will understand that the described embodiments are merely illustrative of the principles and applications of this disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the methods and apparatus of this disclosure without departing from the spirit and scope of this disclosure. Therefore, this disclosure may include modifications and variations falling within the scope of the appended claims and their equivalents. 100: Method 110~140: Operation 200: Substrate 205: Substrate Surface 210: Feature 212: Opening 214: Sidewall 215: Top Surface 216: Bottom 220: Barrier Layer 225: Treated Barrier Layer 230: Pad Layer 235: Treated Pad Layer 240: Metal Filler 300: Substrate 320: Barrier Layer 323: Treated Barrier Layer 325: Treated Barrier Layer 330: Pad Layer 335: Treated Pad Layer W: Width D: Depth B: Region T B1 Thickness T B2 Thickness T B3 :thickness To gain a detailed understanding of the features described above, a more specific description of the present disclosure can be provided with reference to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical embodiments of the present disclosure and should not be considered as limiting its scope, as the present disclosure may allow for other equivalent embodiments. Figure 1 illustrates the processing flow of a method according to one or more embodiments of the present disclosure; Figures 2A to 2E illustrate a substrate during processing according to one or more embodiments of this disclosure; and Figures 3A to 3E illustrate the substrate during various stages of processing according to one or more embodiments of the present disclosure. For ease of understanding, the same element symbols are used as much as possible to represent common elements in the drawings. It is contemplated that elements and features of one embodiment may be advantageously incorporated into other embodiments without further description. Domestic storage information (please note in order of storage institution, date, and number): None. International storage information (please note in order of storage country, institution, date, and number): None. 100: Method 110~140: Operation

Claims

1. A method for forming an electrical interconnect, the method comprising the steps of: forming a barrier layer within a feature of a substrate; forming a pad layer on the barrier layer; and treating both the pad layer and the barrier layer during a plasma treatment process to form a treated composite and modify the composition and properties of both the pad layer and the barrier layer, wherein the barrier layer was not densified prior to the deposition of the pad layer.

2. The method as described in claim 1, wherein the step of disposing of the liner layer and the barrier layer includes the step of exposing the liner layer to a second plasma formed from a second plasma gas comprising hydrogen.

3. The method as described in claim 2, wherein the second plasma gas further comprises a rare gas.

4. The method as described in claim 3, wherein the rare gas is substantially composed of argon.

5. The method as described in claim 2, wherein the second plasma is an inductively coupled RF plasma.

6. The method as described in claim 2, wherein the liner layer is exposed to the second plasma under pressure in the range of 0.1 mTorr to 1 Torr.

7. The method as claimed in claim 1, wherein the method reduces the resistivity of the treated composite compared to the untreated barrier layer and the padding layer.

8. The method as described in claim 1, wherein the step of treating the pad layer and the barrier layer increases a grain size of the pad layer.

9. The method as claimed in claim 1, wherein the step of treating the liner layer and the barrier layer provides a thickness of the treated composite that is at most 3 Å smaller than the cumulative thickness of the liner layer and the barrier layer before treatment.

10. The method as described in claim 1, further comprising the step of: depositing a metal filler on the treated composite within the substrate feature.

11. The method as described in claim 10, wherein the metal filler has no substantial voids.

12. The method as described in claim 10, wherein the metal filler is deposited by PVD in the same chamber as the treatment of the liner layer and the barrier layer.

13. A method of forming an electrical interconnect, the method comprising the steps of: forming a barrier layer within a feature of a substrate; treating the barrier layer to form a treated barrier layer; forming a pad layer on the treated barrier layer; and treating both the pad layer and the treated barrier layer during a plasma treatment process to form a treated composite and modify the composition and properties of both the pad layer and the treated barrier layer.

14. The method as described in claim 13, wherein the step of disposing of the barrier layer includes the step of exposing the barrier layer to a first plasma formed from a first plasma gas consisting substantially of argon.

15. The method as described in claim 13, wherein the step of treating the padding layer and the treated barrier layer reduces the thickness of the treated barrier layer and / or the padding layer in the treated composite.

16. The method as described in claim 15, wherein the thickness of the treated barrier layer and / or the padding layer is reduced by a maximum of 3 Å.

17. The method as described in claim 13, wherein the step of treating the liner layer and the treated barrier layer includes the step of exposing the liner layer to a second plasma formed from a second plasma gas comprising hydrogen.

18. The method as described in claim 17, wherein the second plasma gas further comprises a rare gas.

19. The method as described in claim 18, wherein the rare gas is substantially composed of argon.

20. The method as described in claim 17, wherein the second plasma is an inductively coupled RF plasma.

21. The method as described in claim 17, wherein the liner layer is exposed to the second plasma under pressure in the range of 0.1 mTorr to 1 Torr.

Citation Information

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