Static random access memory device

TWI943327BActive Publication Date: 2026-10-21UNITED MICROELECTRONICS CORP
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Patent Information

Application Number
TW114105724
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-02-17
Publication Date
2026-10-21
Estimated Expiration
2045-02-16

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  • Figure TWG2TB001917064_001
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    Figure TWG2TB001917064_002
  • Figure TWG2TB001917064_003
    Figure TWG2TB001917064_003
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Abstract

This invention discloses a static random access memory (SRAM) element, which mainly includes a first fin structure and a second fin structure extending along a first direction on a substrate, a first dummy fin structure disposed between the first fin structure and the second fin structure, a third fin structure and a fourth fin structure extending along the first direction beside the second fin structure, and a second dummy fin structure disposed between the second fin structure and the third fin structure.
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Claims

1. A static random access memory (SRAM) element, characterized in that it comprises: a first fin structure and a second fin structure extending along a first direction on a substrate; a first dummy fin structure disposed between the first fin structure and the second fin structure, wherein the first dummy fin structure is shorter than the first fin structure; a third fin structure and a fourth fin structure extending along the first direction beside the second fin structure; and a second dummy fin structure disposed between the second fin structure and the third fin structure, wherein the second dummy fin structure is shorter than the third fin structure; wherein no dummy fin structure is disposed between the third fin structure and the fourth fin structure; and wherein the third fin structure and the fourth fin structure are shorter than the first fin structure and the second fin structure, and longer than the first dummy fin structure and the second dummy fin structure.

2. The static random access memory element as described in claim 1 further comprises: a fifth fin structure and a sixth fin structure extending along the first direction beside the fourth fin structure; a third dummy fin structure disposed between the fourth fin structure and the fifth fin structure; and a fourth dummy fin structure disposed between the fifth fin structure and the sixth fin structure.

3. The static random access memory element as described in claim 2, wherein the first dummy fin structure and the fourth dummy fin structure have the same length.

4. The static random access memory element as described in claim 2, wherein the second dummy fin structure and the third dummy fin structure have the same length.

5. The static random access memory element as described in claim 2, wherein the third dummy fin structure and the fourth dummy fin structure have the same length.

6. The static random access memory element as described in claim 1, wherein the first dummy fin structure and the second dummy fin structure have the same length.

7. The static random access memory element as described in claim 1, wherein the first fin structure and the second fin structure contain the same conductivity type.

8. The static random access memory element as described in claim 1, wherein the second fin structure and the third fin structure comprise different conductivity types.

9. The static random access memory element as described in claim 1, wherein the third fin structure and the fourth fin structure contain the same conductivity type.

Citation Information

Patent Citations

  • Static random access memory

    TW201715703A

  • Static random-access memory (SRAM) cell array and forming method thereof

    US20180006040A1

  • Method and device to reduce finfet SRAM contact resistance

    US20190181145A1