Miniaturized packaging test socket

TWI943329BActive Publication Date: 2026-10-21JGTECHNOLOGYCO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
TW114106235
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-02-20
Publication Date
2026-10-21
Estimated Expiration
2045-02-19

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

The miniaturized packaging test socket of the present invention includes: an upper test socket having a Double Data Rate (DFR) memory installed inside the upper test socket, and an upper socket attached to the bottom of the upper test socket, the upper socket having an inner cavity corresponding to the DFR memory, the inner cavity having conductive adhesive; and a lower test socket having a lower slot for the upper socket to be inserted into, the lower slot having a plurality of probes, each probe having an electrically connected chip; wherein the conductive adhesive is electrically connected between the DFR memory and the chip.
Need to check novelty before this filing date? Find Prior Art

Claims

1. A miniaturized packaged test socket, comprising: The upper test socket has a Double Data Rate (DFR) memory installed inside it and an upper socket attached to the bottom of the upper test socket. The upper socket has an inner cavity corresponding to the DFR memory. Conductive adhesive, in the form of an adhesive strip, is longitudinally disposed in the inner cavity. The lower test socket has a lower slot for insertion into the upper socket. The lower slot is provided with a plurality of probes, each probe having an electrically connected chip. The surface of the DFR memory has a plurality of conductive solder balls, and the conductive adhesive is directly electrically connected between each conductive solder ball and the chip.

2. The miniaturized packaging test socket as described in claim 1, wherein the conductive adhesive may be a plurality of adhesive strips, each of which is spaced apart on both sides of the inner cavity.

3. The miniaturized packaged test socket as described in claim 1, wherein the conductive adhesive contains a plurality of conductive particles arranged along the thickness direction within an elastic insulating material.

4. The miniaturized packaging test socket as described in claim 1, wherein the conductive adhesive contains a plurality of conductive particles with different densities.

5. A miniaturized packaging test socket, comprising: The upper test socket has a Double Data Rate (DFR) memory installed inside it, and an upper socket attached to the bottom of the upper test socket. The upper socket has an inner cavity corresponding to the DFR memory. Conductive adhesive is applied to the inner cavity. The lower test socket has a lower slot for the upper socket to be inserted into. The lower slot is provided with a plurality of probes, each probe having an electrically connected chip. The surface of the DFR memory has a plurality of conductive solder balls, and the conductive adhesive is directly electrically connected between each conductive solder ball and the chip.

6. The miniaturized packaged test socket as described in claim 5, wherein the conductive adhesive contains a plurality of conductive particles arranged along the thickness direction within an elastic insulating material.

7. The miniaturized packaging test socket as described in claim 5, wherein the conductive adhesive contains a plurality of conductive particles with different densities.

Citation Information

Patent Citations

  • Rubber socket for testing semiconductor package and method for manufacturing the same

    KR1020230082097A

  • Test apparatus for semiconductor package

    TWI760155B