Electronic package and substrate thereof
Patent Information
- Application Number
- TW114114592
- Authority / Receiving Office
- TW · TW
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2025-04-17
- Publication Date
- 2026-10-21
- Estimated Expiration
- 2045-04-16
Smart Images

Figure TWG2TB001917156_001 
Figure TWG2TB001917156_002 
Figure TWG2TB001917156_003
Abstract
Claims
1. A substrate structure, comprising: A substrate body has a crystal placement region defined on one of its surfaces; The first contact pad and the second contact pad are disposed within the crystal placement area; The first parallel conductive module and the second parallel conductive module are respectively disposed at different positions within the substrate body, and the adjacent first parallel conductive module and the second parallel conductive module are each connected to the first contact pad and the second contact pad; wherein the first parallel conductive module and the second parallel conductive module have different numbers of shunt holes, and the number of shunt holes of the first parallel conductive module connected to the first contact pad at a distance farther from the edge of the crystal placement area is greater than the number of shunt holes of the second parallel conductive module connected to the second contact pad at a distance closer to the edge of the crystal placement area.
2. The substrate structure as described in claim 1, wherein, The substrate body can be a substrate with a core layer or a substrate without a core layer.
3. The substrate structure as described in claim 1, wherein, The first contact pad is used for signal transmission, and the second parallel conductive module is used to provide power and is electrically connected to the second contact pad used for power supply.
4. The substrate structure as described in claim 1, wherein, The first parallel conductive module or the second parallel conductive module further includes a first shunt line, a second shunt line, and a conductive hole.
5. The substrate structure as described in claim 4, wherein, The conductive hole has two opposite ends, the shunt hole is adjacent to the conductive hole and has two opposite ends, and the conductive hole and the shunt hole are connected to the first shunt line at one end on the same side, and the conductive hole and the shunt hole are connected to the second shunt line at the other end on the other side.
6. The substrate structure as described in claim 4, wherein, The first shunt line is connected to the first contact pad or the second contact pad, and the second shunt line is connected to the wiring layer inside the substrate.
7. The substrate structure as described in claim 1, wherein, The substrate body has the first parallel conductive module, the second parallel conductive module and a third parallel conductive module formed therein.
8. The substrate structure as described in claim 7, wherein, The distance between the first contact pad connected to the first parallel conductive module and the edge of the crystal placement area is different from the distance between the third contact pad connected to the third parallel conductive module and the edge of the crystal placement area.
9. The substrate structure as described in claim 1, wherein, The shunt hole is in the form of a conductive blind hole.
10. The substrate structure as described in claim 1, wherein, The substrate body includes an insulating layer and a wiring layer bonded to the insulating layer.
11. An electronic package, comprising: A substrate structure includes a substrate body with a die-placement area defined on its surface, a first contact pad and a second contact pad disposed within the die-placement area, and a first parallel conductive module and a second parallel conductive module disposed within the substrate body and respectively connected to the first contact pad and the second contact pad, wherein adjacent first parallel conductive modules and second parallel conductive modules are respectively disposed at different positions within the substrate body, and adjacent first parallel conductive modules and second parallel conductive modules are each connected to the first contact pad and the second contact pad; and an electronic component disposed in the die-placement area of the substrate structure and electrically connected to the first contact pad and the second contact pad; wherein the first parallel conductive module and the second parallel conductive module each have a different number of shunt holes, and the number of shunt holes of the first parallel conductive module connected to the first contact pad at a greater distance from the edge of the die-placement area is greater than the number of shunt holes of the second parallel conductive module connected to the second contact pad at a closer distance from the edge of the die-placement area.
12. The electronic package as described in claim 11, wherein, The substrate body can be a substrate with a core layer or a substrate without a core layer.
13. The electronic package as described in claim 11, wherein, The first contact pad is used for signal transmission, and the second parallel conductive module is used to provide power and is electrically connected to the second contact pad used for power supply.
14. The electronic package as described in claim 11, wherein, The first parallel conductive module or the second parallel conductive module further includes a first shunt line, a second shunt line, and a conductive hole.
15. The electronic package as described in claim 14, wherein, The conductive hole has two opposite ends, and the shunt hole is adjacent to the conductive hole and has two opposite ends. The conductive hole and the shunt hole are connected to the first shunt line at one end on the same side, and the conductive hole and the shunt hole are connected to the second shunt line at the other end on the other side.
16. The electronic package as described in claim 14, wherein, The first shunt line is connected to the first contact pad or the second contact pad, and the second shunt line is connected to the wiring layer inside the substrate.
17. The electronic package as described in claim 11, wherein, The substrate body has the first parallel conductive module, the second parallel conductive module and a third parallel conductive module formed therein.
18. The electronic package as described in claim 17, wherein, The distance between the first contact pad connected to the first parallel conductive module and the edge of the crystal placement area is different from the distance between the third contact pad connected to the third parallel conductive module and the edge of the crystal placement area.
19. The electronic package as described in claim 11, wherein, The shunt hole is in the form of a conductive blind hole.
20. The electronic package as described in claim 11, wherein, The substrate body includes an insulating layer and a wiring layer bonded to the insulating layer.
Citation Information
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