Semiconductor device and method of manufacturing the same

Abstract

The interposer die includes a first semiconductor layer, an insulating layer on the first semiconductor layer, and a second semiconductor layer on the insulating layer and separated from the first semiconductor layer by the insulating layer. The interposer die includes a first through-hole extending from the top surface of the second semiconductor layer through the insulating layer to the bottom surface of the first semiconductor layer.

Claims

1. A method for manufacturing a semiconductor device, comprising: An via is formed in an interposer, extending through a first semiconductor layer, an insulating layer on the first semiconductor layer, and a second semiconductor layer of the interposer; a deep trench capacitor is formed in the second semiconductor layer; a dielectric stack of the interposer is formed on the second semiconductor layer; and a plurality of metal interconnects and a conductive via are formed in the dielectric stack, wherein the conductive via extends through the dielectric stack and directly contacts a top surface of the second semiconductor layer above the insulating layer, and is configured to supply a ground voltage to the top surface of the second semiconductor layer.

2. The method as described in claim 1, further comprising: Before forming the via through the semiconductor, the insulating layer is formed by depositing a dielectric material on the first semiconductor layer; And before forming the via through the semiconductor, the second semiconductor layer is formed by performing an epitaxial growth on the insulating layer.

3. The method as described in claim 1, further comprising: Before forming the via through the semiconductor, the insulating layer is formed by performing an ion implantation process on the first semiconductor layer; The second semiconductor layer is formed by performing an epitaxial growth process on the insulating layer.

4. The method as described in claim 1, further comprising: Before forming the via through the semiconductor, the insulating layer is formed by performing a diffusion process on the first semiconductor layer; The second semiconductor layer is formed by performing an epitaxial growth process on the insulating layer.

5. A method for manufacturing a semiconductor device, comprising: A first through-semiconductor via is formed, extending through a top semiconductor layer of an interposer, through an insulating layer of the interposer below the top semiconductor layer, and into a bottom semiconductor layer below the insulating layer; a deep trench capacitor is formed in the top semiconductor layer, and the first through-semiconductor via electrically couples to a first electrode of the deep trench capacitor; the deep trench capacitor is charged; while charging the deep trench capacitor, the first through-semiconductor via is exposed by performing a chemical mechanical planarization process on a back side of the bottom semiconductor layer; a dielectric stack of the interposer is formed on the top semiconductor layer; and a plurality of metal interconnects and a conductive via are formed in the dielectric stack, wherein the conductive via extends through the dielectric stack and directly contacts a top surface of the top semiconductor layer above the insulating layer, and is configured to supply a ground voltage to the top surface of the top semiconductor layer.

6. The method as described in claim 5, further comprising: A second through-semiconductor via is formed, which passes through the top semiconductor layer, through the insulating layer and into the bottom semiconductor layer, wherein a second electrode of the deep trench capacitor is coupled to the second through-semiconductor via; and the second through-semiconductor via is exposed via the chemical mechanical planarization process.

7. A semiconductor device, comprising: A first integrated circuit die includes: a first semiconductor layer; an insulating layer thereon on the first semiconductor layer; a second semiconductor layer thereon on the insulating layer and spaced apart from the first semiconductor layer by the insulating layer; a first through-semiconductor via extending from a top surface of the second semiconductor layer through the insulating layer to a bottom surface of the first semiconductor layer; a dielectric layer thereon on the second semiconductor layer; and a conductive via extending through the dielectric layer and directly contacting the top surface of the second semiconductor layer above the insulating layer, and configured to supply a ground voltage to the top surface of the second semiconductor layer.

8. The semiconductor device as claimed in claim 7, wherein the first integrated circuit die comprises: A second through-hole extends from the top surface of the second semiconductor layer through the insulating layer to the bottom surface of the first semiconductor layer; And a deep trench capacitor, comprising: a first electrode extending from the top surface of the second semiconductor layer into the second semiconductor layer and electrically coupled to the first through-hole through the semiconductor; And a second electrode that extends from the top surface of the second semiconductor layer into the second semiconductor layer and is electrically coupled to the second through-hole through the semiconductor.

9. The semiconductor device as claimed in claim 8, wherein the first electrode and the second electrode extend through the insulating layer into the first semiconductor layer.

10. The semiconductor device as claimed in claim 8, wherein the insulating layer is below a bottom of the first electrode and a bottom of the second electrode.

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