Packaging substrate and methods of fabricating the same

Abstract

The packaging substrate according to an embodiment includes: a core layer; a first conductive layer disposed in contact with the upper surface of the core layer; and an adhesion enhancement layer disposed on the core layer and surrounding at least a portion of the first conductive layer. The adhesion enhancement layer includes one selected from the group consisting of silicon compounds, acrylic compounds, and combinations thereof. The arithmetic mean roughness Ra value of the upper surface of the first conductive layer is 150 nm or less. In this case, the adhesion between the first conductive layer and the insulating layer can be effectively improved without excessively roughening the first conductive layer.

Description

[Technical Field]

[0001] The embodiments involve packaging substrates and their manufacturing methods, etc. [Previous Technology]

[0002] In the manufacture of electronic components, the process of implementing circuits on semiconductor wafers is called the front-end (FE) process, and the process of assembling the wafers into a state that can be used in actual products is called the back-end (BE) process, which includes the packaging process.

[0003] In recent years, the four core technologies of the semiconductor industry, which have enabled the rapid development of electronic products, are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology is developing in various forms, such as linewidths of nanometers below the micrometer level, more than ten million cells, high-speed operation, and the release of large amounts of heat, but it still lacks the technical support for relatively complete packaging of the above-mentioned semiconductors. Therefore, the electrical performance of semiconductors sometimes depends on packaging technology and corresponding electrical connections, rather than on the performance of the semiconductor technology itself.

[0004] Ceramic or resin is used as the material for the packaging substrate. With ceramic substrates, it is difficult to mount high-performance, high-frequency semiconductor devices due to their high resistance or high dielectric constant. With resin substrates, while relatively high-performance, high-frequency semiconductor devices can be mounted, there are limitations in reducing the spacing between wirings.

[0005] Recently, research has been conducted on applying silicon or glass to high-end packaging substrates. By forming through-holes on silicon or glass substrates and applying conductive materials to these through-holes, the wiring length between the device and the mother substrate can be shortened, and excellent electrical characteristics can also be obtained.

[0006] Prior art documents: Korean Patent Publication No. 10-2021-0127188. [Summary of the Invention]

[0007] [The problem the invention aims to solve]

[0008] The purpose of this embodiment is to provide a packaging substrate that improves the adhesion between the conductive layer and the insulating layer without excessively roughening the conductive layer.

[0009] [Means used to solve problems]

[0010] An encapsulation substrate according to an embodiment of this specification includes: a core layer; a first conductive layer, which is a conductive layer disposed in contact with the upper surface of the core layer; and an attachment reinforcement layer disposed on the core layer and surrounding at least a portion of the upper surface of the first conductive layer.

[0011] The above-mentioned adhesion reinforcement layer includes one selected from the group consisting of silicon compounds, acrylic compounds and combinations thereof.

[0012] The arithmetic mean roughness Ra value of the upper surface of the first conductive layer is less than 150 nm.

[0013] The above-mentioned silicon compounds may include organosilicone resins.

[0014] The maximum height roughness Ry value of the upper surface of the first conductive layer can be below 200 nm.

[0015] The core layer mentioned above can be a glass core layer.

[0016] The upper surface of the core layer may include an exposed area, which is the area where the first conductive layer is not formed.

[0017] The aforementioned attachment reinforcement layer may be disposed in contact with at least a portion of the aforementioned exposed area.

[0018] The core layer may include a cavity portion, which is a region for installing a device therein.

[0019] The cavity may include an opening disposed on the upper surface side of the core layer, an inner cavity side extending from the opening along the thickness direction of the core layer, and a device mounting space surrounded by the inner cavity side.

[0020] The above-mentioned packaging substrate may also include a device arranged in the device mounting space.

[0021] The above-mentioned adhesion reinforcement layer may be disposed in contact with at least a portion of the upper surface of the above-mentioned device.

[0022] The thickness of the above-mentioned adhesion reinforcement layer can be from 1 μm to 25 μm.

[0023] The above-mentioned packaging substrate may further include an insulating layer disposed in contact with the above-mentioned attachment reinforcement layer.

[0024] The above-mentioned packaging substrate may include multiple insulating layers, the multiple insulating layers including the above-mentioned adhesion enhancement layer and the above-mentioned insulating layer.

[0025] The adhesion between the first conductive layer and the multilayer insulating layer can be 300 gf / cm or more.

[0026] A method for manufacturing a package substrate according to another embodiment of this specification includes: a preparation step of preparing a pre-substrate including a core layer and a first conductive layer disposed in contact with the upper surface of the core layer; an attachment reinforcement layer forming step of forming an attachment reinforcement layer surrounding at least a portion of the upper surface of the first conductive layer; and a manufacturing step of manufacturing a package substrate from the pre-substrate having the attachment reinforcement layer formed thereon.

[0027] The surface roughness Ra value of the upper surface of the first conductive layer is less than 150 nm.

[0028] The above-mentioned adhesion reinforcement layer includes one selected from the group consisting of silicon compounds, acrylic compounds and combinations thereof.

[0029] The above preparation steps may include a surface roughness control process for adjusting the roughness of the upper surface of the first conductive layer.

[0030] The above-mentioned adhesion reinforcement layer forming step may include: a process of arranging the composition for manufacturing the adhesion reinforcement layer in such a way as to surround at least a portion of the upper surface of the first conductive layer; and a process of heat-treating the composition for manufacturing the adhesion reinforcement layer to form the adhesion reinforcement layer.

[0031] The above manufacturing steps may include an insulating layer forming process for forming an insulating layer disposed in contact with the upper surface of the above-attached reinforcing layer.

[0032] [Effects of the Invention]

[0033] The embodiment can improve the adhesion between the conductive layer and the insulating layer without making the conductive layer excessively rough in the packaging substrate.

Implementation Method

[0035] Hereinafter, several embodiments will be described in detail with reference to the accompanying drawings to enable those skilled in the art to easily implement the embodiments. However, the present invention can be implemented in many different ways and is not limited to the embodiments described in this specification. Throughout the specification, the same or similar elements are given the same reference numerals.

[0036] Throughout this specification, the term “combination of” included in the Markush-type description means a mixture or combination of one or more constituent elements selected from the group of constituent elements of the Markush-type description, thereby implying that it includes one or more constituent elements selected from the group of the aforementioned constituent elements.

[0037] Throughout this specification, unless otherwise specified, terms such as “first,” “second,” or “A,” “B,” etc., are used to distinguish them from each other. Furthermore, unless explicitly distinguished in the text, singular expressions include plural expressions.

[0038] In this specification, “~” can refer to a compound that includes a compound corresponding to “~” or a derivative of “~”.

[0039] In this specification, B being located on A means that B is located on A in direct contact or in the presence of other layers in between, and should not be limited to the meaning of B being located on the surface of A in contact.

[0040] In this specification, the meaning of A connected to B is that A and B are directly connected or that A and B are connected by other constituent elements, unless otherwise stated, the interpretation is not limited to the direct connection between A and B.

[0041] Unless otherwise specified, the use of the singular in this specification shall be interpreted as including the meaning of the singular or plural as interpreted in the context.

[0042] In this specification, the shapes, relative dimensions, angles, etc. of each component in the drawings are exemplary and may be exaggerated for illustrative purposes, but the scope of the claims is not to be construed as limited to the drawings.

[0043] In this specification, “A and B are adjacent” means “A and B are in contact with each other” or “A and B are not in contact but are close to each other”. In this specification, unless otherwise specified, the expression “A and B are adjacent” should not be construed as limited to “A and B are in contact with each other”.

[0044] Unless otherwise stated in the specification, the physical property values ​​of each structural element within the package substrate are interpreted as values ​​measured at room temperature. Room temperature is 20°C to 25°C.

[0045] The implementation method will be described in detail below.

[0046] FIG1 is a cross-sectional view illustrating a packaging substrate according to an embodiment. Hereinafter, the embodiment will be described with reference to FIG1.

[0047] The packaging substrate 100 according to the embodiment includes: a core layer 10; a first conductive layer 20, which is a conductive layer disposed in contact with the upper surface of the core layer 10; and an attachment reinforcement layer 30, disposed on the core layer 10 and surrounding at least a portion of the upper surface of the first conductive layer 20.

[0048] [Core Layer]

[0049] The core layer 10 may have a substrate shape. As the core layer 10, a substrate that can be used in the field of packaging substrates may be adopted.

[0050] The core layer 10 may include a through hole (not shown in the figure) extending along the thickness direction of the core layer 10.

[0051] The through-hole may include an internal space (not shown in the figure) and an inner diameter surface of the through-hole (not shown in the figure) surrounding the internal space. The internal space is an empty space, and the inner diameter surface of the through-hole refers to the surface of the core layer 10 formed inside the through-hole.

[0052] The via may have a diameter that varies along the thickness direction of the core layer 10. The via may have a substantially uniform diameter along the thickness direction of the core layer 10.

[0053] The surface of the core layer 10 may include: an upper surface; and a side surface connected to the upper surface and formed along the thickness direction of the core layer 10. The surface of the core layer 10 may include a lower surface opposite to the upper surface.

[0054] “The above-mentioned side surface is formed along the thickness direction of the core layer 10” not only means that the above-mentioned side surface is perpendicular to the upper surface of the core layer 10, but also means that at least a portion of the above-mentioned side surface forms an angle other than 90 degrees (tilt angle) with the above-mentioned upper surface.

[0055] The aforementioned side surface can be a plane or a curved surface.

[0056] The core layer 10 may be a glass core layer. The glass core layer may have physical properties suitable for realizing a conductive layer with fine spacing.

[0057] The glass core layer can have the shape of a glass substrate. The upper surface of the glass core layer can be, for example, made of alkaline borosilicate flat glass, alkali-free borosilicate flat glass, alkali-free alkaline earth metal borosilicate flat glass, etc., as long as it is a flat glass used in electronic components. As the glass core layer, it can be used as a glass substrate for electronic devices; for example, products manufactured by Schott, AGC, Corning, etc., can be used, but it is not limited to these.

[0058] The thickness of the core layer 10 may be 100 μm or more. The thickness may be 200 μm or more. The thickness may be 300 μm or more. The thickness may be 3000 μm or less. The thickness may be 2000 μm or less. The thickness may be 1000 μm or less. In this case, the core layer 10 may have mechanical properties suitable for application to the packaging substrate 100.

[0059] [Conductive Layer]

[0060] The packaging substrate 100 may include a conductive layer disposed on the core layer 10. The conductive layer may include a first conductive layer 20 disposed in contact with the upper surface of the core layer 10 and a second conductive layer (not shown in the figure) disposed on the first conductive layer 20.

[0061] The conductive layer is a wire that transmits electrical signals. The conductive layer may have a patterned shape.

[0062] The conductive layer may include a conductive material. The conductive layer may have more than one layer. The conductive layer may include a seed layer (not shown in the figure) and a conductive layer (not shown in the figure) formed on the seed layer.

[0063] A seed layer may be disposed on the upper surface of the core layer 10 or between the insulating layer (not shown) and the conductive layer to improve the adhesion of the conductive layer to the upper surface of the core layer 10. The seed layer may include a first seed layer disposed in contact with the upper surface of the core layer 10 or the upper surface of the insulating layer, and a second seed layer disposed on the first seed layer. The first seed layer may be made of a material different from the material applied to the conductive layer. For example, the first seed layer may include titanium, chromium, nickel, etc. The second seed layer may be made of the same material as the material applied to the conductive layer. For example, the second seed layer may include copper.

[0064] The conductive layer may function as a path for transmitting signals within the package substrate 100. The conductive layer may include at least one of copper, nickel, aluminum, gold, or silver. The material of the conductive layer may be copper, etc.

[0065] The first conductive layer 20 may include an upper surface. The arithmetic mean roughness Ra value of the upper surface of the first conductive layer 20 may be below 40 nm.

[0066] To improve the adhesion between the conductive layer and the insulating layer, the surface of the conductive layer can be roughened. However, when a high-frequency electric current is applied to the conductive layer with a roughness of a certain degree, the resistance of the conductive layer may become too high due to the skin effect.

[0067] In this embodiment, the surface roughness characteristics of the conductive layer, particularly the upper surface of the first conductive layer 20, can be adjusted to a certain extent, and an adhesion enhancement layer 30, which will be described in detail below, can be introduced. In this way, a sufficient amount of adhesion enhancement layer can be maintained on the upper surface of the first conductive layer 20, thereby improving the adhesion between the first conductive layer 20 and the insulating layer, while providing a first conductive layer 20 suitable for high-frequency power.

[0068] The arithmetic mean roughness Ra value of the upper surface of the first conductive layer 20 can be less than 150 nm. The Ra value can be less than 120 nm. The Ra value can be less than 100 nm. The Ra value can be 25 nm or more. The Ra value can be 35 nm or more. The Ra value can be 45 nm or more.

[0069] The maximum height roughness Ry value of the upper surface of the first conductive layer 20 can be less than 200 nm. The aforementioned Ry value can be less than 180 nm. The aforementioned Ry value can be less than 160 nm. The aforementioned Ry value can be greater than 20 nm.

[0070] In this case, even if high-frequency power is applied, the first conductive layer 20 can still transmit signals smoothly.

[0071] The above Ra and Ry values ​​are measured in accordance with the ISO4287:1997 standard.

[0072] The thickness of the first conductive layer 20 may be 10 μm or more. The thickness may be 15 μm or more. The thickness may be 20 μm or more. The thickness may be 50 μm or less.

[0073] The width of the first conductive layer 20 may be 10 μm or more. The width may be 15 μm or more. The width may be 20 μm or more. The width may be 50 μm or less.

[0074] In this case, it can help to realize a package substrate 100 with high integration and stable electrical reliability.

[0075] The packaging substrate 100 may include a second conductive layer disposed on the first conductive layer 20. The second conductive layer may be identical to the first conductive layer 20 in terms of composition, roughness, and layer structure. The description of the composition, roughness, and layer structure of the second conductive layer is repeated above and therefore omitted here.

[0076] The thickness and / or width of the second conductive layer may be less than or equal to the thickness and / or width of the first conductive layer 20. In this case, a packaging substrate 100 capable of easy electrical connection to a device can be provided.

[0077] The packaging substrate 100 may further include a third conductive layer as a conductive layer disposed below the core layer 10. The description of the composition, roughness and layer structure of the third conductive layer is repeated above, and therefore omitted here.

[0078] The thickness and / or width of the third conductive layer may be greater than or equal to the thickness and / or width of the first conductive layer 20. In this case, the packaging substrate 100 can smoothly transmit signals with the mother substrate.

[0079] [Adhesion Reinforcement Layer]

[0080] In this embodiment, an adhesion enhancement layer 30 may be introduced on the upper surface side of the first conductive layer 20. The adhesion enhancement layer 30 may be disposed between the first conductive layer 20 and the insulating layer. Even if the first conductive layer 20 has a relatively smooth surface, the adhesion enhancement layer 30 can ensure that the insulating layer has a stable adhesion to the first conductive layer 20.

[0081] The attachment reinforcement layer 30 may be disposed on the core layer 10. The attachment reinforcement layer 30 may surround at least a portion of the upper surface of the first conductive layer 20. The attachment reinforcement layer 30 may surround the upper surface of the first conductive layer 20. The attachment reinforcement layer 30 may surround at least a portion of the side surface of the first conductive layer 20. The attachment reinforcement layer 30 may surround the side surface of the first conductive layer 20.

[0082] The attachment reinforcement layer 30 may be in contact with and surround the first conductive layer 20. Alternatively, the attachment reinforcement layer 30 may surround the first conductive layer 20 in a manner that maintains a distance from it.

[0083] The embodiment may further include an adhesion enhancement layer 30 introduced onto the upper surface side of the second conductive layer. The adhesion enhancement layer 30 may be disposed between the second conductive layer and the insulating layer. In this case, even without excessive roughening of the second conductive layer, the insulating layer can exhibit stable adhesion to the second conductive layer.

[0084] The attachment reinforcement layer 30 may surround at least a portion of the upper surface of the second conductive layer. The attachment reinforcement layer 30 may surround the upper surface of the second conductive layer. The attachment reinforcement layer 30 may surround at least a portion of the side surface of the second conductive layer. The attachment reinforcement layer 30 may surround the side surface of the second conductive layer.

[0085] The attachment reinforcement layer 30 may be in contact with and surround the second conductive layer. The attachment reinforcement layer 30 may be spaced apart from and surround the second conductive layer.

[0086] The adhesion reinforcement layer 30 formed in contact with the second conductive layer may be disposed on the adhesion reinforcement layer 30 formed in contact with the first conductive layer 20. The adhesion reinforcement layer 30 formed in contact with the second conductive layer may be a separate layer from the adhesion reinforcement layer 30 formed in contact with the first conductive layer 20.

[0087] The upper surface of the core layer 10 may include an exposed region EA, which is the region where the first conductive layer 20 is not formed. The attachment reinforcement layer 30 may be arranged to be in contact with at least a portion of the exposed region EA.

[0088] The upper surface of the core layer 10 may have low roughness characteristics to accurately achieve fine patterns. In this case, sufficient anchoring may not occur at the junction of the core layer 10 and the insulating layer, and the insulating layer may not exhibit sufficient adhesion to the upper surface of the core layer 10.

[0089] The embodiment can be illustrated by arranging the attachment reinforcement layer 30 in contact with at least a portion of the exposed area EA to show that the insulating layer remains stable in the exposed area EA.

[0090] The adhesion reinforcement layer 30 may be arranged to be in contact with at least a portion of the exposed area EA. The adhesion reinforcement layer 30 may be arranged to be in contact with the exposed area EA.

[0091] An adhesion reinforcement layer 30 disposed in contact with at least a portion of the exposed region EA may be connected to an adhesion reinforcement layer 30 surrounding at least a portion of the upper surface of the first conductive layer 20 to form a layer. An adhesion reinforcement layer 30 disposed in contact with at least a portion of the exposed region EA may be formed not connected to an adhesion reinforcement layer 30 surrounding at least a portion of the upper surface of the first conductive layer 20.

[0092] FIG2 is a cross-sectional view illustrating a packaging substrate according to another embodiment. Hereinafter, the embodiment will be described with reference to FIG2.

[0093] The packaging substrate 100 includes: a core layer 10; a first conductive layer 20, which is a conductive layer disposed in contact with the upper surface of the core layer 10; and an attachment reinforcement layer 30, disposed on the core layer 10 and surrounding at least a portion of the upper surface of the first conductive layer 20. The components of the packaging substrate 100 directly utilize the components described in FIG1 above. Hereinafter, the description will focus on the parts where there are differences.

[0094] The core layer 10 may include a cavity portion 11, which is a space for installing a device therein. The cavity portion 11 may include an opening 111 disposed on the upper surface side of the core layer 10, an inner cavity surface 112 extending from the opening 111 along the thickness direction of the core layer 10, and a device mounting space 113 surrounded by the inner cavity surface 112.

[0095] “The cavity inner side 112 is formed along the thickness direction of the core layer 10” not only means that the cavity inner side 112 is perpendicular to the upper surface of the core layer 10, but also means that at least a portion of the cavity inner side 112 forms an angle other than 90 degrees (tilt angle) with the upper surface.

[0096] The inner surface 112 of the cavity can be a plane or a curved surface.

[0097] When the core layer 10 is viewed from the upper surface side, the device mounting space 113 may be a space formed by a recess in the thickness direction in a portion of the upper surface. The device mounting space 113 may have a shape that extends through the thickness direction of the core layer 10. The device mounting space 113 may have a shape in which a portion of the core layer 10 is recessed in the thickness direction of the core layer 10.

[0098] Device 40 can be installed in device mounting space 113, so that package substrate 100 is electrically connected to device 40. Device 40 can be a semiconductor device such as central processing unit (CPU), graphics processing unit (GPU), memory chip, etc., or it can be a capacitor device, transistor device, impedance device or other module. In other words, any semiconductor device mounted on a semiconductor device can be used as the aforementioned device without restriction.

[0099] In this embodiment, an adhesion enhancement layer 30 may be formed on the upper surface side of the device 40. As a result, the insulating layer can be stably maintained on the cavity portion 11, thereby enabling the packaging substrate 100 to have stable electrical reliability.

[0100] The adhesion reinforcement layer 30 may be arranged to be in contact with at least a portion of the upper surface of the device 40. The adhesion reinforcement layer 30 arranged to be in contact with the upper surface of the device 40 may be connected to the adhesion reinforcement layer 30 surrounding at least a portion of the upper surface of the first conductive layer 20 to form a layer. The adhesion reinforcement layer 30 arranged to be in contact with at least a portion of the upper surface of the device 40 may be formed to be separate from the adhesion reinforcement layer 30 surrounding at least a portion of the upper surface of the first conductive layer 20. The adhesion reinforcement layer 30 arranged to be in contact with at least a portion of the upper surface of the device 40 may be connected to the adhesion reinforcement layer 30 surrounding at least a portion of the exposed region EA to form a layer. The adhesion reinforcement layer 30 arranged to be in contact with at least a portion of the upper surface of the device 40 may be formed to be separate from the adhesion reinforcement layer 30 surrounding at least a portion of the exposed region EA.

[0101] The adhesion reinforcement layer 30 may include one selected from the group consisting of silicon compounds, acrylic compounds, and combinations thereof. When the adhesion reinforcement layer 30 with the above composition is disposed in contact with the insulating layer at high temperature, it can form a chemical bond with the insulating layer. This helps to further improve the adhesion of the insulating layer to the conductive layer.

[0102] Silicon compounds may include organosilicone resins. Silicon compounds may be organosilicone resins. Organosilicone resins can be formed by curing silicone adhesives. Organosilicone resins may be resins formed by curing silane compounds. Organosilicone resins may be resins formed by curing a mixture of silicone adhesives and silane compounds.

[0103] Peroxide-cured silicone adhesives can be used. Addition-reactive silicone adhesives can also be used. There are no restrictions on the type of silicone adhesive used, whether it is a peroxide-cured or addition-reactive type, as long as it is a type commonly used in the field of adhesive or bonding technology. For example, peroxide-cured silicone adhesives can use Dow Chemical's DOWSIL SH 4280 or Shin-Etsu Chemical's KR-100. Addition-reactive silicone adhesives can use Dow Chemical's DOWSIL 4585 or Shin-Etsu Chemical's KR-3700.

[0104] Silicone compounds may include silane compounds. Silane compounds may be silane coupling agents or compounds in which functional groups have been added to silane coupling agents.

[0105] For example, the above-mentioned silane compound may include a methoxy and / or ethoxy group at one end. In addition, the other end of the above-mentioned silane compound may include an amino group, a vinyl group, an epoxy group, a methacryloxy group, an acryloxy group, a urea group, a mercapto group, a thio group, or an isocyanate group.

[0106] Acrylic compounds may include acrylic resins. Acrylic compounds may be acrylic resins. Acrylic resins can be formed by curing a compound comprising one of the groups selected from acrylic monomers, acrylic prepolymers, acrylic resins, and combinations thereof. Acrylic prepolymers may include acrylate residues. Acrylic resins may include acrylate residues. Acrylic monomers may be one of the groups selected from acrylate compounds, methacrylate compounds, alkyl-containing acrylate compounds, alkyl-containing methacrylate compounds, hydroxyl-containing acrylate compounds, hydroxyl-containing methacrylate compounds, siloxane-modified acrylate compounds, siloxane-modified methacrylate compounds, and combinations thereof. Acrylate residues can be derived from one of the following groups: acrylate compounds, methacrylate compounds, alkyl-containing acrylate compounds, alkyl-containing methacrylate compounds, hydroxyl-containing acrylate compounds, hydroxyl-containing methacrylate compounds, siloxane-modified acrylate compounds, siloxane-modified methacrylate compounds, and combinations thereof.

[0107] The thickness of the adhesion reinforcement layer 30 can be from 1 μm to 25 μm. The aforementioned thickness can be 3 μm or more. The aforementioned thickness can be 5 μm or more. The aforementioned thickness can be 10 μm or more. The aforementioned thickness can be 20 μm or less. In this case, it helps to maintain the adhesion between the insulating layer and the first conductive layer 20, etc., at a certain level or above.

[0108] [Insulation Layer]

[0109] FIG3 is a cross-sectional view illustrating a packaging substrate according to another embodiment. Hereinafter, the embodiment will be described with reference to FIG3.

[0110] The packaging substrate 100 includes: a core layer 10; a first conductive layer 20, which is a conductive layer disposed in contact with the upper surface of the core layer 10; and an attachment reinforcement layer 30, disposed on the core layer 10 and surrounding at least a portion of the upper surface of the first conductive layer 20. The components of the packaging substrate 100 can be directly applied to the components described in Figures 1 and 2 above. The following description focuses on the parts where there are differences.

[0111] The packaging substrate 100 may further include an insulating layer 50 disposed on the first conductive layer 20. The insulating layer 50 may be disposed in contact with the attachment reinforcement layer 30. Thus, the insulating layer 50 can be stably fixed to the first conductive layer 20, which has a relatively smooth surface.

[0112] The insulating layer 50 may cover a portion of the first conductive layer 20. The insulating layer 50 may cover at least a portion of the upper surface of the first conductive layer 20. The insulating layer 50 may cover at least a portion of the side surface of the first conductive layer 20.

[0113] The insulating layer 50 may be disposed on the core layer 10 in combination with the first conductive layer 20. The first conductive layer 20 having a patterned shape may be formed in a form that is embedded in the insulating layer 50.

[0114] The insulating layer 50 may cover at least a portion of the second conductive layer. The insulating layer 50 may cover at least a portion of the upper surface of the second conductive layer. The insulating layer 50 may cover at least a portion of the side surface of the second conductive layer.

[0115] The second conductive layer may be arranged in combination with the insulating layer 50. The second conductive layer having a patterned shape may be formed in a form that is embedded in the insulating layer 50.

[0116] The packaging substrate 100 of the embodiment may further include an insulating layer 50 disposed below the core layer 10. The insulating layer 50 may surround at least a portion of the third conductive layer. The insulating layer 50 may surround at least a portion of the upper surface of the third conductive layer. The insulating layer 50 may surround at least a portion of the side surface of the third conductive layer.

[0117] The third conductive layer may be arranged in combination with the insulating layer 50. The third conductive layer with a patterned shape may be formed in a form that is embedded in the insulating layer 50.

[0118] The insulating layer 50 is not limited to any insulating layer commonly used in the field of packaging substrates. For example, an epoxy resin containing fillers can be used as the insulating layer 50. Exemplarily, the insulating layer 50 can be formed using the built-in layer material, the base coating material, etc. of Ajinomoto Build-up Film (ABF) of Ajinomoto Corporation of Japan, but is not limited thereto.

[0119] The insulating layer 50 can be formed by laminating an uncured or semi-cured insulating film and then curing it.

[0120] The packaging substrate 100 may include multiple insulating layers, wherein the multiple insulating layers include an adhesion enhancement layer 30 and an insulating layer 50. The packaging substrate 100 may include multiple insulating layers composed of the adhesion enhancement layer 30 and the insulating layer 50. The adhesion between the first conductive layer 20 and the multiple insulating layers may be 300 gf / cm or more. The adhesion may be 350 gf / cm or more. The adhesion may be 400 gf / cm or more. The adhesion may be 450 gf / cm or more. The adhesion may be 500 gf / cm or more. The adhesion may be 550 gf / cm or more. The adhesion may be 600 gf / cm or more. The adhesion may be 650 gf / cm or more. The adhesion may be 1500 gf / cm or less. In this case, a packaging substrate 100 with excellent durability and electrical reliability can be provided.

[0121] The adhesion between the first conductive layer 20 and the multilayer insulating layer was measured using an adhesive strength tester via a 180° peel test. The measurement speed (peel speed) was set to 10 mm / s, and the measurement distance (peel distance) was set to 70 mm. For example, the above adhesion value could be measured using a Condor Sigma adhesive strength tester from XYZTEC (Netherlands).

[0122] [Other Components]

[0123] The packaging substrate 100 may further include a via electrode (not shown) disposed in a via. The via electrode may electrically connect the first conductive layer 20 and the third conductive layer. The via electrode may use the same material and layer structure as the conductive layer. The via electrode may have a shape that fills the entire via, or it may have a thin film shape that is in contact with the inner diameter surface of the via.

[0124] In this embodiment, an upper surface connection electrode (not shown in the figure) for electrically connecting the device and the second conductive layer can be arranged on the upper side of the packaging substrate 100 as needed. The upper surface connection electrode can be directly connected via the device and terminals, etc. Alternatively, the upper surface connection electrode can be connected to the device via a device connection portion such as a solder ball.

[0125] In this embodiment, a lower surface connection electrode (not shown in the figure) for electrically connecting the mother substrate and the third conductive layer may be arranged on the lower side of the packaging substrate 100 as needed. The lower surface connection electrode may be directly connected to the mother substrate via terminals or the like. Alternatively, the lower surface connection electrode may be connected to the mother substrate via a connection portion such as a bump.

[0126] In this embodiment, bumps (not shown in the figure) can be arranged in a predetermined form below the third conductive layer as needed. The bumps can be arranged on a portion of the lower surface of the packaging substrate 100 so as to contact the mother substrate or the like.

[0127] [Semiconductor Packages]

[0128] A semiconductor package according to another embodiment includes a package substrate and means electrically connected to the package substrate.

[0129] The packaging substrate can be mounted on the mother substrate to be electrically connected to the mother substrate.

[0130] The packaging substrate and device may be the same as those described above. The description of the packaging substrate and device overlaps with the preceding content, so the description will be omitted.

[0131] [Manufacturing method of packaging substrate]

[0132] A method for manufacturing a package substrate according to another embodiment includes: a preparation step of preparing a pre-substrate including a core layer and a first conductive layer disposed in contact with the upper surface of the core layer; an attachment reinforcement layer forming step of forming an attachment reinforcement layer surrounding at least a portion of the upper surface of the first conductive layer; and a manufacturing step of manufacturing a package substrate from the pre-substrate having the attachment reinforcement layer formed thereon.

[0133] The surface roughness Ra value of the upper surface of the first conductive layer is less than 40 nm.

[0134] The above-mentioned adhesion reinforcement layer contains silicon compounds.

[0135] In the preparation step, a pre-substrate with a first conductive layer already formed can be prepared, and the pre-substrate can be prepared by forming the first conductive layer on the core layer.

[0136] The description of the core layer and the first conductive layer is repeated above, so it is omitted.

[0137] The first conductive layer can be prepared by forming a first seed layer on the upper surface of the core layer, forming a second seed layer on the first seed layer, and forming a conductive layer on the second seed layer.

[0138] As for the method of forming a seed layer on the core layer, there is no limitation as long as it is a method commonly used in the field of packaging substrates. For example, the seed layer can be formed by physical vapor deposition (PVD), sputtering process, chemical plating process, etc.

[0139] The description of the first and second seed layers is repeated from the previous content, so the description will be omitted.

[0140] A conductive layer can be formed by performing a plating process on the second seed layer. The plating process is not limited to any method commonly used in the field of packaging substrates. For example, a chemical plating process can be used.

[0141] The description of the conductive layer overlaps with the previous content, so the description will be omitted.

[0142] Before forming the conductive layer, the seed layer can be patterned. Specifically, after forming a resist film on the seed layer, the resist film is developed according to a pre-designed pattern shape, and a conductive layer is formed through a plating process. The resist film and its development are not limited to methods commonly used in the packaging substrate field.

[0143] Subsequently, the developed resist film can be removed, and the seed layer present in the area where the conductive layer has not been formed can be removed to complete the formation of the first conductive layer. The seed layer can be removed by etching.

[0144] The preparation steps may include a surface roughness control process for adjusting the roughness of the upper surface of the first conductive layer. During the surface roughness control process, the roughness of the upper surface of the first conductive layer can be adjusted to a range preset in the embodiment. This can improve the adhesion between the insulating layer and the first conductive layer while mitigating the increase in resistance of the first conductive layer caused by high-frequency power applications.

[0145] In the process of surface roughness control, a method of oxidation-reduction can be applied to the upper surface of the first conductive layer. For example, the NovaBond product of Atotech can be used to adjust the roughness by oxidation-reduction of the upper surface of the first conductive layer.

[0146] During the surface roughness control process, the upper surface of the first conductive layer can be etched. The etching can be performed using wet etching or dry etching.

[0147] The description of the roughness of the upper surface of the first conductive layer after adjustment by the surface roughness control process is repeated with the above content, so it is omitted.

[0148] In the adhesion reinforcement layer formation step, the adhesion reinforcement layer can be formed in a manner that surrounds at least a portion of the upper surface of the first conductive layer. Furthermore, in the adhesion reinforcement layer formation step, the adhesion reinforcement layer can be formed in a manner that contacts at least a portion of the aforementioned exposed area in the upper surface of the core layer. When the package substrate includes the aforementioned cavity portion and a device mounted in the cavity portion, the adhesion reinforcement layer can be formed in the adhesion reinforcement layer formation step in a manner that contacts at least a portion of the upper surface of the device.

[0149] The description of the location, shape, thickness and composition of the attachment reinforcement layer is repeated with the above content, so it is omitted.

[0150] The adhesion reinforcement layer forming step may include: a process of arranging the composition for manufacturing the adhesion reinforcement layer in such a way as to surround at least a portion of the upper surface of the first conductive layer; and a process of heat-treating the composition for manufacturing the adhesion reinforcement layer to form the adhesion reinforcement layer.

[0151] During the arrangement process, a multilayer film for manufacturing an adhesion reinforcement layer can be prepared, on which the composition for manufacturing an adhesion reinforcement layer is arranged. The multilayer film can be laminated on a pre-substrate such that the surface on which the composition for manufacturing the adhesion reinforcement layer is arranged faces the upper surface of the first conductive layer, thereby arranging the composition for manufacturing the adhesion reinforcement layer. However, the method for arranging the composition for manufacturing the adhesion reinforcement layer is not limited to this; the composition for manufacturing the adhesion reinforcement layer can also be directly coated onto the upper surface of the first conductive layer, and then the adhesion reinforcement layer can be formed by curing.

[0152] The composition for manufacturing the adhesion reinforcement layer may include a silicone adhesive. The composition for manufacturing the adhesion reinforcement layer may include a silane compound. The composition for manufacturing the adhesion reinforcement layer may include a silicone adhesive and a silane compound. The description of the silicone adhesive and the silane compound is repeated above, and therefore omitted here.

[0153] The composition for manufacturing the adhesion reinforcement layer may include an acrylic compound. The acrylic compound may include one selected from the group consisting of acrylic monomers, acrylic prepolymers, acrylic resins, and combinations thereof. Descriptions of acrylic monomers, acrylic prepolymers, and acrylic resins are repeated above and are therefore omitted here.

[0154] The composition for manufacturing the adhesion reinforcement layer may further include additives conventionally used in the fields of bonding and adhesion. For example, the composition for manufacturing the adhesion reinforcement layer may further include curing agents, antioxidants, heat stabilizers, etc.

[0155] During the heat treatment process, the adhesion reinforcement layer can be formed by heat treating a pre-substrate on which the composition for manufacturing the adhesion reinforcement layer is disposed, thereby further improving the adhesion of the adhesion reinforcement layer to the insulating layer.

[0156] During the heat treatment process, the heat treatment temperature can be 100°C or higher. The aforementioned heat treatment temperature can be 110°C or higher. The aforementioned heat treatment temperature can be 120°C or higher. The aforementioned heat treatment temperature can be 130°C or higher. The aforementioned heat treatment temperature can be 250°C or lower.

[0157] During the heat treatment process, the heat treatment time may be 10 seconds or more. The heat treatment time may be 15 seconds or more. The heat treatment time may be 20 seconds or more. The heat treatment time may be 30 seconds or more. The heat treatment time may be 30 minutes or less. The heat treatment time may be 20 minutes or less. The heat treatment time may be 10 minutes or less.

[0158] In this case, the adhesion of the adhesion enhancement layer to the insulation layer can be further improved.

[0159] In the manufacturing step, a packaging substrate can be manufactured from a pre-substrate on which an attachment reinforcement layer is formed.

[0160] The manufacturing steps may include an insulation layer forming process in which an insulation layer is formed in contact with the upper surface of the attached reinforcing layer.

[0161] The insulating layer can be prepared by laminating a thin film for forming the insulating layer onto the adhesion reinforcement layer after heat treatment and then curing it, or by coating the above-mentioned adhesion reinforcement layer with a composition for forming the insulating layer and then curing it.

[0162] The film or composition used to form the insulating layer is not limited, as long as it is a film or composition commonly used in the field of lamination. Specifically, the film or composition used to form the insulating layer may be an epoxy resin film or composition.

[0163] The insulating layer may be in contact with the upper surface of the attached reinforcing layer. The insulating layer may wrap around the upper surface of the core layer.

[0164] In this embodiment, a second conductive layer may be formed on the insulating layer as needed. The second conductive layer may be formed in the same way as the first conductive layer, except that its width and thickness are pre-designed dimensions.

[0165] An adhesion reinforcement layer can be formed in a manner that surrounds at least a portion of the upper surface of the second conductive layer. The adhesion reinforcement layer can be formed by the same method as the method for forming an adhesion reinforcement layer that surrounds at least a portion of the upper surface of the first conductive layer.

[0166] After forming the adhesion reinforcement layer on the second conductive layer, an insulating layer is formed in contact with the upper surface of the adhesion reinforcement layer. The insulating layer can be formed by the same method as described above.

[0167] As needed, a third conductive layer, an adhesion reinforcement layer surrounding at least a portion of the upper surface of the third conductive layer, and an insulating layer surrounding the adhesion reinforcement layer may be formed below the glass core layer. The third conductive layer may be formed in the same manner as the first conductive layer and / or the second conductive layer. However, the width and / or thickness of the third conductive layer may be different from the width and / or thickness of the first conductive layer or the second conductive layer.

[0168] The method of manufacturing the packaging substrate may further include a process of forming connection terminals, bumps, cover layers, etc. on the upper surface and / or lower surface of the packaging substrate, or a process of mounting the device onto the substrate.

[0169] Hereinafter, the implementation methods will be described in more detail through specific embodiments. The following embodiments are merely examples for illustrating and understanding the implementation methods, and the scope of the implementation methods is not limited thereto.

[0170] [Preparation Example: Formation of Packaging Substrate]

[0171] Example 1: A titanium layer with a thickness of 150 nm is formed on the core layer of a glass substrate as a first seed layer by physical vapor deposition (PVD), and a copper layer with a thickness of 150 nm is formed on the first seed layer as a second seed layer by PVD. A copper conductive layer with a thickness of 30 μm is formed on the seed layer used to form the conductive layer by chemical plating process to form the first conductive layer.

[0172] The upper surface of the first conductive layer was roughened using Atotech's NovaBond product to obtain a pre-substrate. Then, the Ra value of the upper surface of the roughened first conductive layer was measured according to ISO 4287:1997. Nitto Denko's polyimide tape (PI Carrier Adhesive Tape AS-020PI12) was then attached to the roughened first conductive layer.

[0173] After heat-treating the pre-substrate with the adhesion reinforcement layer formed at 150°C for 30 seconds to 5 minutes, the polyimide film serving as a release film is removed, thereby forming the adhesion reinforcement layer.

[0174] Ajinomoto's laminated material is laminated onto the adhesion reinforcement layer and then cured at 150°C for 60 minutes to form an insulating layer to complete the encapsulation substrate.

[0175] Example 2: Except for roughening the upper surface of the first conductive layer using MAC's CZ8101 etching solution, the packaging substrate was manufactured under the same conditions as in Example 1.

[0176] Example 3: Except that the upper surface of the first conductive layer was not roughened, but 3-methcryloxypropyltrimethoxysilane was used as a silane coupling agent and coated with a thickness of 2nm to 3nm by vacuum evaporation, the packaging substrate was manufactured under the same conditions as in Example 1.

[0177] Comparative Example 1: Except for not performing additional roughening treatment on the upper surface of the first conductive layer or performing surface treatment with a compound, the packaging substrate was manufactured under the same conditions as in Example 1.

[0178] The Ra values ​​measured from the upper surface of the first conductive layer in each embodiment and comparative example are shown in Table 1 below.

[0179] [Evaluation Example: Adhesion Evaluation Between the First Conductive Layer and Multiple Insulating Layers]

[0180] The adhesion between the first conductive layer and the multilayer insulating layer (consisting of an adhesion enhancement layer and an insulating layer) was measured using a Condor Sigma adhesive strength tester from XYZTEC (Netherlands) according to a 180° peel test. The measurement speed (peel speed) was set to 10 mm / s, and the measurement distance (peel distance) was set to 70 mm.

[0181] The measurement values ​​of each embodiment and comparative example are recorded in Table 1 below.

[0182] [Evaluation Example: Long-term Durability Evaluation]

[0183] After placing the packaging substrate at 150°C for 1000 hours according to each embodiment and comparative example, the evaluation was conducted to determine whether the insulating layer on the core layer peeled off. If no insulating layer peeling occurred, the evaluation was P; if peeling occurred, the evaluation was F.

[0184] The measurement values ​​for each embodiment and comparative example are recorded in Table 1 below.

[0185] Table 1 Ra (nm) Adhesion (gf / cm) Durability evaluation Example 1 50~80 820 P Example 2 50~80 550 P Example 3 50~80 420 P Comparative Example 1 20 160 F

[0186] In Table 1 above, Examples 1 to 3 show adhesion of 400 gf / cm or more and are rated P in the durability evaluation, while Comparative Example 1 shows adhesion of less than 200 gf / cm and is rated F in the durability evaluation. This is believed to be because the surface of the first conductive layer in Comparative Example 1 was not roughened, resulting in insufficient residue of the adhesion enhancement layer on the surface of the first conductive layer, thus preventing the insulating layer from adhering stably to the first conductive layer.

[0187] The preferred embodiments of the present invention have been described in detail above, but the scope of the present invention is not limited thereto. Various modifications and improvements made by those skilled in the art to which the present invention pertains, utilizing the basic concepts of the present invention as defined in the appended claims, are also within the scope of the present invention. [Simplified Explanation of the Diagram]

[0034] FIG1 is a cross-sectional view illustrating a packaging substrate according to one embodiment. FIG2 is a cross-sectional view illustrating a packaging substrate according to another embodiment. FIG3 is a cross-sectional view illustrating a packaging substrate according to yet another embodiment.

Claims

1. A packaging substrate, characterized in that it comprises: Core layer; A first conductive layer, which is a conductive layer disposed in contact with the upper surface of the core layer; and an adhesion reinforcement layer, disposed on the core layer and surrounding at least a portion of the upper surface of the first conductive layer, wherein the adhesion reinforcement layer comprises one selected from the group consisting of silicon compounds, acrylic compounds, and combinations thereof, wherein the arithmetic mean roughness Ra value of the upper surface of the first conductive layer is 150 nm or less, wherein the core layer includes a cavity portion, wherein the cavity portion is a region for mounting a device therein, wherein the cavity portion includes an opening disposed on the upper surface side of the core layer, an inner cavity side extending from the opening along the thickness direction of the core layer, and a device mounting space surrounded by the inner cavity side, wherein the encapsulation substrate includes a device disposed in the device mounting space, and wherein the adhesion reinforcement layer is disposed in contact with at least a portion of the upper surface of the device.

2. The packaging substrate as claimed in claim 1, wherein the silicon compound comprises an organosilicon resin.

3. The packaging substrate as claimed in claim 1, characterized in that the maximum height roughness Ry value of the upper surface of the first conductive layer is less than 200 nm.

4. The packaging substrate as claimed in claim 1, characterized in that the core layer is a glass core layer, the upper surface of the core layer includes an exposed area, the exposed area is a region where the first conductive layer is not formed, and the attachment reinforcement layer is disposed in contact with at least a portion of the exposed area.

5. The packaging substrate as claimed in claim 1, characterized in that the thickness of the aforementioned adhesion reinforcement layer is from 1 μm to 25 μm.

6. The packaging substrate as claimed in claim 1, characterized in that it includes an insulating layer disposed in contact with the aforementioned adhesion enhancement layer.

7. The packaging substrate as claimed in claim 6, characterized in that it comprises multiple insulating layers, wherein the multiple insulating layers include the adhesion enhancement layer and the insulating layer, and the adhesion between the first conductive layer and the multiple insulating layers is 300 gf / cm or more.

8. A method for manufacturing a packaging substrate, characterized in that it comprises: Preparation steps include preparing a pre-substrate comprising a core layer and a first conductive layer disposed in contact with the upper surface of the core layer; The process includes an adhesion reinforcement layer forming step, forming an adhesion reinforcement layer that surrounds at least a portion of the upper surface of the first conductive layer; and a manufacturing step, manufacturing a packaging substrate from a pre-substrate having the adhesion reinforcement layer formed thereon, wherein the surface roughness Ra value of the upper surface of the first conductive layer is 150 nm or less, the adhesion reinforcement layer comprises one selected from the group consisting of silicon compounds, acrylic compounds, and combinations thereof, the core layer includes a cavity portion, the cavity portion being a region for mounting a device therein, the cavity portion including an opening disposed on the upper surface side of the core layer, an inner cavity side extending from the opening along the thickness direction of the core layer, and a device mounting space surrounded by the inner cavity side, the packaging substrate including a device disposed in the device mounting space, and the adhesion reinforcement layer being disposed in contact with at least a portion of the upper surface of the device.

9. The method for manufacturing a packaging substrate as described in claim 8, characterized in that the above-mentioned preparation steps include: A surface roughness control process for adjusting the roughness of the upper surface of the first conductive layer.

10. A method for manufacturing a packaging substrate as claimed in claim 8, characterized in that the above-mentioned adhesion reinforcement layer forming step includes: The arrangement process of arranging the composition for manufacturing the attachment reinforcement layer in such a way as to surround at least a portion of the upper surface of the first conductive layer; And a heat treatment process for heat-treating the composition for manufacturing the above-mentioned adhesion reinforcement layer to form the above-mentioned adhesion reinforcement layer.

11. A method for manufacturing a packaging substrate as claimed in claim 8, characterized in that the manufacturing steps include: The process of forming an insulating layer that is in contact with the upper surface of the above-mentioned attached reinforcing layer.

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