Display driving chip and driving method thereof

TWI943684BActive Publication Date: 2026-10-21FITIPOWER INTEGRATED TECH INC
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Patent Information

Application Number
TW114137519
Authority / Receiving Office
TW · TW
Patent Type
Patents
Current Assignee / Owner
Filing Date
2025-09-30
Publication Date
2026-10-21
Estimated Expiration
2045-09-29

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    Figure TWG2TB001917421_003
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Abstract

A display driver chip includes a reference voltage generator, a voltage converter, a first drive voltage generator, and a control unit. The reference voltage generator provides a reference voltage, the voltage converter provides a first supply voltage and a second supply voltage, the first drive voltage generator includes a first input terminal, a first supply voltage terminal, and a first output terminal. The first input terminal is coupled to the reference voltage generator to receive the reference voltage, the first supply voltage terminal receives the first supply voltage, the first output terminal is connected to a first output port to output the first drive voltage, and the control unit receives control signals, wherein the control unit sets the display driver chip as a master chip or a slave chip according to the control signals.
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Claims

1. A display driver chip, comprising: A reference voltage generator is used to provide a reference voltage; A voltage converter includes a first output terminal and a second output terminal, respectively used to provide a first supply voltage and a second supply voltage; and a first output port for outputting a first drive voltage; A second output port is used to output a second drive voltage; A first drive voltage generator for generating the first drive voltage includes: a first input terminal coupled to the reference voltage generator for receiving the reference voltage; a first supply voltage terminal for receiving the first supply voltage; and a first output terminal coupled to the first output port for outputting the first drive voltage to the first output port; and a second drive voltage generator for generating the second drive voltage includes: a second input terminal coupled to the reference voltage generator for receiving the reference voltage; a second supply voltage terminal for receiving the second supply voltage; and a second output terminal coupled to the second output port for outputting the second drive voltage to the second output port; and a control unit for receiving a control signal; The control unit sets the display driver chip as a master chip or a slave chip according to the control signal. When the display driver chip is set as the master chip, the first drive voltage generator, the second drive voltage generator, and the voltage converter inside the display driver chip are all turned on. When the display driver chip is set as the slave chip, the first drive voltage generator, the second drive voltage generator, and the voltage converter inside the display driver chip are all turned off.

2. The display driver chip as claimed in claim 1, wherein: The first driving voltage generator includes: a first amplifier, including: a positive terminal coupled to the reference voltage generator for receiving the reference voltage provided by the reference voltage generator; a negative terminal; and an output terminal; a first transistor, including: a first terminal coupled to the first output terminal of the voltage converter for receiving the first supply voltage provided by the voltage converter; a second terminal coupled to the first output port for outputting the first driving voltage; and a control terminal coupled to the output terminal of the first amplifier; a first switch; a first resistor connected in series with the first switch to form a first series circuit, and the first series circuit is coupled between the second terminal of the first transistor and the negative terminal of the first amplifier; a second switch; and a second resistor connected in series with the second switch to form a second series circuit, and the second series circuit is coupled between the negative terminal of the first amplifier and a ground terminal; and the second driving voltage generator includes: a second amplifier, including: A positive terminal, coupled to the reference voltage generator, for receiving the reference voltage; a negative terminal; and an output terminal; a second transistor, including: a first terminal, coupled to the second output terminal of the voltage converter, for receiving the second supply voltage provided by the voltage converter; a second terminal, coupled to the second output port, for outputting the second drive voltage; and a control terminal, coupled to the output terminal of the second amplifier; a third switch; a third resistor, connected in series with the third switch to form a third series circuit, and the third series circuit is coupled between the second terminal of the second transistor and the negative terminal of the second amplifier; a fourth switch; and a fourth resistor, connected in series with the fourth switch to form a fourth series circuit, and the fourth series circuit is coupled between the negative terminal of the second amplifier and the ground terminal.

3. The display driver chip as described in claim 2, further comprising: A first control port is used to output a first control voltage; A second control port is used to output a second control voltage; A first supply voltage port is coupled to the first output terminal of the voltage converter for outputting the first supply voltage; a second supply voltage port is coupled to the second output terminal of the voltage converter for outputting the second supply voltage; a fifth switch is coupled between the output terminal of the first amplifier and the first control port; and a sixth switch is coupled between the output terminal of the second amplifier and the second control port.

4. A display driver chip assembly, comprising a plurality of display driver chips as described in claim 3, wherein: The plurality of first output ports of the display driver chips are correspondingly coupled, the plurality of second output ports of the display driver chips are correspondingly coupled, the plurality of first supply voltage ports of the display driver chips are correspondingly coupled, the plurality of second supply voltage ports of the display driver chips are correspondingly coupled, the plurality of first control ports of the display driver chips are correspondingly coupled, and the plurality of second control ports of the display driver chips are correspondingly coupled.

5. The display driver chip set as described in claim 4, wherein when it is determined that a display panel screen has a display abnormality, the control signal sets one display driver chip as the master chip and sets all the remaining display driver chips as slave chips.

6. The display driver chip set as claimed in claim 5, wherein when the display driver chip set is in operation, at least one second switch and at least one fourth switch of each slave chip are all off, at least one first switch, at least one third switch, at least one fifth switch and at least one sixth switch of each slave chip are all on, and at least one first switch, at least one second switch, at least one third switch, at least one fourth switch, at least one fifth switch and at least one sixth switch of the master chip are all on.

7. A display driver chip set, comprising a plurality of display driver chips as described in claim 1, the display driver chips being configured to drive different areas of a display panel respectively, wherein: The plurality of first output ports of the display driver chips are correspondingly coupled, and the plurality of second output ports of the display driver chips are correspondingly coupled.

8. The display driver chip set as claimed in claim 7, wherein when it is determined that a display abnormality has occurred on the display panel, the control signal sets one of the display driver chips in the display driver chip set as the master chip and sets all the remaining display driver chips as slave chips.

9. The display driver chip set as claimed in claim 8, wherein when the display driver chip set is in operation, at least one second switch and at least one fourth switch of each slave chip are all off, at least one first switch and at least one third switch of each slave chip are all on, and at least one first switch, at least one second switch, at least one third switch and at least one fourth switch of the master chip are all on.

10. A driving method for a display system, comprising: A plurality of display driver chips are configured, each driving a plurality of corresponding areas of a display panel; a plurality of first output ports of the display driver chips are correspondingly coupled, and a plurality of second output ports of the display driver chips are correspondingly coupled; when it is determined that a screen display on the display panel is abnormal, one display driver chip is set as the master chip; all the remaining display driver chips are set as slave chips; the first drive voltage generator, the second drive voltage generator, and the voltage converter of each slave chip are turned off; and when it is determined that the screen display on the display panel is normal, all of the display driver chips are set as the master chips.

11. A driving method for a display system, comprising: A plurality of display driver chips are provided, each of which drives a plurality of corresponding areas of a display panel; The display driver chips are coupled to a plurality of first output ports, a plurality of second output ports, a plurality of first supply voltage ports, a plurality of second supply voltage ports, a plurality of first control ports, and a plurality of second control ports. When it is determined that a display panel is displaying an abnormal image, one display driver chip is set as the master chip. All other display driver chips are set as slave chips. The first amplifier, second amplifier, and voltage converter of each slave chip are turned off. When it is determined that the display panel is displaying an abnormal image, all display driver chips are set as the master chips.

Citation Information

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