Nanostructure fabrication system and semiconductor device

Abstract

A nano-heterostructure fabrication system is applicable to a semiconductor device. The semiconductor device includes a substrate and a conductive metal layer formed on the substrate. The nano-heterostructure fabrication system includes a process chamber unit defining at least one reaction chamber and a mold. The at least one reaction chamber contains an electroplating medium and the semiconductor device. The mold includes a plurality of nanopores. When the mold contacts the metal layer, a nano core material deposited from metal ions in the electroplating medium and bonded to the metal layer is formed in each nanopore, and a precursor deposited on the nano core material is formed. When the mold is removed, metal ions in each precursor are deposited on the outer surface of their respective nano core material to form a diffusion material. This improves process efficiency and coverage during bonding.

Description

Nanostructure fabrication system and semiconductor device Technical Field

[0001] This invention relates to a fabrication system, and more particularly to a nano-heterostructure fabrication system and semiconductor device. Prior Technology

[0002] Three-dimensional integrated circuit (3D IC) technology is gradually becoming a key technology driving innovation in the semiconductor industry. Referring to Figure 1, a copper nanowire hybrid bonding technology is used to connect two wafers 1. Each wafer 1 includes a substrate 11, a copper metal layer 12 formed on the surface of the substrate 11, and a plurality of copper nanowires 13 connected to the copper metal layer 12. Thereby, a bonding interface 14 is formed by these intertwined copper nanowires 13, thereby realizing room temperature bonding, high density, low pitch metal interconnection, and providing excellent conductivity and heat dissipation.

[0003] However, since the copper nanowires 13 bonded at room temperature only exhibit intertwining without copper diffusion, numerous pores 10 remain between them. Under bonding conditions of room temperature, a pressure of approximately 15 MPa, and a pressurization time of approximately 60 seconds, it can be clearly seen from the SEM image in Figure 2 that the copper coverage of the bonding interface 14 is less than 80% (calculated using ImageJ software). In other words, the copper nanowires 13 cannot achieve 100% copper coverage of the bonding interface 14 under low-temperature or low-pressure bonding conditions.

[0004] To address the aforementioned porosity issue, existing technologies employ high-temperature (approximately 300°C) and high-pressure (approximately 20-30 MPa) bonding conditions to diffuse the copper material within the copper nanowires 13. However, as can be seen from the SEM image in Figure 3, significant porosity still exists between the bonding interfaces 14, with a copper coverage rate of 94.1%, which is also insufficient to reach 100%.

[0005] Furthermore, Republic of China Patent No. I575108B discloses a method for preparing core-shell structured nanowires. This method primarily involves first dispersing metal nanowires in a polar solvent, then mixing them with a metal precursor solution to form a silver shell on the outer surface of the copper nanowires. This silver shell prevents oxidation of the copper nanowires and improves conductivity. However, discrete metal nanowires are prone to twisting and deformation during transport, and the core-shell structured nanowires cannot be continuously transferred to wafer 1 as shown in Figure 1. Summary of the Invention

[0006] Therefore, the objective of this invention is to provide a nano-heterostructure fabrication system and semiconductor device that can improve process efficiency and increase the coverage of bonding materials.

[0007] Therefore, this novel nano-heterostructure fabrication system is applicable to a semiconductor device, which includes a substrate and a conductive metal layer formed on the substrate. The nano-heterostructure fabrication system includes a process cavity unit and a mold.

[0008] The process cavity unit defines at least one reaction chamber, which is suitable for accommodating an electroplating medium and the semiconductor device.

[0009] The removable mold is formed on the metal layer and has a first mold surface, a second mold surface opposite to the first mold surface, and a plurality of nanopores extending from the first mold surface to the second mold surface. The mold is capable of changing between a first mode and a second mode relative to the metal layer. In the first mode, the first mold surface contacts the metal layer, and a nano core material formed in each nanopore is deposited with metal ions in the electroplating medium and connected to the metal layer, and a precursor deposited on the nano core material. In the second mode, the mold is removed so that the metal ions in each precursor are deposited on the outer surface of their respective nano core material to form a diffusion material.

[0010] The novel semiconductor device includes a substrate, a metal layer, and a nano-heterogeneous structure.

[0011] The metal layer is formed on the substrate and is conductive.

[0012] The nano-heterostructure is deposited using the nano-heterostructure fabrication system described above, and includes several nano-cores connected to the metal layer and several diffusers, each of which covers the entire outer surface of its respective nano-core and defines an opening toward the metal layer.

[0013] The advantages of this invention are: It can rapidly deposit the nano-core material and the diffusion material through the design of the at least one reaction chamber and the mold, thereby improving process efficiency. Furthermore, the diffusion material on the outer surface of each nano-core material can fill the pores during bonding, thus increasing the coverage of the bonding material. Simple Explanation of the Diagram

[0014] Other features and effects of this invention will be clearly presented in the embodiments with reference to the drawings, wherein: Figure 1 is a schematic diagram illustrating how two known wafers are joined together by several copper nanowires; Figure 2 is a SEM image illustrating the state of these known copper nanowires bonded together at room temperature; Figure 3 is a SEM image illustrating the state of these known copper nanowires after they are bonded together under high temperature and high pressure. Figure 4 is a cross-sectional schematic diagram illustrating an embodiment of the novel nano-heterostructure fabrication system; Figure 5 is a schematic diagram of this embodiment used for electroplating; Figure 6 is a schematic diagram illustrating that a mold is formed in a metal layer of a semiconductor device according to this embodiment; Figure 7 is a SEM image illustrating that the mold in this embodiment includes several nanopores; Figure 8 is a schematic diagram illustrating that a nano core material is deposited in each nanopore of this embodiment; Figure 9 is a SEM image of the nanopores and the nano core material; Figure 10 is a schematic diagram illustrating that a precursor is also deposited in each nanopore of this embodiment; Figure 11 is a schematic diagram illustrating the precursor and nano-core material deposited using this embodiment; Figure 12 is a SEM image of the precursors and the nano core materials; Figure 13 is a schematic diagram illustrating an embodiment of the novel semiconductor device; Figure 14 is a SEM image illustrating several nanometer heterostructures of the semiconductor device; Figure 15 shows another SEM image of the nano-heterostructure of this semiconductor device; Figure 16 is a schematic diagram illustrating the interconnection of the two semiconductor devices; Figure 17 is a SEM image of the interconnection of these semiconductor devices through these nano-heterogeneous structures; and Figure 18 is a schematic diagram similar to Figure 13, illustrating that the nano-heterogeneous structure of the semiconductor device is granular. Implementation

[0015] Referring to Figures 4, 5, and 6, an embodiment of this novel nano-heterostructure fabrication system is applied to a semiconductor device 2. The semiconductor device 2 includes a substrate 21 and a conductive metal layer 22 formed on the substrate 21. In this embodiment, the substrate 21 is a semiconductor wafer. The metal layer 22 comprises copper.

[0016] The nano-heterogeneous structure fabrication system includes a process cavity unit 3, a transport unit 4, and a mold 5.

[0017] In this embodiment, the process cavity unit 3 includes four process cavities 31, three electroplating modules 32, and one etching module 33. The process cavities 31 surround the periphery of the transmission unit 4. It should be noted that the process cavities 31 may also be arranged along a straight line on one side, both sides, or other locations adjacent to the transmission unit 4.

[0018] Each process chamber 31 defines a reaction chamber 311 and has a channel 312 communicating with the reaction chamber 311. The reaction chambers 311 of three process chambers 31 are used for electroplating. The reaction chamber 311 of the remaining process chamber 31 is used for etching.

[0019] In this embodiment, electrochemical deposition (ECD) is used for electroplating. Plasma etching or wet etching is then used for etching. It should be noted that the electroplating process is not limited to ECD; physical vapor deposition (PVD), chemical vapor deposition (CVD), or a combination of these techniques can also be used.

[0020] Each reaction chamber 311 for electroplating is used to contain an electroplating medium. In this embodiment, the electroplating medium, in conjunction with chemical deposition (ECD) technology, is an electrolyte comprising metal ions. For example:

[0021] The electroplating medium in the first reaction chamber 311 is an electrolyte containing copper sulfate (CuSO4), sulfuric acid (H2SO4), and a promoter, which can provide copper ions (Cu2+) in the electrochemical reaction.

[0022] The electroplating medium in the second reaction chamber 311 is an electrolyte containing a complexing agent and silver ions (Ag+), which can form precursor substances in the electrochemical reaction.

[0023] The electroplating medium in the third reaction chamber 311 is an electrolyte containing silver salts (such as silver methanesulfonate) and organic additives.

[0024] Each electroplating module 32 is installed in a corresponding process cavity 31, including an anode plate 321 that can replenish metal ions in the electrochemical reaction, and a carrier 322 that can move relative to the anode plate 321 and serves as a cathode. The carrier 322 is used to support the substrate 21 for electrochemical deposition.

[0025] The etching module 33 is installed in the corresponding process chamber 31 and is used to provide plasma or etching solution capable of removing special materials in the corresponding reaction chamber 311. It is worth noting that the etching module 33 is a conventional structure, and since those skilled in the art can infer extended details from the above description, no further explanation is given.

[0026] The transfer unit 4 is disposed between the process cavities 31 and includes a rotatable robotic arm 41 that can extend and retract relative to any of the process cavities 31, and a clamp 42 connected to the robotic arm 41 that can carry the substrate 21. The robotic arm 41 can carry the substrate 21 through the clamp 42 into and out of any of the reaction cavities 311 via the corresponding channel 312.

[0027] The removable mold 5 is formed on the metal layer 22 and includes a first mold surface 51, a second mold surface 52 opposite to the first mold surface 51, and a plurality of nanopores 53 extending from the first mold surface 51 to the second mold surface 52 along an axis X. The mold 5 can change relative to the metal layer 22 between a first mode (Figures 6, 8, and 10) and a second mode (Figure 11). Referring to Figure 6, in the first mode, the first mold surface 51 is in contact with the metal layer 22. In this embodiment, the mold 5 is a thin film deposited on the surface of the metal layer 22 using electrochemical deposition technology. After the thin film is formed, the nanopores 53 can be formed by anodizing or etching. The distribution of the nanopores 53 can be seen from the SEM image in Figure 7. In the second mode, the mold 5 is removed. For example, the mold 5 can be converted into gas by dry etching, or the mold 5 shown in Figure 10 can be dissolved in the chemical solution shown in Figure 11 by wet etching.

[0028] Referring to Figures 4, 5, and 8, when the mold 5 is in the first mode and is about to undergo electroplating, the robotic arm 41 carries the substrate 21 through the gripper 42 into the first reaction chamber 311 for electroplating via the corresponding channel 312. Thus, during the electrochemical deposition reaction, a nano-core material 23, formed by the reduction deposition of copper ions in the electroplating medium and connected to the metal layer 22, is formed in each nano-pore 53. The SEM image in Figure 9 shows that each nano-pore 53 contains its own nano-core material 23.

[0029] It is worth noting that during the copper ion deposition process, copper ions are affected by the promoter in the electroplating medium and are deposited from the metal layer 22 in a direction opposite to the substrate 21. They are constrained by the nanopores 53 and grow into filaments along the X-axis following the nanopores 53.

[0030] Referring to Figures 4, 5, and 10, the robotic arm 41 then uses the gripper 42 to remove the substrate 21 with the deposited nano-core material 23 from the first electroplating reaction chamber 311, and carries the substrate 21 through the corresponding channel 312 into the second electroplating reaction chamber 311. Since the mold 5 is still in the first mode, during the electrochemical deposition reaction, a precursor 24' reduced by silver ions in the electroplating medium is subsequently deposited in each nanopore 53. Thus, with the nano-core material 23 already deposited in each nanopore 53, each precursor 24' is confined within its respective nanopore 53 and located at an end 231 of its respective nano-core material 23, away from the metal layer 22.

[0031] Referring to Figures 4, 5, and 11, the robotic arm 41 then uses the gripper 42 to remove the substrate 21, on which the nano-core materials 23 and precursors 24' are deposited, from the second electroplating reaction chamber 311, and carries the substrate 21 through the corresponding channel 312 into the etching reaction chamber 311. The mold 5 is then converted into gas through dry etching or dissolved in a chemical solution through wet etching, causing the mold 5 to be removed from the metal layer 22 and transformed into the second mode. In other words, the mold 5 in the second mode has been converted into gas or dissolved in a chemical solution in the corresponding reaction chamber 311. Thus, as can be clearly seen from the SEM image in Figure 12, each precursor 24' is located at the endpoint 231 of its respective nano-core material 23.

[0032] Referring to Figures 4, 5, 11, and 13, the robotic arm 41, using the gripper 42, removes the substrate 21, which has been deposited with the nano-core materials 23 and the precursors 24' and has had the mold 5 removed, from the etching reaction chamber 311. It then carries the substrate 21 through the corresponding channel 312 into the third electroplating reaction chamber 311. At this point, the mold 5 no longer constrains the precursors 24', and the nucleation sites formed by each precursor 24' are located at the endpoints 231 of their respective nano-core materials 23. Therefore, during the electrochemical deposition reaction, silver ions in each precursor 24' and silver ions in the electroplating medium are reduced and deposited from their respective endpoints 231 toward the metal layer 22. During deposition, a diffusion material 24, covering the entire outer surface of each nano-core material 23, grows along the X-axis.

[0033] At this point, each of the diffusion materials 24 is equivalent to an outer shell covering its respective nano-core material 23, and has an end wall 241 covering the endpoint 231 of the metal layer 22 away from the respective nano-core material 23, and a surrounding wall 242 extending from the end wall 241 toward the metal layer 22 and surrounding the respective nano-core material 23. The surrounding wall 242 and the end wall 241 define an opening 243 facing the metal layer 22 and allowing the respective nano-core material 23 to pass through. Each nano-core material 23 and its respective diffusion material 24 are constructed as a copper core with a silver shell. In this way, a nano-heterogeneous structure 200 is formed. From the SEM image of FIG14, it can be clearly seen that the nano-heterogeneous structure 200 is formed on the metal layer 22, and from the SEM images of FIG14 and FIG15, it can be seen that the outermost diffusion material 24 of the nano-heterogeneous structure 200 is visible.

[0034] Referring to Figure 16, when bonding the two semiconductor devices 2 on which the nano-heterogeneous structures 200 are formed, pre-bonding can be completed simply by applying pressure of about 15 MPa to the semiconductor devices 2 at room temperature for about 60 seconds. At this time, the nano-heterogeneous structures 200 exhibit an intertwined phenomenon, forming a bonding interface 25.

[0035] Next, the semiconductor device 2 is heat-treated at a pressure of approximately 10 MPa and an annealing temperature of approximately 300°C. This allows the diffusion material 24, i.e., the silver material, in the nano-heterostructure 200 to begin diffusing and filling the pores formed by the intertwining of the nano-core materials 23. As can be seen from the SEM image in Figure 17, the bonding interface 25 is almost pore-free, and the coverage of the bonding material reaches as high as 99.54%.

[0036] It should be noted that the nano-heterostructure 200 is not limited to being filamentous; in other variations of this embodiment, it can also be granular, as shown in FIG18. In this way, when bonding the two semiconductor devices 2, the diffuser 24 can fill the pores, thereby improving the coverage of the bonding material.

[0037] Furthermore, since this novel method employs electrochemical deposition (ECD) technology when electroplating the nano-core material 23, the precursor 24', and the diffuser 24, it can also utilize only a single process chamber 31 for electroplating. Only the different electroplating medium and the anode plate 321 need to be replaced for each electroplating operation.

[0038] Based on the above explanation, the advantages of the aforementioned embodiments can be summarized as follows:

[0039] 1. This new method can quickly deposit the nano core material 23 and the diffusion material 24 by electroplating, which is compatible with the mold 5 in the changes between the first mode and the second mode. This not only reduces equipment costs but also significantly improves process efficiency.

[0040] 2. This invention can also fill the pores when the two semiconductor devices 2 are joined by the diffusion material 24 on the outer surface of each nano-core material 23, thereby increasing the coverage of the bonding material to 99.54%. In this way, in addition to providing better conductivity and heat dissipation, the diffusion material 24 of the nano heterostructure 200 can protect the nano-core materials 23 from oxidation and reduce the risk of etching of the nano-core materials 23.

[0041] However, the above description is merely an embodiment of this invention and should not be construed as limiting the scope of implementation of this invention. Any simple equivalent changes and modifications made in accordance with the scope of the patent application and the contents of the patent specification shall still fall within the scope of this invention.

[0042] 2: Semiconductor devices 200: Nano-heterostructure 21: Substrate 22: Metal layer 23: Nano core materials 231: Endpoint 24: Diffusion Material 24': Precursor 241:End wall 242: wall 243: Opening 25: Interface 3: Process cavity unit 31: Process cavity 311: Reaction Chamber 312: Channel 32: Electroplating Module 321: Anode plate 322: Vehicle 33: Etching Module 4: Transmission Unit 41: Robotic Arm 42: Fixture 5: Mold 51: First mold face 52: Second mold surface 53: Nanopores X: Axis

Claims

1. A nano-heterostructure fabrication system for a semiconductor device, the semiconductor device including a substrate and a conductive metal layer formed on the substrate, the nano-heterostructure fabrication system comprising: a process chamber unit defining at least one reaction chamber adapted to accommodate an electroplating medium and the semiconductor device; and a mold removably formed on the metal layer, including a first mold surface, a second mold surface opposite to the first mold surface, and a plurality of nanopores extending from the first mold surface to the second mold surface, the mold being capable of changing relative to the metal layer between a first mode and a second mode, wherein in the first mode, the first mold surface contacts the metal layer, and each nanopore forms a nano core material deposited from metal ions in the electroplating medium and connected to the metal layer, and a precursor deposited on the nano core material; in the second mode, the mold is removed to allow metal ions in each precursor to deposit on the outer surface of their respective nano core material to form a diffusion material.

2. The nano-heterostructure fabrication system as described in claim 1, wherein, When the mold is in the first mode, each of the precursors is deposited on one end of its respective nanocore material away from the metal layer.

3. The nano-heterostructure fabrication system as described in claim 1, wherein, The process cavity unit has a channel communicating with the at least one reaction chamber, the channel allowing the semiconductor device to enter and exit the at least one reaction chamber.

4. A semiconductor device comprising: a substrate; a metal layer formed thereon and capable of conducting electricity; and a nano-heterostructure deposited using a nano-heterostructure fabrication system as described in claim 1, comprising a plurality of nano-cores connected to the metal layer and a plurality of diffusers, each of the diffusers covering the entire outer surface of its respective nano-core and defining an opening toward the metal layer.

5. The semiconductor device as claimed in claim 4, wherein, Each of the diffusion materials has an end wall covering one end of the metal layer away from its respective nanocore material, and a surrounding wall extending from the end wall toward the metal layer and surrounding its respective nanocore material.

6. The semiconductor device as claimed in claim 4, wherein, The metal layer comprises copper.

7. The semiconductor device as claimed in claim 6, wherein, The nano core material is formed by the reduction deposition of copper ions in the electroplating medium.

8. The semiconductor device as claimed in claim 4 or 7, wherein, The diffusion material is formed by the reduction deposition of silver ions in the precursor.

9. The semiconductor device as claimed in claim 4, wherein, Each nano core extends along an axis and is in the form of a filament.

10. The semiconductor device as claimed in claim 4, wherein, Each of these nano-core materials is in granular form.

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