Power module packaging structure

Abstract

A power module packaging structure includes a first metal substrate, multiple ceramic substrates, multiple second metal substrates, and multiple chips. The first metal substrate has an upper surface. The ceramic substrates are disposed on the upper surface of the first metal substrate at intervals. The second metal substrates are disposed on the side of the ceramic substrates opposite to the first metal substrate. The chips are disposed on the second metal substrates. By disposing multiple ceramic substrates at intervals on the first metal substrate, compared to the conventional technology using a single ceramic substrate, not only can the cost of the ceramic substrate be reduced, but the warping or even cracking of the ceramic substrate during high-temperature sintering can also be significantly improved, further enhancing the yield of the packaging structure.

Claims

1. A power module packaging structure, comprising: a first metal substrate having an upper surface; a plurality of ceramic substrates disposed at intervals on the upper surface of the first metal substrate; a plurality of second metal substrates disposed on a side of the ceramic substrates opposite to the first metal substrate; and a plurality of chips disposed on the second metal substrates.

2. The power module packaging structure as described in claim 1, wherein, One of the second metal substrates is disposed on two or more of the ceramic substrates.

3. The power module packaging structure as described in claim 1, wherein, One of the second metal substrates is disposed on one of the ceramic substrates.

4. The power module packaging structure as described in claim 1 further includes a driving integrated circuit disposed on the upper surface of the first metal substrate, wherein, These chips are electrically connected to the driving integrated circuit.

5. The power module packaging structure as described in claim 4, wherein, The driving integrated circuit is located on one of the central axes of the upper surface, and the ceramic substrates, the second metal substrates and the wafers are symmetrically distributed with respect to the central axis.

6. The power module packaging structure as described in claim 1, wherein, The outer edge of the first metal substrate is aligned with the outer edge of the second metal substrate.

7. The power module packaging structure as described in claim 1 further includes a plurality of first solder layers and a plurality of second solder layers, wherein, The ceramic substrates are fixedly disposed between the first metal substrate and the second metal substrate by the first solder layer and the second solder layer.

8. The power module packaging structure as described in claim 7, wherein, The materials of the first brazing layer and the second brazing layer include at least one of titanium, zirconium, copper, and silver.

9. The power module packaging structure as described in claim 1, further comprising a packaging layer, wherein, The encapsulation layer covers the first metal substrate, the ceramic substrates, the second metal substrates, and the wafers.

10. The power module packaging structure as described in claim 9 further includes a plurality of metal pins, wherein, Each of the metal pins has an inner end and an outer end, the inner end being embedded in the encapsulation layer and electrically connected to the corresponding chip, and the outer end being exposed in the encapsulation layer.

11. The power module packaging structure as described in claim 9, wherein, The encapsulation layer is made of epoxy resin encapsulation material.

12. The power module packaging structure as described in claim 1, wherein, The first metal substrate and the second metal substrate are copper substrates.

13. The power module packaging structure as described in claim 1, wherein, The primary material of these wafers is either silicon carbide or gallium nitride.

14. The power module packaging structure as described in claim 1, wherein, The wafers are soldered onto the second metal substrates through multiple solder layers.

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