Semiconductor package heat dissipation structure
Patent Information
- Application Number
- TW115203919
- Authority / Receiving Office
- TW · TW
- Patent Type
- Utility models
- Current Assignee / Owner
- Filing Date
- 2026-05-04
- Publication Date
- 2026-08-11
- Estimated Expiration
- 2036-05-03
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Abstract
Claims
1. A semiconductor package heat dissipation structure, comprising: A package includes a package substrate, a semiconductor wafer, and a package housing. The package substrate has a first side and a second side. The semiconductor wafer is disposed on the first side of the package substrate. The package housing is disposed on the first side of the package substrate and covers the package substrate. A plurality of mounting solder balls are disposed on the second side of the package substrate, and the mounting solder balls are electrically connected to the semiconductor wafer through the package substrate. A circuit board has an opening and a mounting surface. A plurality of solder pads are disposed on the mounting surface corresponding to the mounting solder balls. The solder pads surround the opening, and the mounting solder balls are respectively soldered to each of the solder pads. A first heat dissipation component is attached to the package housing. A second heat dissipation component is disposed on the second side of the package substrate through the opening.
2. The semiconductor package heat dissipation structure as claimed in claim 1, wherein the package includes an interposer layer disposed between the semiconductor wafer and the package substrate, and the interposer layer is provided with an interposer circuit, wherein the semiconductor wafer and the package substrate are electrically connected to the interposer circuit.
3. The semiconductor package heat dissipation structure as claimed in claim 2, wherein the interposer layer is provided with a plurality of interposer solder balls electrically connected to the interposer circuit, the interposer solder balls being respectively soldered to the first side of the package substrate.
4. The semiconductor package heat dissipation structure as claimed in claim 1, wherein the semiconductor wafer is provided with a plurality of wafer solder balls, which are electrically connected to the first side of the package substrate.
5. The semiconductor package heat dissipation structure as claimed in claim 1, wherein the package substrate is provided with a substrate circuit, and the mounting solder balls are electrically connected to the substrate circuit respectively.
6. The semiconductor package heat dissipation structure as claimed in claim 1, wherein the port is aligned with at least a portion of the semiconductor wafer.
7. The semiconductor package heat dissipation structure as claimed in claim 1, wherein the package substrate is made of silicon carbide, silicon, ceramic, glass or diamond.
8. The semiconductor package heat dissipation structure as claimed in claim 2, wherein the interlayer is made of silicon carbide, silicon, ceramic, glass, or diamond.
9. The semiconductor package heat dissipation structure as claimed in claim 2, wherein a thin film adhesive layer is attached to the surface of the package substrate to eliminate air gaps or bubbles.
10. The semiconductor package heat dissipation structure as claimed in claim 2, wherein a thin film adhesive layer is attached to the surface of the interposer to eliminate air gaps or bubbles.