Moving-picture decoding processing apparatus, moving-picture coding processing apparatus, and operating method of the same
a processing apparatus and moving picture technology, applied in the direction of electrical apparatus, digital video signal modification, pictureoral communication, etc., can solve the problems of parallel decoding process deterioration, and achieve the effect of reducing the deterioration of parallel processing capability
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first embodiment
Configuration of Moving-Picture Decoding Processing Apparatus
[0120]FIG. 1 is a diagram illustrating the configuration of a moving-picture decoding processing apparatus according to a first embodiment.
[0121]A moving-picture decoding processing apparatus of the first embodiment illustrated in FIG. 1 has a decoding control unit 10, a first decoding processing unit 20 (DEC0), a second decoding processing unit 21 (DEC1), a memory control unit 30, and a frame memory 40.
[0122]A coded bit stream BS generated by a not-illustrated moving-picture coding apparatus is supplied to the decoding control unit 10, and coded information of each of a first I frame I0, a second P frame P1, a third P frame P2, and a fourth P frame P3 is generated from the decoding control unit 10.
[0123]Also in the first embodiment illustrated in FIG. 1, to reduce hardware of the moving-picture decoding processing apparatus executing parallel decoding processing, coded information of the first I frame I0 and the third P f...
second embodiment
Configuration of Moving-Picture Coding Processing Apparatus
[0169]FIG. 3 is a diagram illustrating the configuration of a moving-picture coding processing apparatus according to a second embodiment.
[0170]A moving-picture decoding processing apparatus of the second embodiment illustrated in FIG. 3 has the decoding control unit 10, a first decoding processing unit 50 (ENC0), a second decoding processing unit 51 (ENC1), the memory control unit 30, the frame memory 40, stream buffers 60 and 70, and a stream synthesizing unit 80.
[0171]Since the video input signal VS to be processed is supplied to the memory control unit 30 as illustrated in FIG. 3, the memory control unit 30 stores the first and third frames as odd-numbered frames and the second and fourth frames as even-numbered frames in the video input signal VS into the frame memory 40.
[0172]The first and third frames as odd-numbered frames stored in the frame memory 40 and, after that, read by the memory control unit 30 are subjected...
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