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Semiconductor device

a technology of semiconductor devices and semiconductors, applied in the direction of semiconductor devices, basic electric elements, electrical equipment, etc., can solve the problems of difficult to maintain the normal-off characteristic, resistance can be reduced, and the above-described resistances rch, ras and rad become excessively high, so as to improve the character of the semiconductor device

Inactive Publication Date: 2015-04-30
RENESAS ELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

This configuration reduces on-resistance and enhances electron mobility, while maintaining the normally-off characteristic, thereby improving the overall performance and reliability of the semiconductor device.

Problems solved by technology

As a result, it has found that the above-described resistances Rch, Ras and Rad become excessively high.
As described above, it has found that, although the electron mobility can be improved, the channel resistance can be reduced, and the on resistance of the semiconductor device can be reduced by introducing the n-type impurities into the channel layer CH, it is difficult to maintain the normal-off characteristic.
This is because when the channel layer CH is excessively thin, sub-bands in the channel layer CH become discrete, which may result in increase in channel resistance.
Also, when the total film thickness of the channel layer CH is excessively large, holes are generated at an interface between the channel layer and the buffer layer, and the holes compensate the negative polarization charges at the interface.
However, when the sheet charge concentration Ns of the channel-carrier is excessively increased by making the n-type impurity concentration in the channel layer CH excessively high, the off withstand voltage of the device is lowered.
Therefore, there is a limit on the reduction of the on resistance.

Method used

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  • Semiconductor device
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first embodiment

[0090]Hereinafter, the semiconductor device of the first embodiment will be described in detail with reference to drawings. FIG. 1 is a sectional view showing a configuration of the semiconductor device of the present embodiment. FIGS. 2 to 10 are sectional views showing a manufacturing process of the semiconductor device of the present embodiment.

[0091]Here, in this specification, regarding the impurity concentration in semiconductor, a low concentration (for example, a concentration represented as n− (n minus), hereinafter described as nm) indicates a concentration in a range of 1e17 (1×1017) / cm3 or more to less than 1e18 (1×1018) / cm3. Also, an intermediate concentration (for example, a concentration represented as n) indicates a concentration in a range of 1e18 (1×1018) / cm3 or more to less than 1e19 (1×1019) / cm3. Further, a high concentration (concentration represented as n+ (n plus) in general) indicates a concentration of 1e19 (1×1019) / cm3 or more. A case where donor or accepto...

second embodiment

[0175]In the first embodiment, the example where the channel layer CH has the two-layered structure (nm / n structure) of the main channel layer CHa containing n-type impurities and the channel lower layer CHb positioned below the main channel layer CHa and containing n-type impurities at a concentration higher than the impurity concentration of the main channel layer CHa has been described, but the channel layer may have a three-layered structure. More specifically, the channel layer CH may have a three-layered structure (nm / n / un) of a main channel layer CHa containing n-type impurities, a channel first lower layer CHb positioned below the main channel layer CHa and containing n-type impurities at a concentration higher than the impurity concentration of the main channel layer CHa, and an undoped channel second lower layer CHc positioned below the channel first lower layer CHb.

[0176]This structure corresponds to the structure where the undoped channel second lower layer CHc is provid...

third embodiment

[0201]In the second embodiment, the channel layer CH has the three-layered structure (nm / n / un structure), but the channel layer CH may have a two-layered structure (n / un structure) of a main channel layer CHA containing n-type impurities at an intermediate concentration and an undoped channel lower layer CHB positioned below the main channel layer CHA. This structure corresponds to a configuration in which the main channel layer CHa has been removed from the channel layer CH of the second embodiment (FIG. 24) composed of the main channel layer CHa, the channel first lower layer CHb positioned below the main channel layer CHa and containing n-type impurities at a concentration higher than the impurity concentration of the main channel layer CHa, and the undoped channel second lower layer CHc positioned below the channel first lower layer CHb.

[0202][Description of Structure]

[0203]FIG. 28 is a sectional view showing a configuration of a semiconductor device of the present embodiment. T...

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Abstract

A semiconductor device including a first nitride semiconductor layer formed over a substrate, a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a band gap wider than that of the first nitride semiconductor layer, a trench penetrating through the second nitride semiconductor layer to reach the middle of the first nitride semiconductor layer, a conductive film formed at a corner portion corresponding to an end portion of a bottom surface of the trench and a gate electrode disposed via a gate insulating film inside the trench including a region on the conductive film.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]The present application is a Continuation Application of U.S. patent application Ser. No. 14 / 188,462, filed on Feb. 24, 2014, which claims priority from Japanese Patent Applications No. 2013-035055 filed on Feb. 25, 2013 and No. 2013-141305 filed on Jul. 5, 2013, the contents of which are hereby incorporated by reference into this application.TECHNICAL FIELD OF THE INVENTION[0002]The present invention relates to a semiconductor device and can be suitably utilized for a semiconductor device using nitride semiconductor.BACKGROUND OF THE INVENTION[0003]In recent years, attention has been paid to semiconductor devices using a group III-V compound having a band gap larger than that of Si. Among them, development of a semiconductor device using gallium nitride (GaN) which has such advantages as 1) large breakdown field, 2) large electron saturation rate, 3) large thermal conductivity, 4) capability for formation of excellent heterojunction betwe...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/778H01L29/66H01L29/423
CPCH01L29/778H01L29/66431H01L29/4236H01L29/105H01L29/36H01L29/66462H01L29/7783H01L29/7786H01L29/7789H01L29/2003H01L29/41758H01L29/1045H01L29/452H01L21/76895
Inventor KAWAI, TOHRUINOUE, TAKASHINAKAYAMA, TATSUOOKAMOTO, YASUHIROMIYAMOTO, HIRONOBU
Owner RENESAS ELECTRONICS CORP