Resistive random access memory and method for manufacturing the same

Abstract

A resistive random access memory including a substrate, a dielectric layer disposed on the substrate and at least one memory cell string is provided. The memory cell string includes memory cells and second vias. The memory cells are vertically and adjacently disposed in the dielectric layer, and each of the memory cells includes a first via, two conductive lines respectively disposed at two sides of the first via and two variable resistance structures respectively disposed between the first via and the conductive lines. In the vertically adjacent two memory cells, the variable resistance structures of the upper memory cell and the variable resistance structures of the lower memory cell are isolated from each other. The second vias are respectively disposed in the dielectric layer under the first vias and connected to the first vias, and the vertically adjacent two first vias are connected by the second via.

Description

CROSS-REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of Taiwan application serial no. 103137209, filed on Oct. 28, 2014. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The invention relates to a memory and a method for manufacturing the same, and more particularly, relates to a resistive random access memory and a method for manufacturing the same.[0004]2. Description of Related Art[0005]A non-volatile memory is characterized by storing data even when the power is off, and thus the non-volatile memory has become a mandatory memory in many electronic products for providing normal operation when the electronic products are booted. Currently, a resistive random access memory (RRAM) is a non-volatile memory under positive developments in the industry, which has advantages including low writing operati...

AI Technical Summary

Benefits of technology

Enables the manufacturing of 3D RRAM without deep etching and filling processes, facilitating integration with CMOS logic and reducing parasitic capacitance through minimized routing distances.

Problems solved by technology

However, the 3D RRAM usually requires a deep etching process and a deep filling process to be performed, which means that it cannot be directly integrated with an advanced logic process.

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