Semiconductor integrated circuit device with a plurality of memory cells storing data

Abstract

A semiconductor integrated circuit device includes a plurality of memory cells storing data; a write current line arranged near the memory cells or electrically connected to the memory cells; a first constant current generating circuit providing an output current having a temperature dependence; a second constant current generating circuit providing an output current having a temperature dependence different from that of the output current of the first constant current generating circuit; a mixing circuit mixing the output currents of the constant current generating circuits together to provide a composite current at a variable mixing rate; and a write current electrically connected to the write current line and writing data into the memory cell by passing a write circuit through the write current line based on the composite current provided by the mixing circuit.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The present invention relates to a semiconductor integrated circuit device, and particularly to a semiconductor integrated circuit device with a plurality of memory cells storing data.[0003]2. Description of the Background Art[0004]In a Magnetic Random-Access Memory (MRAM), memory cells include TMR (Tunneling Magneto Resistive) elements having a TNR effect. The MRAM includes a plurality of memory cells that are aligned and arranged at crossing portions of bit lines and digit lines, respectively. The TMR element includes magnetic thin films and a tunneling oxide film held therebetween, and has a resistance which takes a minimum value when directions of the magnetic moments of the upper and lower magnetic thin films are parallel to each other, and takes a maximum value when these direction are antiparallel.[0005]The memory cell stores logical information in accordance with “0” and “1” that correspond to the parallel relat...

AI Technical Summary

Benefits of technology

[0013]An object of the invention is to provide a semiconductor integrated circuit device that can deal with variations in temperature dependence of the write current threshold in each memory cell.

Problems solved by technology

However, when the drive current of the bit or digit line is excessively large, the magnetic field to be exerted on a write target memory cell may affect memory cells other than the write target memory cell, i.e., the memory cells such as memory cells in a half-selected state that are located on one of the bit and digit lines corresponding to the write target memory cell, and thereby may cause them to malfunction.

However, the semiconductor integrated circuit disclosed in the patent reference 5 is not configured to deal with a temperature dependence of the write current.

However, each of the semiconductor memory devices disclosed in the patent references 2-4 may enter such a situation that data cannot be written correctly into the memory cell at a temperature different from the temperature at which the write current was tuned, due to variations in temperature dependence of the write current threshold among the memory cells.

Thus, the structures disclosed in the patent references 2-4 suffer from a problem that the structure cannot deal with the variations in temperature dependence of the write current threshold among the memory cells.

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