Semiconductor packages and methods for fabricating thermal-minimizing structures in semiconductor packages

VN10059347BActive Publication Date: 2026-07-15QUALCOMM INC
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Patent Information

Application Number
VN1202207948
Authority / Receiving Office
VN · VN
Patent Type
Patents
Current Assignee / Owner
Filing Date
2021-05-04
Publication Date
2026-07-15
Estimated Expiration
2041-05-04
Patent Text Reader

Abstract

The invention relates to a semiconductor package, comprising a first integrated passive device (IPD) in a first interlayer-dielectric (ILD) layer on top of the first ILD layer. The semiconductor package also includes a second ILD layer on top of the first ILD layer. The semiconductor package also includes a second IPD in a third ILD layer on top of the second ILD layer. The semiconductor package also includes a thermal damping structure on the sensing elements of the second IPD. The invention also describes a method for masking structures that minimize heat transfer in semiconductor packages.
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