Field-effect semiconductors

Abstract

The term "edge-effect transistor" refers to field-effect transistors (FETs) that utilize edge-conduction current suppression to reduce FET leakage, and related methods. Edge-conduction FETs consist of edge-conduction regions with extended lengths overlapping the edges of the semiconductor layer to form elongated edge channels within the edge transistors. In this way, the threshold voltage of the edge transistor is increased, thus reducing the leakage current of the edge transistors and the overall leakage current of the FET. Alternatively, the body-connecting pins are created to short the source or drain region of the FET body, which is extended lengthwise to form body-connecting pins located beneath at least part of the edge gate regions. In this way, the work functions of the edge gate regions are increased in voltage, thus increasing the threshold voltage of the edge transistors and reducing the leakage current of the edge transistors and FETs.