Prozessoren mit standardetiketten zum schreiben auf speicher von vorrichtungen, die nicht mit einer speichermarkierungserweiterung konform sind, und zugehörige verfahren
AT1924329TActive Publication Date: 2026-06-15AMPERE COMPUTING LLC
0 Cites 0 Cited by
Patent Information
- Application Number
- AT2024202112T
- Authority / Receiving Office
- AT · AT
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2023-09-29
- Filing Date
- 2024-09-24
- Publication Date
- 2026-06-15
- Estimated Expiration
- 2044-09-24
Abstract
A processor that includes a memory tagging extension (MTE) provides default tag bits employed when external devices, which are not compliant with MTE, access the memory circuit (e.g., employing direct memory access (DMA)). The default tag bits are stored as first tag bits with the data in memory. The processing circuit can include a mode indicator indicating whether default tag bits are employed. In a first mode, in which the default tag bits are not employed, an exception signal may be immediately generated in response to a mismatch between the first tag bits and second tag bits in the memory instruction. In a second mode, in response to a mismatch, the first tag bits are further compared to the default tag bits and an error may be generated in response to a mismatch between the first tag bits and the default tag bits.
Need to check novelty before this filing date? Find Prior Art