Pre-screening and tuning heterojunctions for topological quantum computer

Abstract

A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer includes measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space, to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

Description

[00136] FIG. 13 shows additional aspects of finding, by analysis of the refinement data, a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions 5 of the parameter space interrogated in method 66A. In some examples, the illustrated method is performed iteratively for each promising region.

[00137] At 126 of method 68A, step 110 of method 64A is repeated in order to verify that the measured region is still promising, and potentially to adjust the boundaries of the candidate topological region. At this point, analysis of the refinement data includes 10 verifying gap closure at the boundary of each of the one or more regions of the parameter space. At 128 a check is performed to determine what fraction of the boundary of the promising region is gapless, based on the non-local conductance signal. At 130 the size of the gap Aj') for each point i within the region j is extracted by thresholding the non-local conductance. At 132, based on the extent of a gapless boundary, and on the value of the gap 15 within the candidate topological region, a score is assigned to the region. The score reflects the likelihood that the promising region is indeed topological and gapped. In some examples, the score S is defined by Si = X • mediani(Aj')). At 134 the largest gap inside each topological region is obtained, together with an estimate of the error. In some examples, the error bar is dictated by the uncertainty in the thresholding of non-local conductance at the 20 point of the largest gap.

[00138] The output of this analysis includes a set of probabilities corresponding to the regions identified in mapping phase 58 of method 56—viz., the probability of hosting an unbroken topological phase. Associated with each probability is the maximal (topological) gap inside each of the (non-trivial) regions. FIG. 14 shows aspects of analysis of refinement 25 data according to method 68A, using the same simulation as in FIG. 10. From left to right: gap extracted from the non-local data; score of the ZBP clusters as defined by average gap within the region times the percentage of the boundary that is gapless; and score of the ZBP clusters, same as the middle figure, but with average gap replaced by the median gap in the region. The maximal gap within the region is 175 peV. Accordingly, the output of the 30 overall method 56 is an estimate for the value of the topological gap in each promising region and its position in the explored parameter space. Detailed examples of false positives and false negatives

[00139] One possible issue of quasi-Majoranas is that they can occur as precursors of a true topological regime. This means a topological region could be directly adjacent (in 2021229303   28 Sep 2026 parameter space) to a non-topological quasi-Majorana regime. In that case, the current algorithm that clusters regions of correlated ZBPs could identify a region that is too large in the mapping phase. In other words, while containing the topological region, the identified region could extend much farther, including some of the quasi-Majorana regime. In that 5 case, the current analysis in the refinement phase is set up to fail by either identifying too much of parameter space as topological or not recognizing the topological regions because of the absence of gap closing / reopening in the quasi-Majorana regime.

[00140] A solution to this problem is to implement another clustering algorithm in the refinement phase that identifies lines of gap-closing / reopening features in parameter space 10 (specifically in field-plunger space), and then determine intersections of these lines with the regions of correlated ZBPs to find topological phases. Note that this is mostly a problem of data analysis in the refinement phase. The mapping phase is still suitable for identifying promising regions of data that are examined more closely in the refinement phase.

[00141] Unstable behavior in data analysis may result from cuts of the data for a fixed 15 cutter voltage. Stability can be improved by using one or both cutter-gate potentials as additional dimensions in refinement data analysis 68. This should improve clustering and make better use of the available dataset.

[00142] The following example addresses smooth potentials at the ends of the semiconductor wire, which are associated with quasi-Majoranas and false negatives. The 20 presence of long-range inhomogeneities (smooth potential variations) can make it more difficult to observe the gap-closing / reopening features, thus leading to false negatives. Interestingly, smooth potential variations are also the regime in which one would expect quasi-Majorana modes. Here the interplay between the two effects is discussed.

[00143] A typical scenario where quasi-Majorana modes appear is when a system is tuned 25 close-to but outside of the topological phase. For concreteness, consider an example where - at a fixed magnetic field the chemical potential 11 is smaller than the critical chemical potential 11 c required to enter the topological phase. A smooth potential variation can be interpreted as a spatially varying chemical potential ^(x) = it0 V (x), where V (x) is the potential. In the above scenario, it is possible for a potential dip close to the (here right) end 30 of the semiconductor wire, as shown in FIG. 15, to locally tune the system into the topological regime ^(x) > pc, which leads to a local pair of Majorana modes. The latter manifest in the local conductance at the right end at much lower fields as the topological phase transition in the bulk of the semiconductor wire (which can be read off via the local conductance at the other (left) end where no smooth potential variation is present). 2021229303   28 Sep 2026

[00144] FIG. 15 shows the effect of a smooth potential at the right end of the semiconductor wire in a 1D model. Left: Spatial dependence of the potential (lower panel) and position of the superconducting shell implemented via self-energy (orange, upper panel) of the semiconductor wire. Right: Conductance matrix including the antisymmetric part of 5 the non-local conductance. Note that there is no gap-reopening feature in the non-local conductance. The only feature of the phase transition is the onset of weak Majorana oscillations.

[00145] Specifically, in the example in FIG. 15, the phase transition at fixed chemical potential is at Be ~ 2. 7 T. The ZBPs due to quasi-Majorana modes appearing around B ~ 1 10 T would correctly be labeled as non-topological in method 56 since there is no gap closing and reopening feature in the non-local conductance. However, even at the topological phase transition there is no gap-closing / reopening feature visible. The reason is that the part of the system under the smooth potential at the right side already went through the phase transition and is therefore gapped when B crosses BC. This suppresses the signal of the bulk modes at 15 the phase transition since they couple only evanescently to the right lead. Note that in this particular model the topological gap is 100 peV and thus larger than we would expect in realistic systems. For a smaller gap, the non-local signal becomes larger thus increasing the strength of the gap-closing / reopening feature. Nevertheless, since the signal of the finite-size oscillations will also become stronger, it can remain difficult to observe the gap- 20 closing / reopening.

[00146] In conclusion, while quasi-Majorana modes at the end of the semiconductor wire do not lead to false positive features in the non-local conductance, the presence of quasiMajorana modes increases the chance of false negatives once the system is tuned into the topological phase. 25

[00147] A second example addresses smooth potentials in the center of the semiconductor wire, associated with false positives. Here we discuss the only example identified that can have ZBPs at both ends of the semiconductor wire and a non-trivial feature in the non-local conductance that could be interpreted as a gap closing (and potentially a reopening), while the bulk of the system is non-topological. 30

[00148] The setup is depicted in FIG. 16. The bulk of the semiconductor wire is tuned to be non-topological while a smooth potential bump in the center of the semiconductor wire reaches the topological regime of the potential. One can therefore think of a pair of Majorana zero modes nucleating in the center of the semiconductor wire. While the center region is chosen too small for well-separated Majorana modes, the smoothness of the potential could 2021229303   28 Sep 2026 lead to close-by but weakly-coupled quasi Majorana modes in the center of the semiconductor wire.

[00149] Due to finite-size effects, the corresponding zero modes can be probed as correlated ZBPs in the conductance at each end, as shown in FIG. 16. Moreover, since the 5 low-energy modes at the center overlap with both sides they also contribute to the non-local conductance, which could be misinterpreted as a gap closing.

[00150] FIG. 16 shows the effect of smooth potential at the center of the semiconductor wire in a 1D model. Left: Spatial dependence of the potential (lower panel) and position of the superconducting shell implemented via self-energy (orange, upper panel) of the 10 semiconductor wire. Right: Conductance matrix including the antisymmetric part of the non-local conductance. Note that due to finite-size effects the quasi-Majorana modes nucleated in the center regions are visible as correlated ZBPs and also contribute to the nonlocal conductance.

[00151] FIG. 17 illustrates data analysis over field / plunger parameter space of the gap 15 method for a 1D model with a potential bump in the center of the semiconductor wire. Left: Detected ZBPs. Right: Gap determined from the data. In this case, the ZBP finder detects two overlapping regions: one centered around plunger = 0 (bulk topological region) and one centered around plunger = 0.0025 (center bump topological). It is unclear whether this case represents a false positive (outside of the bulk topological region) because there is a small 20 topological region in the center, and finite-size effects are significant. In fact, finite-size effects lead to features in the gap-closing of each of the regions (center and bulk) in the estimated gap extracted from the data.

[00152] This problematic example illustrates the value of continued development of the data analysis used in the methods herein. Note that the ZBP clustering algorithm has 25 identified both regions (center and bulk) as a single region. This example illustrates how non-topological regions adjacent to topological regions may be comparatively difficult to separate and may require further refinement in data analysis.

[00153] A third example relates to non-topological ZBPs due to strong disorder. Represented here is an example of a one-dimensional model with strong disorder. To 30 illustrate, FIG. 18 shows data analysis over field / plunger parameter space of a strongly disordered 1D model. Left: points of correlated ZBPs (red) Right: extracted gap at each point in parameter space. While ZBPs are present, the data in FIG. 18 indicates that the regions of correlated ZBPs are sparse and largely disconnected. Strongly disordered region can thus be ruled out by the gap method by adding requirements for the size and continuity 2021229303   28 Sep 2026 of the identified regions. Instrumentation and Additional Methods

[00154] While the features and examples disclosed herein relate to methods for evaluating a semiconductor-superconductor heterojunction for use in a qubit register of a topological 5 quantum computer, such features and examples are also applicable to related instrumentation. FIG. 19 shows aspects of an example instrument 136 configured to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer. Instrument comprises a controller 18B. The controller includes at least one processor 20B and computer memory 22B coupled operatively to the processor. The 10 computer memory is configured to hold instructions 24B that cause the processor to enact the various measurement and analysis methods described herein. To that end, the processor may be coupled operatively to RF admittance-measurement device 138 and to a sub-RF conductance-measurement device 140. The RF admittance-measurement device may include features as illustrated in FIG. 7; the sub-RF conductance-measurement device may 15 include features as illustrated in FIG. 11. In the illustrated example, instrument 136 includes an interface 142 that couples the processor to the measurement devices and also provides control signals to the electrostatic gates of device 48 and to magnet 144.

[00155] The features and examples disclosed herein relate equally to methods for building a topological quantum computer. FIG. 20 shows aspects of an example method 146 for 20 building a topological quantum computer.

[00156] Fabricated at 148 of method 146 is a semiconductor-superconductor heterojunction having at least three terminals configured to support electronic admittance testing. At 62 RF junction admittance of the semiconductor-superconductor heterojunction is measured to obtain mapping data. At 64, by analysis of the mapping data, one or more 25 regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction is found. At 66 a sub-RF conductance of the semiconductor-superconductor heterojunction is measured in each of the one or more regions of the parameter space, to obtain refinement data. At 68, by analysis of the refinement data, a boundary of the unbroken topological phase in the parameter space and 30 a topological gap of the semiconductor-superconductor heterojunction are found for at least one of the one or more regions of the parameter space. At 150 the semiconductorsuperconductor heterojunction is incorporated into a qubit register of the topological quantum computer, provided that the found boundary and topological gap are within respective, predefined ranges. In operation of the topological quantum computer built in this 2021229303   28 Sep 2026 manner, one or more values characterizing the boundary in the parameter space may be used as tuning parameters for addressing the semiconductor-superconductor heterojunction in the qubit register.

[00157] For additional context, the following references are provided. 5

[00158] T. 0. Rosdahl, A. Vuik, M. Kjaergaard, and A. R. Akhmerov, Andreev rectifier: A nonlocal conductance signature of topological phase transitions, Phys. Rev. B 97, 045421 (2018).

[00159] Jeroen Danon, Anna Birk Hellenes, Esben Bork Hansen, Lucas Casparis, Andrew P. Higginbotham, and Karsten Flensberg, Nonlocal conductance 10 spectroscopy of Andreev bound states: Symmetry relations and BCS charges, arXiv:1905.05438 [cond-mat] (2019), arXiv:1905.05438 [cond-mat].

[00160] G. C. Menard, G. L. R. Anselmetti, E. A. Martinez, D. Puglia, F. K. Malinowski, J. S. Lee, S. Choi, M. Pendharkar, C. J. Palmstrom, K. Flensberg, C. M. Marcus, L. Casparis, and A. P. Higginbotham, 15 Conductance-matrix symmetries of a three-terminal hybrid device, arXiv:1905.05505 [cond-mat] (2019), arXiv:1905.05505 [cond-mat].

[00161] Davydas Razmadze, Deividas Sabonis, Filip K. Malinowski, Gerbold C. Menard, Sebastian Pauka, Hung Nguyen, David M.T. van Zanten, Eoin C.T. O’Farrell, Judith Suter, Peter Krogstrup, Ferdinand Kuemmeth, and Charles 20 M. Marcus, Radio-Frequency Methods for Majorana-Based Quantum Devices: Fast Charge Sensing and Phase-Diagram Mapping, Phys. Rev. Applied 11, 064011 (2019).

[00162] MITEQ AFS4-00100800-14-10P-4. Conclusion 25

[00163] In conclusion, one aspect of this disclosure is directed to method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer. The method comprises: measuring a radio-frequency (RF) junction admittance of the semiconductor-superconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent 30 with an unbroken topological phase of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductorsuperconductor heterojunction in each of the one or more regions of the parameter space to obtain refinement data; and finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the 2021229303   28 Sep 2026 semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

[00164] In some implementations, the analysis of the mapping data includes density-based clustering on zero-bias peak data from opposite ends of the semiconductor-superconductor 5 heterojunction. In some implementations, the method further comprises validating a zerobias peak (ZBP) in each of the one or more regions by checking stability of the ZBP to variations in cutter-gate voltage. In some implementations, the analysis of the refinement data includes verifying gap closure at the boundary of each of the one or more regions of the parameter space. In some implementations, the semiconductor-superconductor 10 heterojunction is one of a series of analogously prepared semiconductor-superconductor heterojunctions, the method further comprising meta-analysis of zero-bias peak data across the series to compute a probability of finding a topological region in another analogously prepared semiconductor-superconductor heterojunction. In some implementations, measuring the sub-RF conductance includes enacting local and non-local conductance 15 measurement suitable for extracting an energy gap of the semiconductor-superconductor heterojunction. In some implementations, the semiconductor-superconductor heterojunction comprises a semiconductor wire and at least three terminals supporting admittance and conductance measurement at opposite ends of the semiconductor wire. In some implementations, the semiconductor-superconductor heterojunction comprises a plurality of 20 electrostatic control terminals.

[00165] Another aspect of this disclosure is directed to an instrument configured to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer. The instrument comprises: a controller having a processor and computer memory coupled operatively to the processor, the controller being configured 25 to: measure a radio-frequency (RF) junction admittance of the semiconductorsuperconductor heterojunction to obtain mapping data; find by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction; measure a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in 30 each of the one or more regions of the parameter space to obtain refinement data; and find by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

[00166] In some implementations, the controller is configured to analyze the mapping data 2021229303   28 Sep 2026 using density-based clustering on zero-bias peak data from opposite ends of the semiconductor-superconductor heterojunction. In some implementations, the controller is further configured to validate a zero-bias peak (ZBP) in each of the one or more regions by checking stability of the ZBP to variations in cutter-gate voltage. In some implementations, 5 the controller is configured to analyze the refinement data by verifying gap closure at the boundary of each of the one or more regions of the parameter space. In some implementations, the semiconductor-superconductor heterojunction is one of a series of analogously prepared semiconductor-superconductor heterojunctions, wherein the controller is configured to meta-analyze zero-bias peak data across the series to compute a 10 probability of finding a topological region in another analogously prepared semiconductor superconductor heterojunction. In some implementations, the instrument is coupled operatively to an RF admittance-measurement device and to a sub-RF conductancemeasurement device.

[00167] Another aspect of this disclosure is directed to a method for building a topological 15 quantum computer. The method comprises: fabricating a semiconductor-superconductor heterojunction having at least three terminals configured to support electronic admittance testing; measuring a radio-frequency (RF) junction admittance of the semiconductorsuperconductor heterojunction to obtain mapping data; finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase 20 of the semiconductor-superconductor heterojunction; measuring a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space to obtain refinement data; finding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction 25 for at least one of the one or more regions of the parameter space; and incorporating the semiconductor-superconductor heterojunction in a qubit register of the topological quantum computer provided that the found boundary and topological gap are within respective, predefined ranges.

[00168] In some implementations, the analysis of the mapping data includes density-based 30 clustering on zero-bias peak data from opposite ends of the semiconductor-superconductor heterojunction. In some implementations, the method further comprises validating a zerobias peak (ZBP) in each of the one or more regions by checking stability of the ZBP to variations in cutter-gate voltage. In some implementations, the analysis of the refinement data includes verifying gap closure at the boundary of each of the one or more regions of 2021229303   28 Sep 2026 the parameter space. In some implementations, the semiconductor-superconductor heterojunction is one of a series of analogously prepared semiconductor-superconductor heterojunctions, the method further comprising meta-analysis of zero-bias peak data across the series to compute a probability of finding a topological region in another analogously 5 prepared semiconductor-superconductor heterojunction. In some implementations, one or more values characterizing the boundary in the parameter space are used as tuning parameters for addressing the semiconductor-superconductor heterojunction in the qubit register.

[00169] Another aspect of this disclosure is directed to a two-stage approach to the 10 extraction of the topological phase. Significantly, this includes separation by stages whereupon a mapping phase allows for extensive search of the parameter space while still producing false positives, and a refinement stage allows for weeding out false positives slowly scanning the regions of interest from the mapping phase. Another aspect of this disclosure is directed to using density-based clustering algorithms on the two-sided ZBP 15 data to extract predicted topological regions. Significantly, this includes clustering algorithms used for this purpose. It is believed to be the first systematic approach for finding promising regions. Another aspect of this disclosure is directed to mapping between the RF and DC conductance for the purpose of the fast conductance extraction in the RF measurement. Significantly, this includes usage of the mapping to bypass DC conductance 20 measurement and still extract the same data but much faster due to the faster RF technique. Another aspect of this disclosure is directed to classification of bias traces using peak finding or machine learning. Significantly, this includes machine learning of topological traces and statistical characterization of how good peak finding is. Another aspect of this disclosure is directed to extraction of the gap from non-local conductance traces, specifically using bias 25 traces together with experimental noise or filtering and smoothening of bias / field scans. Significantly, this includes the automatic gap extraction. Another aspect of this disclosure is directed to improvement of the accuracy of previous methods by checking for gap closing at the boundary of the suspect topological region. Significantly, this includes application of the extraction of the gap from the data to classify the regions into topological / trivial ones. 30 Another aspect of this disclosure is directed to meta-analysis of the ZBP data to extract the probability of finding topological regions across many devices of the same preparation. This can be used in order to characterize the growth / fabrication method via a topological phase diagram. Another aspect of this disclosure is directed to using any of the above to tune up a qubit of a topological quantum computer. 2021229303   28 Sep 2026

[00170] It will be understood that the configurations and / or approaches described herein are exemplary in nature, and that these specific embodiments or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of 5 processing strategies. As such, various acts illustrated and / or described may be performed in the sequence illustrated and / or described, in other sequences, in parallel, or omitted. Likewise, the order of the above-described processes may be changed.

[00171] The subject matter of the present disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations, 10 and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.

[00172] Throughout this specification and the claims which follow, unless the context requires otherwise, the word "comprise", and variations such as "comprises" and "comprising", will be understood to imply the inclusion of a stated integer or step or group 15 of integers or steps but not the exclusion of any other integer or step or group of integers or steps.

[00173] The reference in this specification to any prior publication (or information derived from it), or to any matter which is known, is not, and should not be taken as an acknowledgment or admission or any form of suggestion that that prior publication (or 20 information derived from it) or known matter forms part of the common general knowledge in the field of endeavour to which this specification relates.

Claims

1. A method to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer, the method comprising:measuring a radio-frequency (RF) junction admittance of the semiconductorsuperconductor heterojunction to obtain mapping data;finding by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction;measuring a sub-RF conductance including a non-local conductance of the semiconductorsuperconductor heterojunction in each of the one or more regions of the parameter space to obtain refinement data; andfinding by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

2. The method of claim 1 wherein the analysis of the mapping data includes densitybased clustering on zero-bias peak data from opposite ends of the semiconductorsuperconductor heterojunction.

3. The method of claim 1 further comprising validating a zero-bias peak (ZBP) in each of the one or more regions by checking stability of the ZBP to variations in cutter-gate voltage.

4. The method of claim 1 wherein the analysis of the refinement data includes verifying gap closure at the boundary of each of the one or more regions of the parameter space.

5. The method of claim 1 wherein the semiconductor-superconductor heterojunction is one of a series of analogously prepared semiconductor-superconductor heterojunctions, the method further comprising meta-analysis of zero-bias peak data across the series to compute a probability of finding a topological region in another analogously prepared semiconductor-superconductor heterojunction.

6. The method of claim 1 wherein measuring the sub-RF conductance includes enacting local and non-local conductance measurement suitable for extracting an energy gap of the2021229303   28 Sep 2026semiconductor-superconductor heterojunction.

7. The method of claim 1 wherein the semiconductor-superconductor heterojunction comprises a semiconductor wire and at least three terminals supporting admittance and conductance measurement at opposite ends of the semiconductor wire.

8. The method of claim 1 wherein the semiconductor-superconductor heterojunction comprises a plurality of electrostatic control terminals.

9. The method of claim 1 further comprising:fabricating a semiconductor-superconductor heterojunction having at least three terminals configured to support electronic admittance testing; andincorporating the semiconductor-superconductor heterojunction in a qubit register of the topological quantum computer provided that the found boundary and topological gap are within respective, predefined ranges.

10. An instrument configured to evaluate a semiconductor-superconductor heterojunction for use in a qubit register of a topological quantum computer, the instrument comprising:a controller having a processor and computer memory coupled operatively to the processor, the controller being configured to:measure a radio-frequency (RF) junction admittance of the semiconductorsuperconductor heterojunction to obtain mapping data;find by analysis of the mapping data one or more regions of a parameter space consistent with an unbroken topological phase of the semiconductor-superconductor heterojunction;measure a sub-RF conductance including a non-local conductance of the semiconductor-superconductor heterojunction in each of the one or more regions of the parameter space to obtain refinement data; andfind by analysis of the refinement data a boundary of the unbroken topological phase in the parameter space and a topological gap of the semiconductor-superconductor heterojunction for at least one of the one or more regions of the parameter space.

11. The instrument of claim 10 wherein the controller is configured to analyze the2021229303   28 Sep 2026mapping data using density-based clustering on zero-bias peak data from opposite ends of the semiconductor-superconductor heterojunction.

12. The instrument of claim 10 wherein the controller is further configured to validate a zero-bias peak (ZBP) in each of the one or more regions by checking stability of the ZBP to variations in cutter-gate voltage.

13. The instrument of claim 10 wherein the controller is configured to analyze the refinement data by verifying gap closure at the boundary of each of the one or more regions of the parameter space.

14. The instrument of claim 10 wherein the semiconductor-superconductor heterojunction is one of a series of analogously prepared semiconductor-superconductor heterojunctions, wherein the controller is configured to meta-analyze zero-bias peak data across the series to compute a probability of finding a topological region in another analogously prepared semiconductor-superconductor heterojunction.

15. The instrument of claim 10 wherein the instrument is coupled operatively to an RF admittance-measurement device and to a sub-RF conductance-measurement device.

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