System and method for enforcement and verification of authorised execution using cryptographic sealing and tamper-evident records

Abstract

20 26 20 13 26 22 F eb 2 02 6 2 0 2 6 2 0 1 3 2 6 2 2 F e b 2 0 2 6 DRAWINGS Patent C — The Shield System and method for enforcement and verification of authorised execution using cryptographic sealing and tamper-evident records BRIEF DESCRIPTION OF DRAWING FIG. 1 is a system architecture block diagram showing the runtime integrity verification system comprising: TPM 2.0 Hardware Root of Trust (100) with PCR Banks 10, 14, 15; Baseline Measurement Module (200) with rdtsc timing sensor (210) and Intel DRAWINGS Patent C - The Shield records FIG. 1 100 TPM 2.0 HARDWARE ROOT OF TRUST (PCR Banks: 10, 14, 15) 210 200 220 rdtsc Intel RAPL BASELINE MEASUREMENT TIMING POWERMODULESENSOR MONITOR 300 CONTINUOUS INTEGRITY MONITOR 410 400 420 LATENCY POWERANOMALY DETECTION JITTER SIGNATURE ANALYSIS ENGINE (3-sigma threshold) ANALYSIS DECOY SYSTEM 5 0 50 0 520 DECOY CANARYDECOY EXECUTION REGISTRY PROMPTPATH SYSTEM (TPM Sealed) DETECTOR 600 GRADUATED RESPONSE CONTROLLER 610 620 630 ALERT WORKLOAD AUTOMATIC ESCALATION ISOLATION REMEDIATION 700 SHA-3-512 EVIDENCE LEDGER PQ ATTESTATION (FIPS 204 / 205) BRIEF DESCRIPTION OF DRAWING 20 26 20 13 26 22 F eb 2 02 6 D R A W I N G S 2 0 2 6 2 0 1 3 2 6 2 2 F e b 2 0 2 6 r e c o r d s T P M 2 . 0 H A R D W A R E R O O T O F T R U S T 2 1 0 2 0 0 2 2 0 T I M I N G P O W E R C O N T I N U O U S I N T E G R I T Y 4 1 0 4 0 0 4 2 0 A N A L Y S I S D E C O Y 5 1 0 5 0 0 5 2 0 D E C O Y C A N A R Y D E C O Y E X E C U T I O N 6 0 0 G R A D U A T E D R E S P O N S E 6 1 0 6 2 0 6 3 0 A L E R T W O R K L O A D A U T O M A T I C 7 0 0 S H A - 3 - 5 1 2 E V I D E N C E B R I E F D E S C R I P T I O N O F D R A W I N G

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