ELECTRICAL DISCHARGE PROTECTION DEVICE WITH IMPROVED TIMING

Description

BE2025 / 5001 2 triggeringdevice500.Saidbufferingdevice400comprisesaninvertingdeviceconsistingofastack ofaPMOStransistor510andanNMOStransistor520,whereinthePMOStransistor510iscoupled betweenthefirstnodeAandtheoutputnode430,theNMOStransistoriscoupledbetweentheoutput node430andthesecondnodeB,andtheinputnode420iscoupledtothegateofthePMOStransistor 510andtothegateoftheNMOStransistor520.InFigure1b,thebufferingdevice400solelyconsists5 ofthedescribedinvertingdevice,whereasinFigure1c,thebufferingdevice400comprises,apart fromthedescribedinvertingdevice,asecondinvertingdevice600whoseoutputnode431is connectedtothegatesofthetransistors510and520. ThefunctionalityoftheseconventionalESDprotectiondevicescanbesummarizedasfollows.When10 anESDeventoccurs,atransientsignalisgeneratedbythetransientdetector300,whichcreatesa transientcurrentthroughcapacitor320.Thisinturncausesavoltagesurgeoverresistor310.Incase saidvoltagesurgeexceedsthethresholdvoltageoftheswitchingdevice110,saidswitchingdevice isconsequentlyswitchedon,therebyallowingexcessivechargestorunfromthefirstnodeAviathe switchingdevice110tothesecondnodeB,andassuchshuntingthelargeESDcurrents.15 Consequently,inorderfortheESDprotectiondevicetosafelyshuntsaidESDcurrentswithout causinganydamageonsensitivenodesintheIC,itiscrucialforthetriggeringdevice500todeliver asufficientlyhighvoltagesurgetotheswitchingdevice110duringasufficientlylongperiodof time. 20 InthesimpleRC-circuitformedbythedeviceofFigure1a,thetimeconstantindicatingtheduration oftimeduringwhichthetransientdetector300deliversahighvoltage,iscalculatedastheproduct oftheresistanceRoftheresistor310(inOhm)andthecapacitanceCofthecapacitor320(inFarad). Thedescribedrequirementsforthetriggeringdevice500translateintoahighvalueforsaidtime constant,andthusintohighvaluesforRandC,anddisadvantageouslylargedimensionsforboththe25 resistor310andthecapacitor320. Moreover,largedimensionsarealsorequiredfortheswitchingdevice110,typicallyaMOS transistor,asitmustbeconfiguredtoshuntlargecurrents.Asaresult,theswitchingdevice’sinternal capacitances,suchasthegate-to-draincapacitanceandthegate-to-sourcecapacitanceincasethe switchingdevice110isaMOStransistor,aresohighthatinorderfortheswitchingdevice110to30 remainswitchedonduringanESDevent,aconsiderableamountofcurrentmustbeprovidedtosaid switchingdevice.Simpletransienttriggeringdevices500liketheoneofFigure1a,maynotbe capableofdeliveringsuchhighcurrentsduringthefulldurationoftheESDevent,thusresultingin theswitchingdevice110beingrepeatedlyswitchedonandoffduringatransient.Consequently,the desiredprotectionagainstESDdamagecannotbeguaranteed.35 2025 / 5001 BE2025 / 5001 3 ESDprotectiondevicescomprisingabufferingdevice400withasingleormultipleinvertingdevices 600,liketheonesofFigures1band1crespectively,havethebenefitthatthevoltagelevelonthe activationnode120oftheswitchingdevice110isnotdirectlyprovidedbythetransientdetector300 asinFigure1a,butisratheramplifiedbytheinvertingdevice(s).Asaresult,thedimensional requirementsontheresistor310andthecapacitor320aresomewhatreduced.Nevertheless,the5 requiredamountsofcurrentremainhigherthanthetypicaltransientdetectors300areabletodeliver, thusstillresultinginsaiddetrimentaleffectoftheswitchingdevice110beingrepeatedlyswitched onandoffagain.Indeed,notonlydotherequiredphysicaldimensionsoftheswitchingdevice110, despitetheadditionofinvertingdevice(s)600,remainconsiderable,alsothetransistors510and520 comprisedinthebufferingdevice400mustbeofsignificantdimensionsinorderforsaidtransistors10 towithstandlargecharginganddischargingcurrents.Indeed,thevoltageamplificationcreatedby theinvertingdevice(s)ofthebufferingdevice400ofFigures1band1c,allowsforthevaluesRand C(associatedwiththeresistor310andthecapacitor320)tobeoptimizedforareareduction comparedtoFigure1a,butsuchoptimizationcomeswithanincreasedriskoftheswitchingdevice 110switchingofftooearly,i.e.beforetheendoftheESDevent,sothatthelevelofprotectionagainst15 ESDdamageisundesirablyreduced. SUMMARY Theobjectofembodimentsoftheinventionistoprovideanelectrostaticdischarge(ESD)protection20 devicewhichreducestheabove-describeddisadvantagesofexistingtechnologies,without compromisingprotectivefunctionality,whileatthesametimeallowingtoreducethesurfacearea requiredtoimplementthedifferentcomponents,notablythetriggeringdevice,oftheESDprotection device,and / orallowingtoimplementmorerecentandmoreadvancedtransistortechnologiesinsaid ESDprotectiondeviceand / orimprovethetriggeringcapabilitiesofsaidtriggeringdevice.25 Accordingtoafirstaspect,anelectrostaticdischarge(ESD)protectiondeviceisprovided,whichis coupledbetweenafirstnodeandasecondnode.SaidESDprotectiondevicecomprisesafirstbranch betweenthefirstnodeandthesecondnode,saidfirstbranchcomprisingaswitchingdevicewithan activationnode,andcomprisesasecondbranchbetweenthefirstnodeandthesecondnode,said30 secondbranchcomprisingatriggeringdevicecoupledtotheactivationnodeoftheswitchingdevice andconfiguredtoswitchontheswitchingdeviceduringanESDevent.Saidtriggeringdevice comprisesatransientdetectorhavinganoutputnode,andabufferingdevicehavinganinputnode coupledtotheoutputnodeofthetransientdetector,andhavinganoutputnodecoupledtothe activationnode.Thebufferingdevicefurthercomprisesacurrentlimitingdeviceconfiguredtolimit35 adischargecurrentfromtheactivationnodetothefirstnodeorthesecondnode. 2025 / 5001 BE2025 / 5001 4 Comparedtotheabove-describedconventionalESDprotectiondevices,theadvantageous componentoftheclaimedESDprotectiondeviceisthecurrentlimitingdevice.Inprinciple,the functionalityofthisESDprotectiondeviceistoalargeextentsimilartothatoftheabove-described conventionaldevices.WhenanESDeventoccurs,saideventisdetectedbythetransientdetector,5 causingthetriggeringdevicetoswitchontheswitchingdevice.Asexplainedabove,inorderto guaranteeprotectionofsensitivenodesagainstESDdamage,itiscrucialforthetriggeringdeviceto deliverasufficientlystrongsignaltokeeptheswitchingdeviceactivatedduringasufficientlylong periodoftime,i.e.sothatitiscapableofshuntingESDcurrentsuntiltheESDeventhascometoan end.10 Thisispreciselythefunctionalitythatisofferedbythecurrentlimitingdevice.Indeed,thecurrent limitingdeviceisconfiguredtolimitadischargecurrentfromtheactivationnodetothefirstnode orthesecondnode.Assuch,ithastheeffectofdelayingthepointintimewhentheswitchingdevice switchesoff.Indeed,oncetheswitchingdevicehasswitchedonasaresultofthesignalreceived fromthetriggeringdevice,itsinternalcapacitancestartstobecharged.Saidinternalcapacitance15 may,forinstance,bethegate-sourcecapacitanceiftheswitchingdeviceisaMOStransistor,and maybethejunctioncapacitanceiftheswitchingdeviceisabipolartransistor.Atsomepointintime, possiblypriortotheendoftheESDevent,thetriggeringdeviceceasestogeneratesaidsignal,so thattheinternalcapacitanceoftheswitchingdeviceisnolongerbeingcharged,andstartsto dischargebyallowingadischargecurrenttorunfromtheactivationnodetothefirstnodeortothe20 secondnode.Thecurrentlimitingdeviceactivelydelaysthisdischargingprocessbylimitingsaid dischargecurrent,i.e.bylimitingtheamountofbuiltupchargethatisabletoescapefromthe activationnodeoftheswitchingdeviceperunitoftime.Thereby,thetotaldurationoftimeduring whichtheswitchingdeviceremainsswitchedonisprolongedbeyondthepointintimewherethe triggeringdeviceceasestogenerateitssignal.25 SuchanESDprotectiondevicehastheadvantagethatcomparedtoconventionalESDprotection devices,theswitchingdeviceremainsswitchedonduringalongerperiodoftime,inparticularduring thefulldurationofatypicalESDevent,withouttheundesirablebehaviorofrepeatedlyswitching offandbackonagain.Inotherwords,thetriggeringcapabilitiesofthecorrespondingtriggering deviceareimproved.Assuch,itisguaranteedthatsensitivenodesintheconsideredICremain30 protectedduringthefulldurationofsuchanESDevent,sinceduringsaidentiredurationlargeESD currentsareshunted,asexcessivechargesmaypassthroughthedevicefromthefirstnodeviathe switchingdevicetothesecondnode. Furthermore,thephysicaldimensionsofthecomponentsofthetransientdetector,andthusalsothe dimensionsoftheentireresultingchip,maybereducedcomparedtoconventionaldevices,without35 therebyadverselyaffectingthetimingofthedischargingprocess.Indeed,thankstotheabove- 2025 / 5001 BE2025 / 5001 5 describedprolongationoftherelevanttimedurationbeyondthetimeconstantofthetransient detector,itsufficesforthelattertimeconstanttomerelycoverthebeginningoftheESDevent,rather thantheentireESDeventaswouldbeneededinconventionalexistingdevices.Consequently,the ESDprotectiondevicemaybeimplementedwithatransientdetectorwhichissmallerinsize,in particularinsurfacearea,andthushasasmallertimeconstant,comparedtopriorartalternatives.5 Ineffect,anESDprotectiondevicewiththedescribedpropertieshastwodifferenttimeconstants, namelyafirsttimeconstantforthechargingprocessandasecondtimeconstantforthedischarging process,wheretheformerismainlydeterminedbythetransientdetector,whereasthelatteristoa largeextentdeterminedbythecurrentlimitingdevice.Thepresentinventionallowsthetimeconstant forthechargingprocesstobesmallerthanthetimeconstantforthedischargingprocess,andin10 particularsmallerthanthatofconventionalESDprotectiondevices.Thishastheadvantagethatthe start-upphaseofthepowersupply,duringwhichthevoltageoverthechipbuildsupfrom0Vto normaloperationvalues,andduringwhichtypicallylargeamountsofcurrentaredissipated,is shortenedinduration,withoutcompromisingtheprotectionagainstESDevents. 15 Inapreferredembodiment,thecurrentlimitingdevicecomprisesaresistiveelement,preferablya resistiveelementwhichiscoupledbetweentheactivationnodeandthefirstnodeorthesecondnode. SuchanESDprotectiondevicemaythenbeobtainedbyalteringanyofthedescribedconventional ESDprotectiondevicesbyaddingaresistiveelementalongthepaththatistypicallyfollowedbythe dischargecurrentfromtheactivationnodetothefirstorsecondnode,forexamplebycouplingsaid20 resistiveelementbetweentherespectivenodes.Thiswillhavetheeffectofincreasingthetotal resistancealongsaidcurrentpathwithoutsignificantlyalteringthevoltage,sothatthedischarge currentthatpassesalongsaidpathiseffectivelylowered. Thehighertheresistanceassociatedwithsaidresistiveelement,thestrongerwillbethe correspondingreductionincurrentvalue,andhencethelongeritwilltakeforthechargebuiltupon25 theinternalcapacitanceoftheswitchingdevicetoreachthefirstorsecondnode.Consequently,in ordertoincreasethetimeconstantforthedischargingprocess,itisbeneficialtochoosearesistive elementwithsufficientlyhighresistanceasthecurrentlimitingdevice.Ontheotherhand,ahigher resistancetypicallygivesrisetoanincreaseinsurfaceareaneededtoimplementthecurrentlimiting device,whichistobeavoidedwhenaimingtomaketheESDprotectiondeviceassmallaspossible30 insize. Saidresistiveelementpreferablycomprisesaresistor,oraMOStransistorconfiguredtobelow resistiveduringanESDevent,highresistiveimmediatelyafteranESDevent,andlowresistive duringnormaloperation.Bothoftheseoptionshavetheeffectoflimitingthedischargecurrentthat35 runsfromtheactivationnodetothefirstorsecondnodeafteranESDevent.Indeed,whenanESD 2025 / 5001 BE2025 / 5001 6 eventoccurs,theinternalcapacitanceoftheswitchingdevicewillfirstbechargedaslongasit receivesasignalfromthetriggeringdevice,andwillonlyafterwards,whenthetriggeringdevice ceasestogenerateasufficientlystrongsignal,starttodischarge.Assuch,inorderfortheresistive elementtobecapableoflimitingtheresultingdischargecurrents,itsufficesfortheresistiveelement tobehighresistiveonlyduringsaidsecondphaseimmediatelyaftertheESDevent.5 Aresistorsubstantiallymaintainsitsresistanceovertime,sothattheaboverequirementiscertainly fulfilledforresistiveelementscomprisingaresistor.ForresistiveelementscomprisingaMOS transistor,saidrequirementisfulfilledwhensaidMOStransistorisconfiguredtobehighresistive immediatelyafteranESDevent.Inordertomakesurethatduringnormaloperation,theESD protectiondeviceisonlyturnedonforashortperiodoftime,itisbeneficialfortheMOStransistor10 tobeconfiguredtobelowresistiveduringanESDeventandduringnormaloperation. ThismaybeachievedbycouplingsaidMOStransistortoaninternalnodewhichallowstheMOS transistortodetect,onthebasisoftheenable / disablesignalsitreceivesfromsaidnode,whetherthe powersupplyoftheICisonoroff,withtheformercorrespondingtonormaloperationandthelatter correspondingtothecriticalperiodsintimewhendischargefollowinganESDeventmayoccur.The15 MOStransistoristhenconfiguredtobeeitherloworhighresistive,dependingontheoutcomeof saiddetection,namelylowresistivewhenitdetectsthatthepowersupplyison,andhighresistive whenitdetectsthatthepowersupplyisoff. Accordingtoapreferredembodiment,theswitchingdevicecomprises,preferablyconsistsof,a20 transistor,preferablyaMOStransistorhavingagatecorrespondingwiththeactivationnode.Indeed,transistorsarehighlyeffectiveswitchingdevicesconfiguredtobeswitchedonwhenacertain thresholdvoltageissurpassed.Inthepresentdevice,saidvoltageisdeliveredbythetriggeringdevice whenanESDeventoccurs. IncasetheswitchingdevicecomprisesaMOStransistorwithagatecorrespondingtotheactivation25 node,aspreferred,thediscussedcharging / dischargingprocessamountstothecharging / discharging oftheinternalcapacitanceofsaidgate,andthetimingofsaidcharging / dischargingisreflectedin theevolutionovertimeofthegatevoltage.Moreprecisely,theslowerthedischargingprocessofthe gate,thelongerthevoltageonthegateremainsatahighvalue. 30 ThebufferingdevicepreferablycomprisesastackofaPMOStransistorandanNMOStransistor. Indeed,thesetransistorsarethenconfiguredtoactasswitchingdevices,which,aspartofthe bufferingdevicewhichiscoupledtothetransientdetector,areconfiguredtoswitchonandthusstart conductingwhenasufficientlystrongsignalisreceivedfromthetransientdetector.Oncethe transientdetectorceasestogenerateasufficientlystrongsignal,typicallyoneofthetwotransistors35 willswitchoff,whiletheotherwillremainactiveduringalongerperiodoftimeandassuchbe 2025 / 5001 BE2025 / 5001 7 capableofconductingthedischargecurrent.Inparticular,thepathfollowedbysaiddischargecurrent willleadfromtheactivationnodeviasaidlongest-conductingtransistortoeitherthefirstnodeor thesecondnode,dependingonwhichofthesetwonodessaidtransistoriscoupledto.Saidtransistor configuredtoremaininaconductingstateduringalongertimeperiodmaybeeitherthePMOS transistoroftheNMOStransistorofthestack,dependingonthenatureoftheswitchingdevice.5 TheconventionalESDprotectiondevicesdiscussedabovealsocompriseatleastonestackofa PMOStransistorandanNMOStransistor.Themaincharacterizingfeatureoftheconsidered preferredembodimentsofthepresentinventionisthefactthatthesecomprise,apartfromsaidstack, alsoacurrentlimitingdeviceaspartofthebufferingdevice.ComparedtosaidconventionalESD protectiondevices,saidcurrentlimitingdeviceaidsinincreasingtheextentoffreedomonehasin10 tuningthetransistorsofsaidstack,therebyrenderingtheresultingESDprotectiondevicesmore suitablefortheimplementationofthemostrecentandadvancedtransistortechnologies.Indeed,said mostrecentandadvancedtransistortechnologies,suchasFinFETtransistorsandgate-all-around transistors,comewithmoresevererestrictionsingatelengthand / orgatewidth,andthusless tunability,comparedtooldertransistortechnologies.Theinsertionofacurrentlimitingdeviceinto15 thebufferingdevice,coupledtoorinbetweenthestackofaPMOStransistorandanNMOS transistor,allowsthetransistorsinthestacktobetunedwhencorrespondinglytuningthecurrent limitingdeviceaswell.Consequently,ESDprotectiondevicesequippedwithsuchacurrentlimiting deviceareconfiguredtobemoreefficientthanpriorartalternativeswhenimplementedwithsaid mostrecentandmostadvancedtypesoftransistors.20 Inapreferredembodiment,thetransientdetectorcomprisesaresistiveelementandacapacitive elementconnectedinseriesbetweenthefirstnodeandthesecondnode,andwhereintheoutputnode ofthetransientdetectorisanintermediatenodebetweensaidresistiveelementandsaidcapacitive element.Suchaconfigurationofaresistiveelementandacapacitiveelementisconfiguredtoactas25 atransientdetector,andthusadetectorofESDevents,thankstothefollowingfunctionality.When anESDeventoccurs,ahighvoltageisinstalledbetweenthefirstnodeandthesecondnode.The resistiveelementandcapacitiveelement,whichareconnectedinseriesbetweensaidnodes,sense thishighvoltageandreacttoitbycreatingatransientcurrentthroughthecapacitiveelementanda voltagesurgeovertheresistiveelement.Thesignalcorrespondingwithsaidtransientcurrentand30 voltagesurgeareamplifiedbythebufferingdevicebeforetheyreachtheswitchingdevice.The amplifiedsignalthenactivatestheswitchingdevice,therebyallowingittoshuntthelargeESD currentsfromthefirsttothesecondnode. Whensuchtransientdetectorsarecombinedwiththepreviouslydescribedfeaturethatthebuffering devicecomprisesastackofaPMOSandanNMOStransistor,typicallyoneofbothtransistorswill35 becoupledtotheresistivedevice,whereastheotherwillbecoupledtothecapacitivedevice.During 2025 / 5001 BE2025 / 5001 8 thedischargingoftheswitchingdevice,thelatterofthetwotransistorswillremaininaconducting stateduringalongerperiodoftimethantheformertransistor,sinceduringdischargeoftheswitching device,thecapacitiveelementwilldischargeaswellandmeanwhiledelivertothetransistoritis coupledto,asufficientlyhighvoltageforsaidtransistortoremainactivatedandthustoconductthe activationnode’sdischargecurrent.5 Inwhatfollows,wewillfirstdescribeafirstpreferredembodimentwhereinthecurrentlimiting deviceisconfiguredtolimitadischargecurrentfromtheactivationnodetothesecondnode,and subsequentlywewilldescribeinparallelasecondpreferredembodimentwhereinthecurrentlimiting deviceisconfiguredtolimitadischargecurrentfromtheactivationnodetothefirstnode.10 Accordingtosaidfirstpreferredembodiment,theswitchingdevicecomprisesanNMOStransistor, andthebufferingdevicecomprisesaPMOStransistorwhichiscoupledbetweenthefirstnodeand theoutputnodeofthebufferingdevice,aswellasastackofthecurrentlimitingdeviceandan NMOStransistor,whichstackisconnectedbetweentheoutputnodeofthebufferingdeviceandthe15 secondnode.TheoutputnodeofthetransientdetectoriscoupledtothegateofthePMOStransistor andtothegateoftheNMOStransistor,andthecurrentlimitingdeviceisconfiguredtolimita dischargecurrentfromtheactivationnodetothesecondnode. WhenanESDeventoccursinanESDprotectiondeviceaccordingtothisfirstpreferredembodiment, thetransientdetectorgeneratesasignaltothebufferingdevicewhichcausethegatecapacitancesof20 thePMOStransistorandtheNMOStransistorofthebufferingdevicetostartcharging,andmoreover saidtransistorstransmitsaidsignalinanamplifiedwaytotheNMOStransistoroftheswitching device.ThiscausessaidNMOStransistortoswitchonincasethecorrespondingvoltagesurgeover thistransistorexceedsitsthresholdvoltage,sothatitsinternalgatecapacitancestartstobecharged. Subsequently,whenthetransientdetectorceasestogenerateasufficientlystrongsignal,thegateof25 theNMOStransistoroftheswitchingdevicestartstodischargeviathestackofthecurrentlimiting deviceandtheNMOStransistorofthebufferingdevice.Sincesaidstackiscoupledtothesecond nodeintheseembodiments,thecorrespondingdischargecurrentwillrunfromtheactivationnode, whichconsistsoforiscoupledtothegateoftheNMOStransistoroftheswitchingdevice,towards thesecondnode.Asaresult,intheseembodimentsthedischargecurrentwhichisbeinglimitedby30 thecurrentlimitingdeviceisadischargecurrentfromtheactivationnodetothesecondnode. Inafirstpreferredvariantofsaidfirstpreferredembodiment,theoutputnodeofthetransientdetector isdirectlyconnectedtothegateofthePMOStransistorandtothegateoftheNMOStransistor,and thetransientdetectorcomprisesaresistiveelementwhichiscoupledbetweenthefirstnodeandthe35 2025 / 5001 BE2025 / 5001 9 outputnodeofthetransientdetector,aswellasacapacitiveelementwhichiscoupledbetweenthe outputnodeofthetransientdetectorandthesecondnode. ThisimpliesthatthePMOStransistorofthebufferingdeviceiscoupledtotheresistiveelement,in suchawaythatsaidPMOStransistorandsaidresistiveelementarecoupledinparallelbetweenthe firstnodeandtheoutputnodeofthetransientdetector,whereastheNMOStransistorofthebuffering5 deviceiscoupledtothecapacitiveelement,insuchawaythatsaidNMOStransistorandsaid capacitiveelementarecoupledinparallelbetweentheoutputnodeofthetransientdetectorandthe secondnode.Assuch,oncetheNMOStransistoroftheswitchingdevicestartstodischarge,the PMOStransistorofthebufferingdevicewillswitchoffandceasetoconductanycurrent,whereas theNMOStransistorofthebufferingdevicewillremainactivatedforalongerperiodoftime,10 preciselybecausethelattertransistoriscoupledtothecapacitiveelementofthetransientdetector, whereastheformertransistorisnot.Indeed,duringchargingoftheswitchingdevice,achargehas alsobeenbuildinguponthiscapacitiveelement,sothatoncethedischargingoftheswitchingdevice hasbeeninitiated,saidcapacitiveelementcontinuestodeliverasufficientvoltagetotheNMOS transistoroftheswitchingdeviceduringashortyetsignificanttime.15 Inasecondpreferredvariantofsaidfirstpreferredembodiment,thebufferingdevicefurther comprisesaninvertingdevicecoupledbetweenthefirstnodeandthesecondnode,withaninput nodewhichcoincideswiththeinputnodeofthebufferingdeviceandwithanoutputnodeconnected tothegateofthePMOStransistorofthebufferingdeviceandtothegateoftheNMOStransistorof20 thebufferingdevice.Thetransientdetectorthencomprisesaresistiveelementwhichiscoupled betweentheoutputnodeofthetransientdetectorandthesecondnode,aswellasacapacitiveelement whichiscoupledbetweenthefirstnodeandtheoutputnodeofthetransientdetector. Theinsertionofsuchanadditionalinvertingdevicehastheadvantagethatthesignalgeneratedby thetransientdetector,inparticularthevoltagesurgesaidtransientdetectordeliverstotheswitching25 device,isamplifiedevenfurtherbeforeitreachestheswitchingdevice.Indeed,saidsignalisnow subjectedtotwophasesofamplification,namelyafirstsuchphasewhenthesignalispassedfrom thetransientdetectorontotheinvertingdevice,andasecondsuchphasewhenthesignalispassed fromtheinvertingdeviceontothebranchthatconnectsthePMOStransistorofthebufferingdevice withthestackoftheNMOStransistorandthecurrentlimitingdevice.Thishastheeffectthatthe30 impedanceattheswitchingdeviceisfurtherreduced,sothatduringthechargingprocessahigher amountofchargeisbeingbuiltuponthegatecapacitanceoftheNMOStransistoroftheswitching device,andthatcomparedtoembodimentswithoutadditionalinvertingdevices,thestack comprisingthecurrentlimitingdevicewillreceiveahighergatevoltagevalue,closetothevalueof thevoltageonthefirstorsecondnode,andtheon-resistanceofthetransistorsinthisstackwillbe35 reduced,resultinginamorecompleteon / offstate. 2025 / 5001 BE2025 / 5001 10 Itshouldbenotedthat,contrarytothefirstpreferredvariantofthefirstpreferredembodiment,the resistiveelementandcapacitiveelementcomprisedinthetransientdetector,haveinfactswitched places.Thecapacitiveelementisnowconnectedtothefirstnodeandtheresistiveelementisnow connectedtothesecondnode,insteadoftheotherwayaround.Thisisrequiredinordertomakesure theNMOStransistorofthebufferingdevice,whichiscoupledtothecurrentlimitingdevice,remains5 inaconductingstateduringalongerperiodoftimethanthePMOStransistorofthebufferingdevice. Accordingtosaidsecondpreferredvariantofsaidfirstpreferredembodiment,theinvertingdevice preferablycomprisesaPMOStransistorcoupledbetweenthefirstnodeandtheoutputnodeofthe invertingdevice,aswellasanNMOStransistorcoupledbetweentheoutputnodeoftheinverting10 deviceandthesecondnode.Theinputnodeofthebufferingdeviceisthenconnectedtothegateof thePMOStransistoroftheinvertingdeviceandtothegateoftheNMOStransistoroftheinverting device. Suchaninvertingdeviceisindeedconfiguredtofurtheramplifythesignalgeneratedbythetransient detector,andinparticularthevoltagesurgedeliveredtotheswitchingdevice,sincecomparedtothe15 firstpreferredvariantofthisfirstpreferredembodiment,theadditionaltwotransistorsinthe invertingdeviceprovidetwoadditionalinternalcapacitancesconfiguredtobechargedaslongasthe transientdetectorgeneratesasufficientsignal,andtobedischargedsubsequently. Bothwithinsaidfirstpreferredvariantofsaidfirstpreferredembodimentaswellaswithinsaid20 secondpreferredvariantofsaidfirstpreferredembodiment,twopreferredalternativescanbe distinguished. Inafirstpreferredalternativeofsaidfirstpreferredembodiment,thecurrentlimitingdeviceis coupledtotheoutputnodeofthebufferingdeviceandtheNMOStransistoriscoupledtothesecond25 node,preferablysothatthesourceoftheNMOStransistoriscoupledtothesecondnodeandthe drainoftheNMOStransistoriscoupledtothecurrentlimitingdevice. Inasecondpreferredalternativeofsaidfirstpreferredembodiment,theNMOStransistoriscoupled totheoutputnodeofthebufferingdeviceandthecurrentlimitingdeviceiscoupledtothesecond30 node,preferablysothatthesourceoftheNMOStransistoriscoupledtothecurrentlimitingdevice andthedrainoftheNMOStransistoriscoupledtotheoutputnodeofthebufferingdevice. Thisimpliesthatinsaidfirstpreferredalternative,thedischargecurrentfromtheactivationnode passesfirstthroughthecurrentlimitingdeviceandsubsequentlythroughtheNMOStransistorofthe35 bufferingdevice,whereasinsaidsecondpreferredalternative,saiddischargecurrentflowsfirst 2025 / 5001 BE2025 / 5001 11 throughsaidNMOStransistorandthenthroughthecurrentlimitingdevice,beforereachingthe secondnode.Saidsecondpreferredalternativehasanadditionaladvantageincasethebulkterminal oftheNMOStransistorofitsbufferingdeviceiscoupledtoground:thesourcebulkjunctionmay thenbereversebiased,i.e.haveabulkvoltagelowerthanthesourcevoltage,sothatsaidNMOS transistorbecomeslessefficientandinparticularhigherresistivecomparedtothefirstpreferred5 alternative.Assuch,theNMOStransistoraidsinfurtherlimitingthedischargecurrentfromthe activationnodetothesecondnode,andthusinslowingdownsaiddischargingprocess,sincesaid currentistopassthroughboththeresistanceofthecurrentlimitingdeviceandtheresistanceofthe NMOStransistor,whichisthenelevatedcomparedtothecorrespondingvaluefortheNMOS transistorinthefirstpreferredalternative.10 Inparalleltothedescriptionofthefirstpreferredembodimentabove,wewillnowdescribeasecond preferredembodimentofanESDprotectiondevice,whereinthecurrentlimitingdeviceisconfigured tolimitadischargecurrentfromtheactivationnodetothefirstnoderatherthantothesecondnode asinthefirstpreferredembodiment.15 Accordingtosaidsecondpreferredembodiment,theswitchingdevicecomprisesaPMOStransistor, andthebufferingdevicecomprisesanNMOStransistorwhichiscoupledbetweentheoutputnode ofthebufferingdeviceandthesecondnode,aswellasastackofthecurrentlimitingdeviceanda PMOStransistor,whichstackiscoupledbetweenthefirstnodeandtheoutputnodeofthebuffering20 device.TheoutputnodeofthetransientdetectoriscoupledtothegateofthePMOStransistorand tothegateoftheNMOStransistor,andthecurrentlimitingdeviceisconfiguredtolimitadischarge currentfromtheactivationnodetothefirstnode. Thetechnicaleffectsandadvantagesassociatedwiththedifferentalternativesandvariantsofthe firstpreferredembodimentapplymutatismutandistothesecondpreferredembodiment,andwill25 thereforenotbeexplicitlyrepeated. Inafirstpreferredvariantofsaidsecondpreferredembodiment,theoutputnodeofthetransient detectorisdirectlyconnectedtothegateofthePMOStransistorandtothegateoftheNMOS transistor,andthetransientdetectorcomprisesaresistiveelementwhichiscoupledbetweenthe30 outputnodeofthetransientdetectorandthesecondnode,aswellasacapacitiveelementwhichis coupledbetweenthefirstnodeandtheoutputnodeofthetransientdetector. Inasecondpreferredvariantofsaidsecondpreferredembodiment,thebufferingdevicefurther comprisesaninvertingdevicecoupledbetweenthefirstnodeandthesecondnode,withaninput35 nodewhichcoincideswiththeinputnodeofthebufferingdeviceandwithanoutputnodeconnected 2025 / 5001 BE2025 / 5001 12 tothegateofthePMOStransistorandtothegateoftheNMOStransistor.Thetransientdetector thencomprisesaresistiveelementwhichiscoupledbetweenthefirstnodeandtheoutputnodeof thetransientdetector,aswellasacapacitiveelementwhichiscoupledbetweentheoutputnodeof thetransientdetectorandthesecondnode. 5 Accordingtosaidsecondpreferredvariantofsaidfirstpreferredembodiment,theinvertingdevice comprisesaPMOStransistorcoupledbetweenthefirstnodeandtheoutputnodeoftheinverting device,aswellasanNMOStransistorcoupledbetweentheoutputnodeoftheinvertingdeviceand thesecondnode.TheinputnodeofthebufferingdeviceisthenconnectedtothegateofthePMOS transistoroftheinvertingdeviceandtothegateoftheNMOStransistoroftheinvertingdevice.10 Bothwithinsaidfirstpreferredvariantofsaidsecondpreferredembodimentaswellaswithinsaid secondpreferredvariantofsaidsecondpreferredembodiment,twopreferredalternativescanbe distinguished. 15 Inafirstpreferredalternativeofsaidsecondpreferredembodiment,thePMOStransistoriscoupled tothefirstnodeandthecurrentlimitingdeviceiscoupledtotheoutputnodeofthebufferingdevice, preferablysothatthesourceofthePMOStransistoriscoupledtothefirstnodeandthedrainofthe PMOStransistoriscoupledtothecurrentlimitingdevice. 20 Inasecondpreferredalternativeofsaidsecondpreferredembodiment,thecurrentlimitingdeviceis coupledtothefirstnodeandthePMOStransistoriscoupledtotheoutputnodeofthebuffering device,preferablysothatthesourceofthePMOStransistoriscoupledtothecurrentlimitingdevice andthedrainofthePMOStransistoriscoupledtotheoutputnodeofthebufferingdevice. 25 Thepreferredembodimentsdescribedabovemayfurtherpossessanyoneofthefollowingproperties. Inanexemplaryembodiment,theESDprotectiondevicefurthercomprisesacapacitiveelement coupledbetweentheactivationnodeandthesecondnodeorthefirstnode.Moreprecisely,within theabove-describedfirstpreferredembodiment,saidcapacitiveelementiscoupledbetweenthe30 activationnodeandthesecondnode,whereaswithintheabove-describedsecondpreferred embodiment,saidcapacitiveelementiscoupledbetweentheactivationnodeandthefirstnode. Thisadditionalcapacitiveelementhastheadvantagethat,liketheinternalcapacitanceofthe switchingdevice,itisconfiguredtochargeaslongasthetransientdetectorgeneratesasufficiently strongsignal,andtostartdischargingwhenthetransientdetectorceasestogenerateasufficiently35 strongsignal.Assuch,saidadditionalcapacitiveelementinfactservestovirtuallyincreasethe 2025 / 5001 BE2025 / 5001 13 internalcapacitanceoftheswitchingdevice,withouttherebyalteringthesurfaceareacorresponding tosaidswitchingdevice.Thishastheeffectthatthedischargingprocessisfurthersloweddownand thusthattheswitchingdeviceiskeptinaconductingstateduringalongerperiodoftime,simply sincelargercapacitancestakelongertodischarge.Consequently,comparedtoembodimentsthat lacksuchanadditionalcapacitiveelement,onemayevenimplementthecurrentlimitingdevicewith5 adevicewithasmallerresistancevalue,orchoosetheswitchingdevicetobeofsmallerphysical dimensions. Indeed,referringtosaidlatteroption,choosingtheswitchingdevicetobeofsmallersizewill negativelyimpacttheinternalcapacitanceoftheswitchingdevice,butsincesaidadditional capacitiveelementcausestheoveralldischargingprocesstoslowdown,itisguaranteedthatdespite10 saidreductionofinternalcapacitanceoftheswitchingdevice,saidswitchingdevicedoesnotriskto switchoffbeforetheESDeventhascometoanend.Nevertheless,thedimensionsoftheswitching deviceareboundbycertainminimalvalues,sinceswitchingdevicesoftoosmallsizesrisktobe incapableofconductingtheESDcurrents. Ontheotherhand,theadditionalcapacitiveelementalsoallowstoimplementthecurrentlimiting15 devicewithasmallerresistancevalue,withouttherebyimpactingthetimeconstantofthe correspondingRC-circuit.Indeed,thelowervalueoftheresistancecomponentwithinsaidtime constantissufficientlycompensatedbythehighervalueofthecapacitancecomponentbyvirtueof theadditionalcapacitiveelement,sothatsaidtimeconstantremainsmoreorlessunaltered. 20 Accordingtoanexemplaryembodiment,theswitchingdevicemaybeasiliconcontrolledrectifier (SCR)ESDclamp,orabipolartransistor. Suchabipolartransistormaybetriggeredbythetriggeringdeviceinasimilarwayaswouldbethe casewithaMOStransistorastheswitchingdevice,whereasincasetheswitchingdevicecomprises anESDclamp,itcomprisesinparticularanNMOStransistorconfiguredtobedirectlytriggeredby25 thetriggeringdevice,sothattherestoftheSCRESDclampistriggeredbytheactivationofsaid NMOStransistorduetoafeedbackmechanism. Inanadvantageousembodiment,thefirstbranchfurthercomprisesasecondswitchingdevicewith anactivationnode,andthesecondbranchfurthercomprisesasecondtriggeringdevicecoupledto30 theactivationnodeofthesecondswitchingdeviceandconfiguredtoswitchonthesecond switchingdeviceduringanESDevent.Saidsecondtriggeringdevicecomprisesasecondtransient detectorhavinganoutputnode,andasecondbufferingdevice.Saidsecondbufferingdevicehasan inputnodecoupledtotheoutputnodeofthesecondtransientdetector,anoutputnodecoupledto theactivationnodeofthesecondswitchingdevice,andasecondcurrentlimitingdeviceconfigured35 2025 / 5001 BE2025 / 5001 14 tolimitadischargecurrentfromtheactivationnodeofthesecondswitchingdevicetothefirst nodeorthesecondnode. Suchembodimentshavetheadvantageofofferingprotectionagainstevenhighervoltage differencesbetweenthefirstnodeandthesecondnode.Indeed,incaseanESDeventoccurs,both5 thetransientdetectorandthesecondtransientdetectorreacttothesensedvoltagebygeneratinga signal,intheformofavoltagesurgeoverrespectivelytheswitchingdeviceandthesecond switchingdevice.Saidsignalsareamplifiedbytherespectivebufferingdevices,sothatthe switchingdeviceistriggeredbythetriggeringdeviceandthesecondswitchingdeviceistriggered bythesecondtriggeringdevice.Asaresult,bothswitchingdevicesareactivated,providedthe10 deliveredvoltagesexceedtheirrespectivethresholdvoltages.Whenbothswitchingdevicesareina conductingstate,thefirstbranchoffersapathforthechargebuiltuponthefirstnodetoescapeto thesecondnode,andassuch,anESDcurrentisshuntedbythetwoswitchingdevices.Assuch,domainswithavoltageratingthatexceedsthemaximumtoleratedvoltageoftheindividual constituentdevicesmaybeprotected.Thereby,itbecomespossibletoallowapowerdomainof15 e.g.3.3V(asavoltagedifferencebetweenthefirstandsecondnode)inacircuitimplementedwith transistorswithindividualmaximumtoleratedvoltagesofe.g.only1.8V. Oncethetransientdetectorceasestogenerateasufficientsignal,theswitchingdevicewillswitch offandstarttodischarge.Similarly,thesecondswitchingdevicewillswitchoffandstartto dischargeoncethesecondtransientdetectorceasestogenerateasufficientsignal.Inorderto20 guaranteeprotectionagainstESDdamage,itiscrucialforbothswitchingdevicestocontinue conductingduringasufficientlylongperiodoftime,inparticularbeyondthedurationoftheESD event.Therefore,itisadvantageousforboththebufferingdeviceandthesecondbufferingdevice tocompriseacurrentlimitingdevice,configuredtolimitadischargecurrentfromtherespective activationnodetothefirstorsecondnode,sothatbothoftheconsidereddischargingprocessesare25 sufficientlysloweddown.Thefunctionalityofthesecondcurrentlimitingdeviceissimilartothat ofthecurrentlimitingdevicedescribedabove. Theadvantageousembodimentdescribedabovemayfurtherpossessanyoneofthefollowing properties.30 Theswitchingdeviceispreferablyconnectedinseriestothesecondswitchingdevice,andthe transientdetectorispreferablycoupledtothesecondtransientdetector. Indeed,assuchtheESDcurrentstobeshuntedmaypassfromthefirstnodeAviatheseries connectionoftheswitchingdeviceandthesecondswitchingdevicetothesecondnode,andthe35 voltagedifferencebetweenthefirstnodeandthesecondnodeduringanESDeventmaybedivided 2025 / 5001 BE2025 / 5001 15 overthetransientdetectorandthesecondtransientdetector.Asaresultofsaidvoltagedivision,the voltageonanyofthedifferentconstituentdevicesdoesnotexceedthemaximumtoleratedvoltage valueofsaiddevice,i.e.themaximalvaluethevoltageonsaiddevicemayattainwithoutrisking damageordegradationofthesedevices. 5 Preferably,theESDprotectiondevicefurthercomprisesavoltagedividercoupledtothetransient detectorandtothesecondtransientdetector,andconfiguredfordividingavoltagebetweenthefirst nodeandthesecondnode. Assuch,itisguaranteedthatthevoltagedifferencepresentbetweenthefirstnodeandthesecond nodeduringanESDeventisdivided,preferablymoreorlessequallydivided,betweenontheone10 handthetriggeringdeviceandtheswitchingdevice,andontheotherhandthesecondtriggering deviceandsecondswitchingdevice.Thereby,protectionisofferedagainstESDvoltagesofabout doublethevalueofthemaximumvoltageswithstoodbythedifferentcomponentsoftheinternal circuit,sincesaidvoltagedividerguaranteesthatonlyafraction,preferablyatmostonlyhalf,ofthe ESDvoltageisdeliveredtoanycomponentatanypointintime.Eachofthecomponentshence15 remainsundersafeoperationconditions. ThisabilitytofunctionunderhightotalESDvoltagesisparticularlybeneficialincircuitswherein recentandadvancedtransistortechnologies,suchasFinFETs,areimplemented. Theoutputnodeofthesecondtriggeringdeviceispreferablycoupledtothebufferingdevice.20 Inprinciple,anESDprotectiondeviceaccordingtotheabove-describedadvantageousembodiments, consistsofastackoftwoESDprotectiondeviceswhicheachhaveatleastasingleswitchingdevice andatleastasingletriggeringdevice.SeveraloptionsariseformutuallyconnectingsaidtwoESD protectiondevices.Classically,onewouldconsiderafirstESDprotectiondeviceandasecondESD protectiondevice,whicheachhaveaseparatefirstnodeandsecondnode,andcouplethefirstnode25 ofthefirstESDprotectiondevicetothesecondnodeofthesecondESDprotectiondevice,sothat inthestackeddevicethefirstnodeoftheseconddevicemayserveasthefirstnode,andthesecond nodeofthefirstdevicemayserveasthesecondnode.Analternativeforsaidclassicalcouplingisto coupletheoutputnodeofthesecondtriggeringdevicetothebufferingdeviceofthe(first)triggering device.TheadvantagesofsuchacouplinghavebeendescribedinUS8830641inthenameofthe30 applicant,inreferencetoFigure6a,withrespecttoasimilarstackedcircuitwithoutcurrentlimiting devices.Moreprecisely,saidcouplinghastheeffectofenablingsaidbufferingdevicetodischarge andofcouplingthe(first)switchingdevicemoredirectlytothefirstnodecomparedtoembodiments withclassicalcoupling,aswellastheeffectthatthesecondbufferingdeviceallowsthegatesor controlportsoftheconstituentdevicesofthe(first)bufferingdevicetobepulledtoavoltagethat35 exceedstheirrespectivedrainvoltages. 2025 / 5001 BE2025 / 5001 16 BRIEFDESCRIPTIONOFTHEFIGURES Theaccompanyingdrawingsareusedtoillustratepresentlypreferrednon-limitingexemplary5 embodimentsofdevicesofthepresentinvention.Theaboveandotheradvantagesofthefeatures andobjectsoftheinventionwillbecomemoreapparent,andtheinventionwillbebetterunderstood fromthefollowingdetaileddescriptionwhenreadinconjunctionwiththeaccompanyingdrawings,inwhich: Figures1a-1carecircuitschematicsofthreeconventionalESDprotectiondevices;10 Figure2a-2barecircuitschematicsofanESDprotectiondeviceaccordingtorespectivelythefirst andsecondpreferredalternativeofthefirstpreferredvariantofthefirstpreferredembodimentofan ESDprotectiondeviceasdescribedabove; Figures3aand3carecircuitschematicsoftheESDprotectiondeviceofFigure2a,whereinthe switchingdeviceisrespectivelyanNMOStransistorandanSCRESDclamp;15 Figure3bisacircuitschematicoftheESDprotectiondeviceofFigure2b,whereintheswitching deviceisanNMOStransistor; Figures4a-4barecircuitschematicsoftheESDprotectiondeviceofFigures3aand3brespectively, whereinthecurrentlimitingdeviceisaresistor; Figure4cisacircuitschematicoftheESDprotectiondeviceofFigures3a,whereinthecurrent20 limitingdeviceisaMOStransistor; Figures5a-5barecircuitschematicsofanESDprotectiondeviceaccordingtorespectivelythefirst preferredalternativeofthesecondpreferredvariantofthefirstpreferredembodiment,andthesecond preferredalternativeofthesecondpreferredvariantofthefirstpreferredembodiment; Figures6a-6barecircuitschematicsofanESDprotectiondeviceaccordingtorespectivelythefirst25 andsecondpreferredalternativeofthefirstpreferredvariantofthesecondpreferredembodimentof anESDprotectiondeviceasdescribedabove; Figure7isacircuitschematicofanembodimentofanESDprotectiondevicewithanadditional capacitiveelementcoupledbetweentheactivationnodeoftheswitchingdeviceandthesecondnode; and30 Figure8isacircuitschematicofanembodimentofanESDprotectiondevicewithtwoswitching devicesandtwotriggeringdevices. 35 2025 / 5001 BE2025 / 5001 17 DETAILEDDESCRIPTIONOFEMBODIMENTS Inthefollowingdescriptions,commonnumericaldesignationsmaybeusedforsimilar, correspondingpartsacrossmultiplefigures. 5 Figure2adepictsacircuitschematicofanESDprotectiondeviceaccordingtothefirstpreferred alternativeofthefirstpreferredvariantofthefirstpreferredembodimentofanESDprotection device,intheterminologyoftheSummarysection.ThisESDprotectiondeviceiscoupledbetween afirstnodeA,whichisapowernodeorVDDnode,andasecondnodeB,whichisagroundnodeor VSSnode.Thedevicecomprisesafirstbranch100betweenthefirstnodeAandthesecondnodeB,10 andasecondbranch200betweenthefirstnodeAandthesecondnodeB. Herein,thefirstbranch100comprisesaswitchingdevice110withanactivationnode120.The switchingdevice110isdepictedinthecircuitschematicsimplyasarectangularbox,toemphasize thatFigure2acoversseveraldifferentimplementationsoftheswitchingdevice110.Theswitching device110ofFigure2ahasthreedifferentterminals,oneofwhichisconnectedtothefirstnodeA,15 asecondofwhichisconnectedtothesecondnodeB,andathirdofwhich,depictedontheleftside oftheswitchingdevice110,correspondstotheactivationnode120. Thesecondbranch200comprises,andinfactinFigure2aconsistsof,atriggeringdevice500which iscoupledtotheactivationnode120oftheswitchingdevice110throughanoutputnode430,and whichisconfiguredtoswitchontheswitchingdevice110duringanESDevent.Saidtriggering20 device500comprisesatransientdetector300andabufferingdevice400. Herein,thetransientdetector300consistsofaseriesconnectionofaresistiveelement310,a capacitiveelement320andanode330whichisanintermediatenodebetweentheresistiveelement 310andthecapacitiveelement320andwhichservesasanoutputnodeofthetransientdetector300. Moreprecisely,inFigure2atheresistiveelement310isaresistorwhichisconnectedbetweenthe25 firstnodeAandtheoutputnode330,whereasthecapacitiveelement320isacapacitorconnected betweentheoutputnode330andthesecondnodeB. Thebufferingdevice400ofFigure2aconsistsofastackofaPMOStransistor510,acurrentlimiting device410,anNMOStransistor520,aninputnode420andanoutputnode430.Moreprecisely,the firstnodeAisconnectedtothesourceofthePMOStransistor510,thedrainofthePMOStransistor30 510iscoupledtothecurrentlimitingdevice410,thecurrentlimitingdevice410isfurtherconnected tothedrainoftheNMOStransistor520,andthesourceoftheNMOStransistor520isconnectedto thesecondnodeB.Furthermore,thegateofthePMOStransistor510isconnectedtothegateofthe NMOStransistor520.Herein,theoutputnode430isanintermediatenodebetweenthedrainofthe PMOStransistor510andthecurrentlimitingdevice410,andtheinputnode420isanintermediate35 nodebetweenthegateofthePMOStransistor510andthegateoftheNMOStransistor520.The 2025 / 5001 BE2025 / 5001 18 outputnode430ofthebufferingdevice400isfurtherconnectedtotheactivationnode120,andthe inputnode420ofthebufferingdevice400isfurtherconnectedtotheoutputnode330ofthetransient detector300. IntheembodimentofFigure2a,thecurrentlimitingdevice410isconfiguredtolimitadischarge currentfromtheactivationnode120tothesecondnodeB.Indeed,oncetheswitchingdevice1105 switchesoff,thePMOStransistor510switchesoffaswell.However,theNMOStransistor520 remainsactivatedduringalongerperiod,asitisconnectedwiththecapacitiveelement320,which attheconsideredpointintime,ischargedandthusconfiguredtodeliverasufficientlyhighvoltage totheNMOStransistor520.Assuch,thechargethathasbuiltupontheactivationnode120ofthe switchingdevice110maybeguidedawaythroughthecurrentlimitingdevice410andtheNMOS10 transistor520tothesecondnodeB.Thecurrentlimitingdevice410isdepictedsimplyasa rectangularboxwithtwoterminals,toemphasizethatFigure2acoversseveraldifferent implementationsofthecurrentlimitingdevice410. Figure2adescribesacanonicalembodimentofanESDprotectiondeviceaccordingtothepresent15 invention,whereinonlytheessentialcomponentsofthedevicehavebeendescribed.However,it shouldbeemphasizedthatadditionalcomponents,suchasresistive,capacitiveorinductiveelements, transistors,diodes,orpowersupplies,maybeaddedtothedescribedcircuitwithoutalteringits essentialfunctionality,andthatsuchmodifiedcircuitsareequallycoveredbytheembodimentof Figure2a.Similarly,thedescribedcomponentsofthecircuitofFigure2amaybereplacedbyan20 alternativecomponentconfiguredtocarryoutsubstantiallythesamefunction.Forexample,the resistor310maybereplacedbyadifferentcomponentconfiguredtobehaveasaresistiveelement whenconfrontedwiththetypicalvoltagessurgesofanESDevent.Theseremarksequallyapplyto theembodimentsoftheFigures2b-8thatwillbedescribedinwhatfollows. 25 Figure2bdepictsacircuitschematicofanESDprotectiondeviceaccordingtothesecondpreferred alternativeofthefirstpreferredvariantofthefirstpreferredembodimentofanESDprotection device,intheterminologyoftheSummarysection.Infact,theESDprotectiondeviceofFigure2b isobtainedfromtheoneofFigure2auponswitchingtheorderofthecurrentlimitingdevice410 andtheNMOStransistor520.ThisimpliesthatinthedeviceofFigure2b,eachofthedescribed30 electricalconnectionsofFigure2aismaintained,exceptthatnowtheoutputnode430ofthe bufferingdeviceisconnectedtothedrainoftheNMOStransistor520insteadoftothecurrent limitingdevice,thesourceoftheNMOStransistor520isconnectedtothecurrentlimitingdevice 410insteadoftothesecondnodeB,andthecurrentlimitingdevice410isconnectedtothesecond nodeBinsteadoftotheoutputnode430.Again,boththeswitchingdevice110andthecurrent35 2025 / 5001 BE2025 / 5001 19 limitingdevice410aredepictedasboxestoemphasizethatseveraldifferentimplementationsare coveredbyFigure2b. Accordingtoapreferredembodiment,theswitchingdevice110maycompriseatransistor, preferablyaMOStransistorhavingagatecorrespondingwiththeactivationnode120.ESD5 protectiondeviceswithsuchaswitchingdevice110areshownineachoftheFigures3a-3c,4a-4c, 5a-5b,6a-6b,7and8.Moreprecisely,inFigures3a-3b,4a-4c,5a-5b,7and8,theswitchingdevice 110consistsofanNMOStransistorhavingagatecorrespondingwiththeactivationnode120.In Figures6a-6b,theswitchingdevice110consistsofaPMOStransistorhavingagatecorresponding withtheactivationnode120.Finally,inFigure3c,theswitchingdevice110comprises,butdoesnot10 consistof,aNMOStransistor111whosegatecorrespondswiththeactivationnode120.Tobe precise,theswitchingdevice110ofFigure3cconsistsofasiliconcontrolledrectifier(SCR)ESD clampcomprising,apartfromtheNMOStransistor111,afirstbipolartransistor112,asecond bipolartransistor113andaresistor114.Theaforementionedexamplesofswitchingdevices110 willbecarefullydescribedinwhatfollows.15 Figure3acorrespondswithFigure2a,yetwhereintheswitchingdevice110hasbeenspecifiedtobe anNMOStransistor110.ThegateofsaidNMOStransistor110correspondswiththeactivationnode 120oftheswitchingdevice110.Assuch,theNMOStransistor110isconnectedwithitsgatetothe outputnode430ofthebufferingdevice400,withitsdraintothefirstnodeAandwithitssourceto20 thesecondnodeB.Similarly,Figure3bcorrespondswithFigure2b,yetwhereintheswitching device110hasbeenspecifiedtoanNMOStransistor110.Inotherwords,theESDprotectiondevice ofFigure3bcorrespondstothatofFigure3a,yetwhereintheorderoftheNMOStransistor520and thecurrentlimitingdevice410hasbeenswitched.InbothFigures3aand3b,thecurrentlimiting device410remainsdepictedbyarectangularbox,toemphasizethatseveraldifferent25 implementationsarecovered. TheembodimentsofFigures3a-3b,likethoseofFigures2a-2b,haveabufferingdevice400 comprisingastackofaPMOStransistor510andanNMOStransistor520.Herein,saidPMOS transistor510andNMOStransistor520maybeofsmallerphysicaldimensionsthantheNMOS30 transistorthatservesastheswitchingdevice110,ascanbeexplainedbycomparingthefunctionsof thedifferenttransistors.TheNMOStransistoroftheswitchingdevice110servestoshuntlarge currentsduringESDevents,andmustthushavesufficientphysicaldimensionstobeableto withstandhighcurrentvalues.Thetransistorsofthebufferingdevice400ontheotherhand,serve toamplifythesignalgeneratedbythetransientdetector300.Asexplainedabove,comparedto35 conventionalESDprotectiondevices,itislesscrucialforsaidsignalamplificationtocoverthefull 2025 / 5001 BE2025 / 5001 20 durationoftheESDevent,sincethecurrentlimitingdevice410activelyaidsinslowingdownthe dischargingprocess,beyondthepointintimewheretheESDeventhascometoanend.Therefore, thePMOStransistor510andtheNMOStransistor520ofthebufferingdevice400mayhavesmaller physicaldimensionsthantheircounterpartsinconventionalESDprotectiondevices.Inparticular, thegatelengthofthePMOStransistor510andthatoftheNMOStransistor520may20to100times5 smallerthanthegatelengthoftheNMOStransistorthatservesastheswitchingdevice110. Figure3ccorrespondswithFigure2a,yetwhereintheswitchingdevice110hasbeenspecifiedtobe anSCRESDclamp110.SaidSCRESDclampcomprisesanNMOStransistor111,afirstbipolar (PNP)transistor112,asecondbipolar(NPN)transistor113andaresistor114.Thefirstbipolar10 transistor112isaPNPbipolartransistor,whereasthesecondbipolartransistor113isanNPNbipolar transistor.Herein,thegateoftheNMOStransistor111correspondstotheactivationnode120and ishenceconnectedtotheoutputnode430ofthebufferingdevice400.ThedrainoftheNMOS transistor111isconnectedtothebaseofthefirstbipolartransistor112,andthesourceoftheNMOS transistor111iscoupledtothesecondnodeB.Thefirstbipolartransistor112andtheresistor11415 areconnectedinseriesbetweenthefirstnodeAandthesecondnodeB.Theemitterofthefirst bipolartransistor112isconnectedtothefirstnodeA,andthecollectorofthefirstbipolartransistor 112isconnectedtotheresistor114.Theresistor114isfurthercoupledtothesecondnodeB.The secondbipolartransistor113isconnectedwithitsbasetoanintermediatenode115betweenthefirst bipolartransistor112andtheresistor114,withitscollectortoanintermediatenode116betweenthe20 drainoftheNMOStransistor111andthebaseofthefirstbipolartransistor112,andwithitsemitter tothesecondnodeB.Infact,thesecondnodeBisdirectlyconnectedtoanode117whichisan intermediatenodebetweentheresistor114,thesecondbipolartransistor113andtheNMOS transistor111,andboththesourceoftheNMOStransistor111,theemitterofthesecondbipolar transistor113andtheresistor114areconnectedtothesecondnodeBviasaidintermediatenode25 117. TheESDprotectiondeviceofFigure3cfunctionsinasimilarwayasthedeviceofFigures3a-3b,in thattheNMOStransistor111isconfiguredtobedirectlytriggeredbythetriggeringdevice500, whereastheensembleofthebipolartransistors112,113andtheresistor114isconfiguredtobe triggeredbytheactivationoftheNMOStransistor111.Moreprecisely,whentheNMOStransistor30 111isactivated,itstartstodrawcurrentthroughthebase-emitterofthefirstbipolartransistor112. Theresultingbasecurrentthengivesrisetoagrowingcollectorcurrent,whichisinjectedintothe baseofthesecondbipolartransistor113,therebyalsogivingrisetoagrowingcollectorcurrentof thesecondbipolartransistor113,whichisequallydrawnfromtheemitterofthefirstbipolar transistor112.Assuch,afeedbackmechanismisinitiated,allowingthecurrentwithintheSCRESD35 clamptogrowrapidly.ApartfromtheNMOStransistor111,thebipolartransistors112,113andthe 2025 / 5001 BE2025 / 5001 21 resistor114,theswitchingdevice110mayfurthercompriseoneofseveraldiodes,justlikea conventionalSCRESDclamp,yetthesearenotessentialtothebehavioroftheclamp.Theswitching device110isthenconfiguredtoshuntESDcurrentslikeaconventionalSCRESDclamp,yetthe presenceofthecurrentlimitingdevice410inthebufferingdevice400createstheeffectofaslowed downdischargingoftheactivationnode120.5 Inapreferredembodiment,thecurrentlimitingdevice410comprisesaresistiveelement,in particularanelementconfiguredtobehighresistiveimmediatelyafteranESDevent.Indeed,such anelementwillhavetheeffectofincreasingtheelectricalresistancealongthepathfollowedbythe considereddischargecurrentfromtheactivationnode120,withoutsignificantlyalteringthevoltage,10 sothatsaiddischargecurrentiseffectivelylowered.Typicalvaluesfortheresistanceofthecurrent limitingdevice410immediatelyafteranESDeventrangefrom1kΩto100kΩ. Examplesofsucharesistiveelementincluderesistors,likeinFigures4a-4b,aswellasMOS transistorsconfiguredtobelowresistiveduringanESDevent,highresistiveimmediatelyafteran15 ESDevent,andlowresistiveduringnormaloperation,likeinFigure4c. Moreprecisely,Figure4acorrespondswithFigure3a,yetwiththecurrentlimitingdevice410 specifiedtobearesistor410.Herein,theresistor410mayforexamplebeapolyresistor,ametal resistororajunctionresistor.Saidresistoristhusconnectedbetweentheoutputnode430ofthe20 bufferingdevice400andthedrainoftheNMOStransistor520.Similarly,Figure4bcorresponds withFigure3b,yetwiththecurrentlimitingdevice410specifiedtobearesistor410.Saidresistor isthusconnectedbetweenthesourceoftheNMOStransistor520andthesecondnodeB.Inother words,theESDprotectiondeviceofFigure4bcorrespondstothatofFigure4a,yetwiththeorder oftheNMOStransistor520andthecurrentlimitingdevice410switched.25 Figure4ccorrespondswithFigure3a,yetwiththecurrentlimitingdevice410specifiedtobeaMOS transistor411whosegateiscoupledtoaninternalnode412.Onemaychoosesaidnode412insuch awaythatthegateoftheMOStransistor411iscontrolledbythenode412tobelowresistiveduring anESDevent,highresistiveimmediatelyafteranESDevent,andlowresistiveduringnormal30 operation.Thismaybeachievedbyconfiguringthenode412todeliverahighvoltagetotheMOS transistor411duringnormaloperationandduringanESDevent,andalowvoltageimmediately afteranESDevent.Examplesofsuchnodesareso-calledenable / disablenodes,orpower-upnodes, configuredtoindicatebymeansofavoltagesignalwhetherthepowersupplyison(highvoltage delivered)oroff(lowvoltagedelivered).35 2025 / 5001 BE2025 / 5001 22 Figure5adepictsacircuitschematicofanESDprotectiondeviceaccordingtothefirstpreferred alternativeofthesecondpreferredvariantofthefirstpreferredembodiment,intheterminologyof theSummarysection.SaiddeviceisobtainedfromtheESDprotectiondeviceofFigure3aupon insertinganinvertingdevice600betweenthefirstnodeAandthesecondnodeB,andswitchingthe orderoftheresistiveelement310andthecapacitiveelement320inthetransientdetector300.More5 precisely,theinvertingdevice600andthetransientdetector300areimplementedasfollows. Theinvertingdevice600consistsofastackofaPMOStransistor610,anNMOStransistor620,an inputnode420andanoutputnode431.Moreprecisely,thefirstnodeAisconnectedtothesource ofthePMOStransistor610,thedrainofthePMOStransistor610isconnectedtothedrainofthe NMOStransistor620,andthesourceoftheNMOStransistor620isconnectedtothesecondnode10 B.Furthermore,thegateofthePMOStransistor610isconnectedtothegateoftheNMOStransistor 620.Herein,theoutputnode431isanintermediatenodebetweenthedrainofthePMOStransistor 610andthedrainoftheNMOStransistor620,andtheinputnode420isanintermediatenode betweenthegateofthePMOStransistor610andthegateoftheNMOStransistor620.Theinput node420oftheinvertingdevice600alsoformstheinputnodeofthebufferingdevice400,andis15 henceconnectedtotheoutputnode330ofthetransientdetector300.Theoutputnode431ofthe invertingdevice600isconnectedtoanintermediatenode421betweenthegateofthePMOS transistor510andthegateoftheNMOStransistor520. Thetransientdetector300consistsofaseriesconnectionofacapacitiveelement320,aresistive element310andanode330whichisanintermediatenodebetweenthecapacitiveelement320and20 theresistiveelement310andwhichservesasanoutputnodeofthetransientdetector300.More precisely,inFigure5athecapacitiveelement320isconnectedbetweenthefirstnodeAandthe outputnode330,whereastheresistiveelement310isconnectedbetweentheoutputnode330and thesecondnodeB. Assuch,intheESDprotectiondeviceofFigure5a,thetriggeringdevice500infactconsistsofthe25 transientdetector300andthebufferingdevice400,andsaidbufferingdevice400consistsoftwo stagesofinvertingdevices,namelyafirststageconsistingoftheinvertingdevice600,andasecond stageconsistingofthestackofthePMOStransistor510,theNMOStransistor520andthecurrent limitingdevice410.Thecompositionofsaidstackisidenticaltothatoftheinvertingdevice600, yetwiththecurrentlimitingdevice410insertedbetweentheoutputnode430andtheNMOS30 transistor520. TheESDprotectiondeviceofFigure5bcorrespondswiththedeviceofFigure5a,yetwiththeorder ofthePMOStransistor520andthecurrentlimitingdevice410switched,sothatthedrainofthe NMOStransistor520isconnectedtotheoutputnode430ofthebufferingdevice400,andthecurrent35 limitingdevice410isconnectedbetweenthesourceoftheNMOStransistor520andthesecond 2025 / 5001 BE2025 / 5001 23 nodeB.Inotherwords,thedeviceofFigure5bistheanalogofthedeviceofFigure3bwhereinan additionalinvertingdevice600wasinsertedbetweenthefirstnodeAandthesecondnodeB. Asexplainedabove,ESDprotectiondevicesaccordingtothepresentedembodimentshavethe advantage,amongstotheradvantages,tobecharacterized,contrarytopriorartalternatives,bytwo5 differenttimeconstants:afirsttimeconstantforthechargingoftheactivationnode120ofthe switchingdevice,andasecondtimeconstantforthedischargingofsaidactivationnode120.Herein, theformermaybemuchshorterthanthelatter,sothatthestart-upphasewhereinlargeamountsof currentaredissipated,isshortcomparedtothedischargingphase,whichisrequiredtoencompass theentiredurationofanESDevent.Indeed,thankstothepresenceofthecurrentlimitingdevice10 410,theresistiveelement310andthecapacitiveelement320ofthetransientdetector300maybe reducedinbothphysicaldimensionsandrespectiveelectricalresistanceandcapacitancevaluesR andC,andthusinthetimeconstantforthechargingprocesswhichiscalculatedastheproductofR (inOhm)andC(inFarad),withouttherebyadverselyaffectingthetimeconstantforsaiddischarging process.15 ConventionalESDprotectiondevices,aspresentedinFigures1a-1c,typicallyhaveidenticaltime constantsforcharginganddischarging,rangingfrom1µsto2µs.IntheESDprotectiondevices accordingtoFigures2a-8,thetimeconstantfordischargingmayremainintherangebetween1µs and2µs,butthetimeconstantforchargingmaybereducedtobetween10and20ns.Thisholdsfor embodimentswithanadditionalinvertingdevice600(Figures5a-5b)aswellasforembodiments20 withoutsuchanadditionalinvertingdevice.Theadvantageoftheadditionofsuchaninverting device600liesinthatitgivesrisetofurtheramplificationofthesignalgeneratedbythetransient detector300andfurtherreductionoftheimpedanceattheswitchingdevice110.Consequently,the physicaldimensionsoftheresistiveelement310andthecapacitiveelement320,aswellasthevalues RandC,maybefurtherreduced,andamorecompleteon / offstateoftheinvertingstagesmaybe25 achieved,withthegatevoltagesclosertothevoltageofthesecondnodeB(groundnode)ortothe voltageofthefirstnodeA(powernode). Alongthesamelines,thePMOStransistor610andNMOStransistor620oftheinvertingdevice600 maybeofevensmallerphysicaldimensionsthanthetransistors510and520ofthesecondinverting stage.Forexample,incasetheNMOStransistoroftheswitchingdevice110hasagatewidthof30 1000µm,thegatewidthsofthetransistors510and520mayrangefrom10to50µm,whereasthe gatewidthsofthetransistors610and620oftheinvertingdevice600mayrangefrom1to5µm. IntheembodimentsofFigures5a-5b,thecurrentlimitingdevice410hasbeenplacedinthesecond invertingstage,i.e.inthestageofthePMOStransistor510andtheNMOStransistor520,whose35 drainsarecoupledtotheactivationnode120.Alternatively,thecurrentlimitingdevice410maybe 2025 / 5001 BE2025 / 5001 24 placedinthefirstinvertingstage,i.e.inthestageoftheinvertingdevice600,andmaythusbe coupledtothePMOStransistor610andtheNMOStransistor620whosegatesareconnectedtothe outputnode330ofthetransientdetector300.Twooptionsthenarise:eitherthecurrentlimiting device410maybecoupledbetweenthedrainofthePMOStransistor610andtheintermediatenode 431,orthecurrentlimitingdevice410maybecoupledbetweenthesourceofthePMOStransistor5 610andthefirstnodeA.Assuch,thecurrentlimitingdevice410activelylimitsthedischargecurrent correspondingwiththechargethathasbuiltuponthegateofthePMOStransistor510ofthesecond invertingstage.SaiddischargecurrentthenrunsfromthegateofthePMOStransistor510,viathe currentlimitingdevice410andthePMOStransistor610tothefirstnodeA.Indeed,whiletheNMOS transistor620switchesoffassoonastheswitchingdevice110switchesoff,thePMOStransistor10 610remainsactivatedduringalongerperiodoftimeasthelatterisdirectlyconnectedtothe capacitiveelement320.Thereby,thecurrentlimitingdevice410indirectlyalsolimitsthedischarge currentthatrunsfromtheactivationnode120viatheNMOStransistor520tothesecondnodeB. However,comparedtotheembodimentsofFigures5a-5b,suchembodimentswiththecurrent limitingdevice410inthefirstinvertingstagehaveadisadvantageouslysmallerinternalgate15 capacitanceoftheswitchingdevice110,resultinginanundesirablyfasterdischargingofthe activationnode120. TheESDprotectiondevicesofFigures2a-2b,3a-3c,4a-4c,6a-6band7compriseasingleinverting stagewithinthebufferingdevice400,whereasthedevicesofFigures5a-5bcomprisetwoinverting20 stages:afirstinvertingstagecomprisingoftheinvertingdevice600,andasecondinvertingstage comprisingthestackofthetransistors510and520,withatleastoneoftheinvertingstages comprisingacurrentlimitingdevice410.However,theinventionisnotlimitedtodeviceswithone ortwoinvertingstages:additionalinvertingdevices600maybeaddedbetweenthefirstnodeAand thesecondnodeBwithoutessentiallyalteringthedevice’sfunctionality.Suchadditionalinverting25 devices600havetheeffectoffurtheramplifyingthesignalgeneratedbythetransientdetector300 duringanESDevent,andthusofspeedingupthechargingoftheswitchingdevice110.Asexplained above,theinsertionofanadditionalinvertingdevice600intothecircuitrequirestheorderofthe resistiveelement310andthecapacitiveelement320inthecircuittobeswitched.Asaresult,ESD protectiondeviceswithanoddnumberofinvertingstageswillhaveatransientdetector30030 comprisingaresistiveelement310coupledtothefirstnodeAandacapacitiveelement320coupled tothesecondnodeB,whereasdeviceswithanevennumberofinvertingstageswillhavearesistive element310coupledtothesecondnodeBandacapacitiveelement320coupledtothefirstnodeA. Figure6adepictsacircuitschematicofanESDprotectiondeviceaccordingtothefirstpreferred35 alternativeofthefirstpreferredvariantofthesecondpreferredembodimentofanESDprotection 2025 / 5001 BE2025 / 5001 25 device,intheterminologyoftheSummarysection.ThisESDprotectiondeviceiscoupledbetween afirstnodeAandasecondnodeBandcomprisesafirstbranch100betweenthefirstnodeAand thesecondnodeB,andasecondbranch200betweenthefirstnodeAandthesecondnodeB. Herein,thefirstbranch100comprisesaPMOStransistorwhichservesastheswitchingdevice110, whereinthegateofsaidPMOStransistorformstheactivationnode120.ThesourceofthePMOS5 transistor110isconnectedtothefirstnodeA,whereasitsdrainisconnectedtothesecondnodeB. Thesecondbranch200comprises,andinfactinFigure6aconsistsof,atriggeringdevice500which iscoupledtotheactivationnode120oftheswitchingdevice110throughanoutputnode430,and whichisconfiguredtoswitchontheswitchingdevice110duringanESDevent.Saidtriggering device500comprisesatransientdetector300andabufferingdevice400.10 Thetransientdetector300isimplementedinthesamewayasinthedeviceofFigures5a-5b:it consistsofaseriesconnectionofacapacitiveelement320,aresistiveelement310andanode330 whichisanintermediatenodebetweenthecapacitiveelement320andtheresistiveelement310and whichservesasanoutputnodeofthetransientdetector300.Moreprecisely,inFigure6athe capacitiveelement320isconnectedbetweenthefirstnodeAandtheoutputnode330,whereasthe15 resistiveelement310isconnectedbetweentheoutputnode330andthesecondnodeB. Thebufferingdevice400ofFigure6aconsistsofastackofaPMOStransistor510,acurrentlimiting device410,anNMOStransistor520,aninputnode420andanoutputnode430.Moreprecisely,the firstnodeAisconnectedtothesourceofthePMOStransistor510,thedrainofthePMOStransistor 510iscoupledtothecurrentlimitingdevice410,thecurrentlimitingdevice410isfurtherconnected20 tothedrainoftheNMOStransistor520,andthesourceoftheNMOStransistor520isconnectedto thesecondnodeB.Furthermore,thegateofthePMOStransistor510isconnectedtothegateofthe NMOStransistor520.Herein,theoutputnode430isanintermediatenodebetweenthecurrent limitingdevice410andthedrainoftheNMOStransistor520,andtheinputnode420isan intermediatenodebetweenthegateofthePMOStransistor510andthegateoftheNMOStransistor25 520.Theoutputnode430ofthebufferingdevice400isfurtherconnectedtotheactivationnode120, andtheinputnode420ofthebufferingdevice400isfurtherconnectedtotheoutputnode330ofthe transientdetector300.Thecurrentlimitingdevice410isdepictedsimplyasarectangularboxwith twoterminals,toemphasizethatFigure6acoversseveraldifferentimplementationsofthecurrent limitingdevice410.Inparticular,thecurrentlimitingdevice410maycomprisearesistorasin30 Figures4a-4boraMOStransistorcoupledtoaninternalnode412asinFigure4c. TheESDprotectiondeviceofFigure6adiffersfromthatofFigure3ainthatitsswitchingdevice 110isaPMOStransistorratherthananNMOStransistor,inthattheoutputnode430ofthebuffering device400islocatedbetweenthecurrentlimitingdevice410andthedrainoftheNMOStransistor 520,ratherthanbetweenthecurrentlimitingdevice410andthedrainofthePMOStransistor510,35 andinthattheorderoftheresistiveelement310andthecapacitiveelement320hasbeenswitched. 2025 / 5001 BE2025 / 5001 26 Consequently,intheembodimentofFigure6a,thecurrentlimitingdevice410willbeconfiguredto limitadischargecurrentfromtheactivationnode120tothefirstnodeA,ratherthantothesecond nodeB.Indeed,oncetheswitchingdevice110switchesoff,theNMOStransistor520willalso switchoff,makingitimpossibleforcurrenttoescapefromtheactivationnode120tothesecond nodeBviatheNMOStransistor520.However,thePMOStransistor510willremainactivated5 duringalongerperiodoftime,asitisconnectedtothecapacitiveelement320which,atthemoment theswitchingdevice110switchesoff,ischargedandthusconfiguredtodelivertothePMOS transistor510asufficientvoltagetoremainactivated.Consequently,thechargebuiltuponthegate oftheswitchingdevice110mayescapetothefirstnodeAviathecurrentlimitingdevice410and thePMOStransistor510.10 TheESDprotectiondeviceofFigure6bamountstothatofFigure6a,yetwiththeorderofthePMOS transistor510andthecurrentlimitingdevice410switched.Asaresult,thecurrentlimitingdevice isconnectedbetweenthefirstnodeAandthesourceofthePMOStransistor510,whilethedrainof thePMOStransistor510isconnectedtotheoutputnode430ofthebufferingdevice400.15 Animportantdifferencebetweenthefirstpreferredembodiment,embodimentsofwhichareshown inFigures2a-5b,andthesecondpreferredembodiment,asshowninFigures6a-6b,isthatinthefirst preferredembodiment,withtheswitchingdevice110consistingofanNMOStransistor,the bufferingdevice400willdeliveralowoutputvoltageduringnormaloperationandahighoutput20 voltageduringESDevents,whereasinthesecondpreferredembodiment,whereintheswitching device110isaPMOStransistor,thiswillbetheotherwayaround:thebufferingdevice400will deliverahighoutputvoltageduringnormaloperationandalowoutputvoltageduringESDevents. Thiscanbeunderstoodasfollows. Theoutputvoltagedeliveredbythebufferingdevice400mustbesuchthatduringESDevents,a25 highvoltageismaintainedbetweenthegateandthesourceoftheswitchingdevice110,whereas duringnormaloperationthevoltagebetweenthegateandthesourceoftheswitchingdevice110is low.SaidvoltagesareconsideredrelativetothesecondnodeB,whichispreferablyagroundnode. Inthefirstpreferredembodiment,theswitchingdevice110isanNMOStransistorwhosesourceis connectedtothesecondnodeB.Therefore,andsincetheoutputnode430ofthebufferingdevice30 400isconnectedtothegateoftheswitchingdevice110,thevoltagebetweenthegateandthesource ofsaidswitchingdevice,relativetothesecondnodeB,coincideswiththeoutputvoltageofthe bufferingdevice400.ThelattervoltagemustthereforebehighduringESDeventsandlowduring normaloperation. Inthesecondpreferredembodiment,theswitchingdevice110isaPMOStransistorwhosesourceis35 connectedtothefirstnodeAandwhosedrainisconnectedtothesecondnodeB.DuringESDevents, 2025 / 5001 BE2025 / 5001 27 thevoltagebetweenthefirstnodeAandthesecondnodeBishigh,sothatrelativetothesecond nodeB,thesourceoftheNMOStransistor110isatahighvoltage.Consequently,inorderforthe voltagebetweenthegateandthesourceoftheNMOStransistor110tobehigh,thegatevoltageof theNMOStransistor110,andthustheoutputvoltagedeliveredbythebufferingdevice400,must below.Duringnormaloperation,thesourceoftheNMOStransistor110,beingconnectedtothe5 firstnodeA,isstillatahighvoltagewhilethegate-sourcevoltagemustbelow,sothatthegate voltageoftheNMOStransistor110,andthustheoutputvoltagedeliveredbythebufferingdevice 400,isalsopulledhigh. Thereaderunderstandsthatembodimentsoftheinventionarenotlimitedtothespecificcircuit10 schematicsshownintheFigures2a-8,butmayalsocovervariantsofthesedevicesobtainedby insertingadditionalcomponentsintothecircuit.Forexample,Figure7depictsacircuitschematicof anESDprotectiondeviceaccordingtothefirstpreferredalternativeofthefirstpreferredvariantof thefirstpreferredembodiment,whichisobtainedfromthecircuitschematicofFigure3aupon addinganadditionalcapacitiveelement700coupledbetweenthesecondnodeBandtheactivation15 node120oftheswitchingdevice110.Saidcapacitiveelement700hastheeffectoffurtherslowing downthedischargingoftheactivationnode120,sothatthecurrentlimitingdevice410maybe implementedwithadevicewithasmallerresistancevalue,orsothatthephysicaldimensionsofthe switchingdevice110maybereducedwithoutcompromisingprotectivefunctionalityagainstESD events.Indeed,saidcapacitiveelement700infactaddsadditionalcapacitancetotheswitching20 device110andthusservestokeeptheswitchingdevice110inaconductingstateduringalonger periodoftime.Choosingtheswitchingdevice110tobeofsmallersizewillnegativelyimpactits internalcapacitance,butsincesaidadditionalcapacitiveelement700causestheoveralldischarging processtoslowdown,adeactivationoftheswitchingdevice110beforetheendoftheESDeventis avoided.Similarly,choosingtheresistancevalueofthecurrentlimitingdevice410tobesmaller25 causesthetimeconstantofthecorrespondingRC-circuittodecrease,butsaiddecreaseis compensatedbytheinsertionoftheadditionalcapacitiveelement700,sothateventuallysaidtime constantremainsmoreorlessunchanged. ThissameeffectcouldbeachievedbytheESDprotectiondevicesofFigures6a-6b,bycouplinga capacitiveelement700betweentheactivationnode120andthefirstnodeA.Indeed,inthe30 embodimentsofFigures6a-6b,thedischargeoftheactivationnode120takesplacethroughthe PMOStransistor510,thecurrentlimitingdevice410andthefirstnodeA,andsaidcapacitive element700isconnectedtosaidfirstnodeA,resultinginanimproveddischargeprocess. Finally,anESDprotectiondeviceaccordingtoanadvantageousembodimentcomprisingaswitching35 device110,atriggeringdevice500,asecondswitchingdevice110’andasecondtriggeringdevice 2025 / 5001 BE2025 / 5001 28 500’isdepictedinFigure8.NotethatthedeviceofFigure8issimilartothatofFigure6ain US8830641inthenameoftheapplicant,yetdiffersfromitatleastinthatitfurthercomprisesa currentlimitingdevice410,asecondcurrentlimitingdevice410’andaninvertingdevice600’.More precisely,thedeviceofFigure8iscoupledbetweenafirstnodeAandasecondnodeB,comprises afirstbranch100andasecondbranch200betweensaidfirstnodeAandsaidsecondnodeB,and5 canbedescribedasfollows. Thefirstbranch100comprisesaseriesconnectionofaswitchingdevice100withanactivationnode 120andasecondswitchingdevice100’withanactivationnode120’.IntheembodimentofFigure 8,bothswitchingdevicesareNMOStransistors,withtheirrespectivegatesservingastheactivation node,andcoupledinsuchawaythatthefirstnodeAisconnectedtothedrainoftheNMOStransistor10 110’,thesourceoftheNMOStransistor110’isconnectedtothedrainoftheNMOStransistor110, andthesourceoftheNMOStransistor110isconnectedtothesecondnodeB.However,inanalogy totheembodimentsofFigures2a-7,otherchoicesofswitchingdevicesarepossible. ThesecondnodeBcomprisesatriggeringdevice500coupledtotheactivationnode120ofthe switchingdevice110andconfiguredtoswitchontheswitchingdevice110duringanESDevent,as15 wellasasecondtriggeringdevice500’coupledtotheactivationnode120’ofthesecondswitching device110’andconfiguredtoswitchingonthesecondswitchingdevice110’duringanESDevent. Saidtriggeringdevices500and500’arehighlysimilartothoseoftheembodimentsofFigures2a- 7.Moreprecisely,thetriggeringdevice500comprisesatransientdetector300havinganoutput node330,andabufferingdevice400havinganinputnode420coupledtotheoutputnode330of20 thetransientdetector,andhavinganoutputnode430coupledtotheactivationnode120ofthe switchingdevice110.Thebufferingdevice400furthercomprisesacurrentlimitingdevice410 configuredtolimitadischargecurrentfromtheactivationnode120oftheswitchingdevice110to thefirstnodeAorthesecondnodeB.Similarly,thesecondtriggeringdevice500’comprisesa secondtransientdetector300’havinganoutputnode330’,andasecondbufferingdevice400’25 havinganinputnode420’coupledtotheoutputnode330’ofthesecondtransientdetector300’,an outputnode430’coupledtotheactivationnode120’ofthesecondswitchingdevice110’,anda secondcurrentlimitingdevice410’configuredtolimitadischargecurrentfromtheactivationnode 120’ofthesecondswitchingdevice110’tothefirstnodeAorthesecondnodeB. Wewillnowdescribethespecificcomponentsandelectricalconnectionsoftheembodimentof30 Figure8,yetthereaderunderstandsthattheinventionalsocoversseveralalternativeconfigurations. Thetriggeringdevice500issimilartothatofFigure4a,yetwiththeresistiveelement310andthe sourceofthePMOStransistor510notdirectlyconnectedtothefirstnodeA,butratherto respectivelyanode360andtheoutputnode430’ofthesecondbufferingdevice400’.Similarly,the switchingdevice110issimilartothatofFigure4a,yetwiththedrainoftheNMOStransistorthat35 servesastheswitchingdevice110notdirectlyconnectedtothefirstnodeA,butrathertothesource 2025 / 5001 BE2025 / 5001 29 oftheNMOStransistorthatservesasthesecondswitchingdevice110’.Thesecondtriggeringdevice 500’issimilartothatofFigure5a,yetwiththesecondtransientdetector300’andthesecond bufferingdevice400’notdirectlyconnectedtothesecondnodeB,butrathertoanode360,andwith theoutputnode430’ofthesecondbufferingdevice400’additionallycoupledtothesourceofthe PMOStransistor510ofthebufferingdevice400.Thesecondbufferingdevice400’thuscomprises5 afirstinvertingstageconsistingofaninvertingdevice600’,andasecondinvertingstageconsisting ofastackofaPMOStransistor510’,aresistorservingasthesecondcurrentlimitingdevice410’,andanNMOStransistor520’,ofthesametypeasthecorrespondingstackinthebufferingdevice 400.Theinvertingdevice600’isdepictedasatriangle,whichsymbolicallyrepresentsadevice whichisidenticaltotheinvertingdevice600ofFigure5a,andthusconsistofastackofaPMOS10 transistorandanNMOStransistorwhosegatesareconnectedtotheoutputnode330’ofthesecond transientdetector300’.ThesourceoftheNMOStransistor520’ofthefirstinvertingstageofthe secondbufferingdevice400’,thesourceoftheNMOStransistor620’oftheinvertingdevice600’, theresistiveelement310ofthetransientdetector300andtheresistiveelement310’ofthesecond transientdetector300’areallmutuallyconnectedinasingleintermediatenode360.Inparticular,15 thetransientdetector300isconnectedinseriestothesecondtransientdetector300’,whereinthe node360isanintermediatenodebetweenbothdetectors. Moreover,theoutputnode430’ofthesecondbufferingdevice400’isnotonlyconnectedtothe secondcurrentlimitingdevice410’,thePMOStransistor510’andtheactivationnode120’ofthe secondswitchingdevice110’,butalsotothesourceofthePMOStransistor510ofthebuffering20 device400.Assuch,theoutputnode430’ofthesecondbufferingdevice400’isinparticularcoupled tothebufferingdevice400. TheESDprotectiondeviceofFigure8furthercomprisesavoltagedivider800coupledtothe transientdetector300andtothesecondtransientdetector300’,andconfiguredfordividingavoltage25 betweenthefirstnodeAandthesecondnodeB.Saidvoltagedivider800consistsofaseries connectionofafirstresistor340andasecondresistor350.Thefirstresistor340isconnected betweenthesecondnodeBandanintermediatenode370,whereasthesecondresistor350is connectedbetweenthefirstnodeAandsaidintermediatenode370.Theintermediatenode370is moreoverconnectedviathenode360totheresistiveelement310ofthetransientdetector300,the30 resistiveelement310’ofthesecondtransientdetector300’andthesecondbufferingdevice400’. Theresistors340and350arepreferablyofidenticalresistance. DuringanESDevent,ahighvoltagearisesbetweenthefirstnodeAandthesecondnodeB.Said voltageisdividedoverthetwobufferingdevices500and500’bythevoltagedivider800,sothat35 preferablyhalfofsaidvoltageissensedbythetransientdetector300,andtheremainingfraction, 2025 / 5001 BE2025 / 5001 30 preferablytheremaininghalf,ofsaidvoltageissensedbythesecondtransientdetector300’.In reaction,thetransientdetector300sendsasignaltotheswitchingdevice110intheformofavoltage surge,whichisamplifiedbythebufferingdevice400,andthesecondtransientdetector300’sends asignaltothesecondswitchingdevice110’intheformavoltagesurge,whichisamplifiedbythe secondbufferingdevice400’.Providedthereceivedvoltagesurgesexceedtherespectivethreshold5 voltagesoftheswitchingdevices110and110’,bothswitchingdevicesareswitchedonandexcessive chargesonthefirstnodeAcanescapetothesecondnodeBviathesecondswitchingdevice110’ andtheswitchingdevice110.Thus,theESDcurrentsareshuntedbytheswitchingdevices110and 110’. Oncetheswitchingdevice110switchesoffduetoinsufficientreceivedsignalstrength,itsgateneeds10 todischarge.TheexcessivechargeonsaidgatemayescapetothesecondnodeBviathecurrent limitingdevice410andtheNMOStransistor520,whichremainsactivatedwhilstthePMOS transistor510switchesoff,sincetheNMOStransistor520isconnectedtothechargedcapacitive element320. Similarly,oncethesecondswitchingdevice110’switchesoffduetoinsufficientreceivedsignal15 strength,eithersimultaneouslywiththeswitchingdevice110ornot,itsgateneedstodischarge.This isachievedbymeansofadischargecurrentthatrunsfromtheactivationnode120’ofthesecond switchingdevice110’,viathesecondcurrentlimitingdevice410’,theNMOStransistor520’ofthe secondbufferingdevice400’,theintermediatenodes360and370,andtheresistiveelement340of thevoltagedivider800,tothesecondnodeB.20 Thecurrentlimitingdevice410therebyactivelylimitsthedischargecurrentfromtheactivationnode 120oftheswitchingdevice110tothesecondnodeB,whereasthesecondcurrentlimitingdevice 410’activelylimitsthedischargecurrentfromtheactivationnode120’ofthesecondswitching device110’tothesecondnodeB. 25 Asmentionedbefore,theembodimentofFigure8isparticularlyadvantageousforinternalcircuits implementedwithFinFETsandsimilarrecentandadvancedtransistortechnologies,sincesuch transistorsrequireESDprotectiondevicesconfiguredtoprotectthecircuitfromdamageunderhigh ESDvoltages.TheembodimentofFigure8hasthisfunctionality,thankstothepresenceofthetwo switchingdevices110and110’,thetwotriggeringdevices500and500’,andthevoltagedivider30 800.ThesameholdsforthenumerousvariantsoftheembodimentofFigure8thatcanbeobtained uponreplacingthetriggeringdevice500and / orthesecondtriggeringdevice500’bythetriggering deviceofanyoftheFigures2a-2b,3a-3c,4a-4c,5a-5band7,and / oruponreplacingboththe triggeringdevice500andtheswitchingdevice110,and / orboththesecondtriggeringdevice500’ andtheswitchingdevice110’,bythoseo,