SINTONIZADOR DE ANTENA

Abstract

An apparatus includes a power amplifier, a first inductor coupled to the power amplifier, a second inductor magnetically coupled with the first inductor, and an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, and the second terminal is coupled to an antenna port. The impedance matching circuit includes a third inductor coupled between the first terminal and the second terminal, wherein the third inductor overlaps the first inductor and the second inductor, and one or more capacitors coupled to the third inductor.

Description

1 / 41 ANTENNA TUNER REFERENCE TO RELATED DEPOSIT REQUEST(S)

[001] This application claims priority and benefit of non-provisional patent application serial number 18 / 189,561, filed with the United States Patent and Trademark Office on March 24, 2023, the content of which is incorporated herein as if fully set forth below and for all applicable purposes. BACKGROUND Field

[002] The aspects of this disclosure relate generally to wireless communications and, more particularly, to impedance matching in a wireless device. Background

[003] A wireless device may include a transceiver for transmitting and / or receiving signals via one or more antennas. It is desirable to provide good impedance matching between the transceiver and the one or more antennas to facilitate efficient power transfer between the transceiver and the one or more antennas. SUMMARY

[004] The following description presents a simplified summary of one or more implementations to provide a basic understanding of such implementations. This summary is not an extensive overview of all implementations considered and is not intended to identify key or critical elements thereof, nor to delineate the scope of any or all implementations. Its sole purpose is to present some concepts of one or more implementations in a simplified form as a prelude to the more detailed description that will be presented later. Petition 870250083415, dated 09 / 16 / 2025, pp. 151 / 220 2 / 41

[005] A first aspect relates to an apparatus. The apparatus includes a power amplifier, a first inductor coupled to the power amplifier, a second inductor magnetically coupled to the first inductor, and an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor and the second terminal is coupled to an antenna port. The impedance matching circuit includes a third inductor coupled between the first terminal and the second terminal, wherein the third inductor overlaps the first inductor and the second inductor, and one or more capacitors coupled to the third inductor.

[006] A second aspect relates to an apparatus. The apparatus includes a power amplifier, a low-noise amplifier, a first inductor coupled to the power amplifier, a second inductor magnetically coupled to the first inductor, and a third inductor coupled to the low-noise amplifier, wherein the third inductor is magnetically coupled to the second inductor. The apparatus also includes an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, and the second terminal is coupled to an antenna port. The impedance matching circuit includes a fourth inductor coupled between the first terminal and the second terminal, and one or more capacitors coupled to the fourth inductor.

[007] A third aspect relates to a method for antenna tuning. The method includes magnetically coupling a radio frequency (RF) signal from a first inductor to a second inductor and tuning an antenna impedance seen at the second inductor using an impedance matching circuit, wherein the impedance matching circuit includes a third inductor that overlaps the first and second inductors, and one or more capacitors coupled to the third inductor. The method also includes propagating the Petition 870250083415, dated 09 / 16 / 2025, pp. 152 / 220 3 / 41 RF signal from the impedance matching circuit to the antenna.

[008] A fourth aspect relates to an apparatus. The apparatus includes a power amplifier, a first inductor coupled to the power amplifier, a second inductor magnetically coupled to the first inductor, and an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor and the second terminal is coupled to an antenna port. The impedance matching circuit includes a third inductor magnetically coupled to the first inductor and to the second inductor and coupled between the first terminal and the second terminal, and one or more capacitors coupled to the third inductor.

[009] A fifth aspect relates to an apparatus for tuning an antenna. The apparatus includes means for magnetically coupling a radio frequency (RF) signal from a first inductor to a second inductor and means for tuning an antenna impedance seen on the second inductor, wherein the means for tuning the antenna impedance include a third inductor that overlaps the first inductor and the second inductor. The method also includes means for propagating the RF signal from the means for tuning the antenna impedance to the antenna. BRIEF DESCRIPTION OF THE DRAWINGS

[010] Figure 1 is a diagram of an environment that includes an electronic device that includes a transceiver in accordance with certain aspects of the present disclosure.

[011] Figure 2 is an exploded perspective view showing exemplary components of an electronic device according to certain aspects of the present disclosure.

[012] Figure 3 shows an example of an electronic device that includes a transceiver and antennas in accordance with certain aspects of the present Petition 870250083415, dated 09 / 16 / 2025, pp. 153 / 220 4 / 41 disclosure.

[013] Figure 4 shows an example of a transceiver that includes a power amplifier and a transformer in accordance with certain aspects of the present disclosure.

[014] Figure 5 shows an example of a tunable capacitor coupled in parallel to a transformer inductor according to certain aspects of the present disclosure.

[015] Figure 6 shows an example of a transceiver that includes a power amplifier, a low-noise amplifier and a transformer in accordance with certain aspects of the present disclosure.

[016] Figure 7 shows an example of an impedance matching circuit that includes an inductor, a first capacitor and a second capacitor in accordance with certain aspects of the present disclosure.

[017] Figure 8A shows an example of a control circuit configured to control a first capacitance and a second capacitance of the first capacitor and the second capacitor, respectively, of Figure 7, according to certain aspects.

[018] Figure 8B shows an exemplary implementation of the first capacitor and the second capacitor of Figure 8A in accordance with certain aspects of the present disclosure.

[019] Figure 9A shows a top view of an exemplary layout of an inductor in an impedance matching circuit according to certain aspects of the present disclosure.

[020] Figure 9B shows the inductor of Figure 9A with a bridge of the inductor shown in Figure 9A removed in accordance with certain aspects of the present disclosure.

[021] Figure 9C shows an example of inductor current flow. Petition 870250083415, dated 09 / 16 / 2025, pp. 154 / 220 5 / 41 Figure 9A in accordance with certain aspects of the present disclosure.

[022] Figure 9D shows another example of current flow in the inductor of Figure 9A according to certain aspects of the present disclosure.

[023] Figure 10 shows a top view of an example in which the inductor of Figure 9A overlaps a first inductor and a second inductor in accordance with certain aspects.

[024] Figure 11 shows an example of a first inductor that includes two loops and a second inductor that includes two loops according to aspects of the present disclosure.

[025] Figure 12A shows a top view of another exemplary layout of an inductor in accordance with certain aspects of the present disclosure.

[026] Figure 12B shows the inductor of Figure 12A with a bridge of the inductor shown in Figure 12A removed in accordance with certain aspects of the present disclosure.

[027] Figure 13 shows an example of a structure that includes multiple inductors in accordance with certain aspects of the present disclosure.

[028] Figure 14 shows another example of a structure that includes multiple inductors in accordance with certain aspects of the present disclosure.

[029] Figure 15 is a flowchart showing an example of a method for tuning an antenna in accordance with certain aspects of the present disclosure. DETAILED DESCRIPTION

[030] The detailed description set forth below, together with the accompanying drawings, is intended to serve as a description of various configurations and is not intended to represent the only configurations in which the concepts described in the present invention may be practiced. The description Petition 870250083415, dated 09 / 16 / 2025, pages 155 / 220 Detailed explanation 6 / 41 includes specific details aimed at providing a complete understanding of various concepts. However, it will become evident to those skilled in the art that these concepts can be applied without these specific details. In some cases, well-known structures and components are shown in block diagram form to avoid obscuring such concepts.

[031] Figure 1 is a diagram of an environment 100 that includes an electronic device 102 which includes a transceiver 196. In environment 100, the electronic device 102 communicates with a base station 104 via a wireless link 106. As shown, the electronic device 102 is depicted as a smartphone.However, electronic device 102 can be implemented as any suitable electronic or computing device, such as a cellular base station, a broadband router, an access point, a cell phone or mobile phone, a gaming device, a navigation device, a media device, a laptop computer, a desktop computer, a tablet computer, a server computer, a network-attached storage (NAS) device, a smart home appliance, a vehicle-based communication system, an Internet of Things (IoT) device, a sensor or security device, an asset tracker, and so on.

[032] Base station 104 communicates with electronic device 102 via wireless link 106, which can be implemented as any suitable type of wireless link. Although depicted as a base station tower of a cellular radio network, base station 104 can represent or be implemented as another device, such as a satellite, a terrestrial broadcast tower, an access point, a point-to-point device, or a node. Petition 870250083415, dated 09 / 16 / 2025, pp. 156 / 220 7 / 41 mesh network, other electronic device as described above in general, and so on. Wireless link 106 may include a downlink of data and / or control information communicated from base station 104 to electronic device 102. Wireless link 106 may also include an uplink of data and / or control information communicated from electronic device 102 to base station 104. Wireless link 106 may be implemented using any suitable communication protocol or standard, such as 3rd generation partnership project longterm evolution (3GPP LTE), 3rd generation partnership project longterm evolution (3GPP NR 5G), Institute of Electrical and Electronics Engineers (IEEE) 802.11, IEEE 802.1, Bluetooth™, and so on.

[033] The electronic device 102 includes a processor 180 and a memory 182. The memory 182 may be or form a portion of a computer-readable storage medium. The processor 180 may include any type of processor, such as an application processor or a multi-core processor, which is configured to execute processor-executable instructions (e.g., code) stored by the memory 182. The memory 182 may include any suitable type of data storage medium, such as volatile memory (e.g., random-access memory (RAM)), non-volatile memory (e.g., Flash memory), optical media, and magnetic media (e.g., disk or tape), and so forth.In the context of this disclosure, memory 182 is implemented to store instructions 184, data 186, and other information from the electronic device 102, and therefore, when configured or when it is part of a computer-readable storage medium, memory 182. Petition 870250083415, dated 09 / 16 / 2025, pp. 157 / 220 8 / 41 does not include transient propagation signals or carrier waves.

[034] The electronic device 102 may also include input / output (I / O) ports 190. I / O ports 190 enable data exchange or interaction with other devices, networks or users, or between components of the device.

[035] The electronic device 102 may additionally include a signal processor (SP) 192 (for example, as a digital signal processor (DSP)). The signal processor 192 may function similarly to the processor and may be able to execute instructions and / or process information in conjunction with the memory 182.

[036] For communication purposes, the electronic device 102 also includes a modem 194, a transceiver 196 and one or more antennas. The transceiver 196 provides connectivity to the respective networks and other electronic devices connected to it using radio frequency (RF) signals. The transceiver 196 can facilitate communication through any suitable type of wireless network, such as a wireless local area network (WLAN), a peer-to-peer (P2P) network, a mesh network, a cellular network, a wireless wide-area network (WWAN), a navigation network (for example, the North American Global Positioning System (GPS) or other satellite positioning system (GNSS)) and / or a wireless personal area network (WPAN).

[037] Figure 2 shows an example where electronic device 102 is implemented as a mobile device (e.g., a smartphone). However, as discussed above with reference to Figure 1, the device Petition 870250083415, dated 09 / 16 / 2025, pp. 158 / 220 9 / 41 electronic 102 is not limited to a mobile device.

[038] In the example shown in Figure 2, the electronic device 102 includes a top cover 202, a display layer 206, a substrate 208 (e.g., a printed circuit board (PCB), a plastic laminate, a ceramic, any combination thereof, etc.) and a bottom cover 210. In this example, the top cover 202 includes a screen 216. The top cover 202 and the bottom cover 210 provide housing for the electronic device 102 that retains the display layer 206, the substrate 208 (e.g., PCB) and other components (not shown in Figure 2) of the electronic device 102 that may or may not be on the substrate 208. The housing may be substantially rectangular, as shown in the example in Figure 2. However, it should be considered that the housing may have other shapes. It should also be considered that the housing may be configured to curve or bend in some implementations.Furthermore, it should be considered that substrate 208 (e.g., PCB) is not limited to the example size and / or shape shown in Figure 2.

[039] Figure 3 shows an example in which electronic device 102 includes transceiver 196, memory 182, and antennas 320-1 to 320-N. Electronic device 102 also includes a baseband processor 330 coupled to transceiver 196 and memory 182. The baseband processor 330 may be part of modem 194, signal processor 192, and / or processor 180 discussed above with reference to Figure 1. Transceiver 196 may be coupled to baseband processor 330 via one or more signal lines. For example, in some implementations, transceiver 196 may be coupled to baseband processor 330 via multiple signal lines arranged in parallel. Transceiver 196, memory 182, baseband processor 330, antennas 320-1 to 320-N, or any combination thereof, may be Petition 870250083415, dated 09 / 16 / 2025, pp. 159 / 220 10 / 41 assembled, formed and / or incorporated into the substrate 208 (e.g., PCB). For example, in some implementations, the transceiver 196 may be integrated into multiple chips in a multi-chip module.

[040] Transceiver 196 can be coupled to each of the antennas 3201 to 320-N via the respective transmission lines 310-1 to 310-N. A transmission line may also be called a feed line or another term. In certain aspects, the transmission lines 310-1 to 310-N may be implemented with metal traces formed and / or embedded in the substrate 208 (e.g., PCB). In some implementations, transceiver 196 may be integrated into one or more chips mounted on the substrate 208 and the antennas 3201 to 320-N may be external to one or more chips (e.g., off-chip).

[041] Each of the 320-1 to 320-N antennas can be implemented with a patch antenna, a dipole antenna, or another type of antenna. The 320-1 to 320-N antennas may also be called antenna elements or another term. In some implementations, the 320-1 to 320-N antennas may be arranged in a one-dimensional array, a two-dimensional array, a three-dimensional array, or another configuration. In some implementations, one or more of the 320-1 to 320-N antennas may be integrated into an antenna module, which may be mounted on the substrate 208 or mounted on another surface of the electronic device 102. In some implementations, two or more of the 320-1 to 320-N antennas may be opposed in different directions to provide wireless transmission and / or reception in different directions.

[042] Transceiver 196 can be configured to transmit one or more RF signals (e.g., to base station 104) via one or more of antennas 320-1 to 320-N. Transceiver 196 can also be configured to receive one or more RF signals (e.g., from base station 104) via one or Petition 870250083415, dated 09 / 16 / 2025, pp. 160 / 220 11 / 41 plus antennas 320-1 to 320-N. The 196 transceiver can transmit and / or receive RF signals using one or more wireless communication technologies, including, but not limited to, a third-generation (3G) technology (e.g., code division multiple access (CDMA)), a fourth-generation (4G) technology (also known as long-term evolution (LTE)), a fifth-generation (5G) technology, one or more technologies based on one or more IEEE 802.11 protocols (e.g., IEEE 802.11ac, IEEE 802.11n, IEEE 802.11ad, IEEE 802.11ax, IEEE 802.11ay, etc.) and / or one or more other technologies. The RF signals may be in a millimeter wave (mmW) frequency band and / or another frequency band. Examples of mmW frequency bands include mmW frequency bands used in fifth-generation standards.

[043] To transmit data and / or control information (for example, to base station 104), baseband processor 330 can process the data and / or control information into one or more baseband signals. The processing performed by baseband processor 330 may include encoding and / or modulation. Transceiver 196 receives the one or more baseband signals and processes the one or more baseband signals into one or more RF signals for transmission via one or more of antennas 320-1 to 320-N. The processing performed by transceiver 196 may include filtering, frequency upconversion, power amplification, phase shifting, or any combination thereof. In certain respects, transceiver 196 may first upconvert the one or more baseband signals into one or more intermediate frequency (IF) signals and upconvert the one or more IF signals into one or more RF signals.

[044] To receive control data / or information (e.g., from Petition 870250083415, dated 09 / 16 / 2025, pages 161 / 220 (12 / 41 base station 104), transceiver 196 receives one or more RF signals carrying data and / or control information via one or more of antennas 320-1 to 320-N. Transceiver 196 can then process the one or more RF signals into one or more baseband signals. The processing performed by transceiver 196 may include low-noise amplification, frequency downconversion, phase shifting, filtering, or any combination thereof. In certain respects, transceiver 196 may first downconvert the one or more RF signals into one or more IF signals and then downconvert the one or more IF signals into one or more baseband signals. Baseband processor 330 receives the one or more baseband signals and processes them to recover the data and / or control information. The processing performed by baseband processor 330 may include decoding and / or demodulation.

[045] Figure 4 shows an example of a portion of the 196 transceiver in certain respects. In this example, the 196 transceiver includes a power amplifier (PA) 410 and a transformer 420. As shown in Figure 4, the transformer 420 is coupled to an antenna 320 via a transmission line 310. The antenna 320 can be any one of the antennas 320-1 to 320-N shown in Figure 3. In some implementations, the transformer 420 is integrated into a chip and the antenna 320 is external to the chip (i.e., outside the chip). In this example, the transformer 420 can be coupled to the transmission line 310 via an antenna port. The antenna port 450 can include a block on the chip. The block can be coupled to the transmission line 310 by a protrusion (e.g., not shown) and / or another conductor. The 420 transformer can be coupled to the 450 antenna port via metal routing on the chip. However, it must Petition 870250083415, dated 09 / 16 / 2025, pp. 162 / 220 13 / 41 It should be considered that the present disclosure is not limited to this example. In other examples, the 320 antenna may be configured on a chip or share a substrate or other common structure to support the 410 power amplifier and the 320 antenna (for example, integrated together in a module).

[046] Although a PA 410 and a transformer 420 are shown in Figure 4, it should be considered that the transceiver 196 may include multiple PAs and transformers. For example, the transceiver 196 may include a respective PA and a respective transformer for each antenna between antennas 320-1 to 320N shown in Figure 3 or for each antenna between a subset of antennas 320-1 to 320-N.

[047] The PA 410 is configured to amplify an RF signal for transmission through antenna 320. In the example shown in Figure 4, the PA 410 is a differential PA that has an input 412 and a differential output that includes a first output 416 and a second output 418. In this example, the PA 410 is configured to receive an RF signal at input 412 (for example, from a mixer or other circuit), amplify the RF signal, and output the amplified RF signal at the differential output. In this example, the amplified RF signal can be a differential RF signal that includes a first RF signal at the first output 416 and a second RF signal at the second output 418. Input 412 can be a single-ended input or a differential input.

[048] In the example shown in Figure 4, transformer 420 includes a first inductor 430 and a second inductor 440 magnetically (i.e., inductively) coupled together. The first inductor 430 is coupled between the first output 416 and the second output 418 of PA 410, and the second inductor 440 is coupled between antenna 320 and ground (or some reference potential). Since the first inductor 430 and the second inductor 440 are magnetically Petition 870250083415, dated 09 / 16 / 2025, pp. 163 / 220 14 / 41 coupled, transformer 420 transfers power from PA 410 to antenna 320. In certain aspects, transformer 420 is configured to transform a differential RF signal at the first inductor 430 into a single-ended RF signal at the second inductor 440 for transmission through antenna 320.

[049] It should be considered that the 196 transceiver may include one or more additional components not explicitly shown in Figure 4. For example, Figure 5 shows an example where the 196 transceiver additionally includes a tunable capacitor 510 coupled in parallel to the first inductor 430. In this example, the first inductor 430 and the tunable capacitor 510 provide a load at the output of the PA 410 with a tunable resonant frequency to increase the gain at a desired frequency. In this example, a center tap (not shown) of the first inductor 430 may be coupled to a common-mode voltage. However, it should be considered that the present disclosure is not limited to this example.

[050] Figure 6 shows an example in which the transceiver 196 additionally includes a low-noise amplifier (LNA) 610 in accordance with certain aspects. The LNA 610 has an input 612 and an output 614. The LNA 610 is configured to receive an RF signal from antenna 320 at input 612, amplify the received RF signal, and output the amplified RF signal at output 614. The output 614 of the LNA 610 can be coupled to the mixer (not shown) used for frequency down-conversion, a filter (not shown), and / or another component of the transceiver 196.

[051] In this example, transformer 420 additionally includes a third inductor 620 coupled between the input 612 of LNA 610 and ground (or some reference potential). The third inductor 620 is magnetically (i.e., inductively) coupled to the second inductor 440. Since the second inductor 440 and the third inductor 620 are magnetically coupled, the transformer Petition 870250083415, dated 09 / 16 / 2025, pp. 164 / 220 15 / 41 420 transfers power from an RF signal received from antenna 320 to input 612 of LNA 610. This allows LNA 610 to receive and amplify RF signals received by antenna 320. Thus, in this example, transformer 420 magnetically (i.e., inductively) couples PA 410 to antenna 320 and magnetically (i.e., inductively) couples antenna 320 to LNA 610.

[052] In this example, the 420 transformer can also be called a three-coil transformer, since the 420 transformer includes three inductors in this example. However, it should be considered that the 420 transformer is not limited to this example and that the 420 transformer may include one or more additional inductors in other implementations.

[053] One challenge with using the 196 transceiver is that the 320 antenna impedance can vary (e.g., due to changes in the environment). For example, antenna impedance can change based on how a user is holding the 102 electronic device, change due to crosstalk between the 320 antenna and other active antennas (e.g., one or more of the other 320-1 to 320-N antennas), change due to a change in frequency band, and so on. Additionally, antenna impedance can be affected by the geometry and / or composition of the housing used to house the 320 antenna, the location and / or orientation of the 320 antenna in the housing, and so on.

[054] Antenna impedance variation can increase impedance mismatch between transceiver 196 and antenna 320, which reduces the efficiency of power transfer between antenna 320 and transceiver 196. Due to the reduced power transfer, the output power of PA 410 needs to be increased to achieve a given transmission power at antenna 320, which increases power consumption and reduces power efficiency. The increased impedance mismatch can Petition 870250083415, dated 09 / 16 / 2025, pages 165 / 220 16 / 41 also increase the noise level of LNA 610.

[055] To resolve this, aspects of the present disclosure provide a tunable impedance matching circuit (e.g., antenna tuning circuitry) configured to tune the impedance seen on the 196 transceiver to maintain good impedance matching across variations in antenna impedance, as further discussed below.

[056] Figure 7 shows an example in which the electronic device 102 additionally includes an impedance matching circuit 710 coupled between the transformer 420 and the antenna 320. In this example, the impedance matching circuit 710 has a first terminal 712 coupled to the second inductor 440 of the transformer 420 and a second terminal 714 coupled to the antenna 320 (for example, through the antenna port 450 and the transmission line 310).

[057] The 710 impedance matching circuit can be configured to tune the impedance (marked “Z”) seen at the first terminal 712 to maintain a good impedance match across variations in the antenna 320 impedance. For example, a good impedance match can be achieved when the impedance seen at the first terminal 712 is approximately equal to a target impedance (e.g., 50 ohms). In this example, the 710 impedance matching circuit can tune the impedance Z seen at the first terminal 712 to keep the impedance Z around the target impedance (e.g., 50 ohms). A good impedance match increases the efficiency of power transfer between the transceiver 196 and the antenna 320 for better overall system efficiency. It should be noted that the 710 impedance matching circuit does not need to provide a perfect impedance match. Petition 870250083415, dated 09 / 16 / 2025, pp. 166 / 220 17 / 41

[058] In this example, the 710 impedance matching circuit includes an inductor 720, a first capacitor 730, and a second capacitor 740. In this example, the inductor 720 is coupled between the first terminal 712 and the second terminal 714. The first capacitor 730 is coupled between the second terminal 714 and ground (or some reference potential), and the second capacitor 740 is coupled between the first terminal 712 and ground (or some reference potential). In this example, the inductor 720, the first capacitor 730, and the second capacitor 740 are arranged to form a pi impedance matching network.

[059] Other types of impedance matching networks are possible, such as an L-shaped impedance matching network and a T-shaped impedance matching network. With respect to the L-shaped impedance matching network, the pi-shaped impedance matching network provides impedance tuning over a wider range than the L-shaped impedance matching network. The T-shaped impedance matching network uses tunable capacitors in series. However, tunable capacitors in series may require strong drain and source routing to switching transistors in the tunable capacitors to handle high currents (e.g., several hundred milliamps) for high-power applications. The strong drain and source routing degrade the off-impedance of the switching transistors and make tuning the capacitors more difficult.In contrast, the pi impedance matching network uses a series inductor (e.g., the 720 inductor), which can be more easily designed to handle high currents for high-power applications.

[060] In certain aspects, the first capacitor 730 has a first tunable capacitance C1 and the second capacitor 740 has a second capacitance C2. In these aspects, the impedance Z seen at the first terminal 712 can be tuned by tuning the first capacitance C1 and / or the second Petition 870250083415, dated 09 / 16 / 2025, pp. 167 / 220 18 / 41 capacitance C2. For example, if the antenna impedance is low, then the second capacitance C2 of the second 740 capacitor can be tuned to bring the impedance Z close to the target impedance for a good impedance match. If the antenna impedance is high, then the first capacitance C1 of the first 730 capacitor can be tuned to bring the impedance Z close to the target impedance (e.g., 50 Ω) for a good impedance match.

[061] In certain respects, the 720 inductor, the first 730 capacitor, and the second 740 capacitor can be integrated on the same chip as the 430, 440, and 620 inductors. One advantage of integrating the 720 inductor on the chip is that additional blocks and / or protrusions are not required to couple the 720 inductor to the 730 and 740 capacitors. In contrast, using an external inductor for the 720 inductor may require additional blocks and / or protrusions and additional metal routing on the 208 substrate to couple the two ends of the 720 inductor to the 730 and 740 capacitors.

[062] Figure 8A shows an example where the first capacitance C1 of the first capacitor 730 and the second capacitance C2 of the second capacitor 740 are controlled by a control circuit 810. In this example, the first capacitor 730 is configured to set the first capacitance C1 based on a first control signal (marked as Ctrl1) from the control circuit 810, and the second capacitor 740 is configured to set the second capacitance C2 based on a second control signal (marked as Ctrl2) from the control circuit 810.

[063] In certain respects, each of the first capacitor 730 and the second capacitor 740 can be implemented with a respective digitally programmable capacitor. In this example, the first control signal can include a first digital signal that defines (i.e., programs) the first Petition 870250083415, dated 09 / 16 / 2025, pages 168 / 220 19 / 41 capacitance C1 digitally. In some implementations illustrated in Figure 8B, the first capacitor 730 includes a first bank of switchable capacitors 820-1 to 820-n, where the first digital signal defines the first capacitance C1 by controlling which of the switchable capacitors 820-1 to 820-n in the first bank are on. In certain aspects, the first digital signal includes a digital code that includes bits, where the bit value of each bit controls whether a respective capacitor among the switchable capacitors 820-1 to 820-n in the first bank is on or off. In the example shown in Figure 8B, the switchable capacitors 820-1 to 820-n are coupled in parallel, and each of the switchable capacitors 820-1 to 820-n includes the respective capacitors 832-1 to 832-n and 834-n, and a respective switch 830-1 to 830-n (e.g., a switching transistor) coupled in series.In this example, the first digital signal turns on a switchable capacitor (that is, one of the switchable capacitors 820-1 to 820-n) by turning on the respective switch (that is, the respective switch among the switches 830-1 to 830-n) and turns off the switchable capacitor by turning off the respective switch.

[064] Furthermore, in this example, the second control signal may include a second digital signal that digitally defines (i.e., programs) the second capacitance C2. In some implementations illustrated in Figure 8B, the second capacitor 740 includes a second bank of switchable capacitors 840-1 to 840n, where the second digital signal defines the second capacitance C2 by controlling which of the switchable capacitors 840-1 to 840-n in the second bank are switched on. In certain aspects, the second digital signal includes a digital code that includes bits, where the bit value of each bit controls whether a respective switch among the switchable capacitors 840-1 to 840-n in the second bank is switched on or off. In the example shown in Figure 8B, the switchable capacitors 840-1 to 840-n are coupled in parallel and each of the switchable capacitors Petition 870250083415, dated 09 / 16 / 2025, pp. 169 / 220 20 / 41 840-1 to 840-n includes the respective capacitors 852-1 to 852-n and 854-1 to 854-n, and a respective switch 850-1 to 850-n (e.g., a switching transistor) coupled in series. In this example, the second digital signal turns on a switchable capacitor (i.e., one of the switchable capacitors 840-1 to 840-n) by turning on the respective switch (i.e., the respective switch among the switches 850-1 to 850-n) and turns off the switchable capacitor by turning off the respective switch.

[065] It should be considered that the 820-1 to 820-ne and 840-1 to 840-n switchable capacitors are not limited to the arrangements and / or numbers of capacitors and switches shown in the example in Figure 8B. In general, a switchable capacitor includes one or more capacitors and one or more switches coupled in series.

[066] In certain respects, the control circuit 810 can store capacitance settings for capacitors 730 and 740 for different use cases of the electronic device 102 that affect the antenna impedance 320. The capacitance settings for the different use cases can be stored (i.e., loaded) in a register or some other type of memory. The capacitance settings for each use case can include a setting for the first capacitance C1 and a setting for the second capacitance C2 that provide a good impedance match for the use case. In this example, the control circuit 810 can determine the current use case of the electronic device 102 and set the first capacitance C1 and the second capacitance C2 based on the settings stored for the determined use case.

[067] For the example where the first control signal for the first capacitor 730 includes the first digital signal, the configuration of the first capacitance C1 for each use case can be specified by a respective Petition 870250083415, dated 09 / 16 / 2025, pages 170 / 220 21 / 41 digital code, where the bit values ​​of the bits in the respective digital code control which switchable capacitors 820-1 to 820-n in the first bank are connected. Furthermore, for the example where the second control signal for the second capacitor 740 includes the second digital signal, the configuration of the second capacitance C2 for each use case can be specified by a respective digital code, where the bit values ​​of the bits in the respective digital code control which switchable capacitors 840-1 to 840-nin of the second bank are connected. In this example, for each use case, the control circuit 810 can store a respective pair of digital codes (i.e., a digital code for the first capacitance C1 and a digital code for the second capacitance C2).In operation, the control circuit 810 can determine the current use case of the electronic device 102 and set the first capacitance C1 and the second capacitance C2 based on the stored digital codes for the determined use case.

[068] In some implementations, the 196 transceiver can support beamforming to transmit RF signals in any of multiple beam directions using all 320-1 to 320-N antennas or a subset of the 320-1 to 320-N antennas. In this example, the impedance of antenna 320 can be different for different beam directions (e.g., due to different transmit powers at different angles for different beam directions). In this example, for each beam direction, the control circuit 810 can store a respective capacitance setting for the first capacitance C1 and a respective setting for the second capacitance C2 that provide good impedance matching for the beam direction. For the example where capacitors 730 and 740 are digitally tuned (i.e., programmed), the capacitance settings for capacitances C1 and C2 can be specified by a respective code pair. Petition 870250083415, dated 09 / 16 / 2025, pp. 171 / 220 22 / 41 digital. In operation, the 810 control circuit can determine the current beam direction and set the first capacitance C1 and the second capacitance C2 based on stored capacitance settings (e.g., digital codes) for the determined beam direction.

[069] In certain aspects, the beam direction can be controlled by a beamformer (not shown) in transceiver 196. In these aspects, the control circuit 810 can receive a signal from the beamformer indicating the current beam direction and can determine the current beam direction based on the received signal.

[070] In some implementations, the 196 transceiver may support an adaptive power control scheme in which the power supplied to antenna 320 is detected using a power coupler (not shown) or a PA drain detector, and a power controller adjusts the output power of PA 410 based on the detected power. In this example, the control circuit 810 may use the detected power to tune the first capacitance C1 and the second capacitance C2 to find the capacitance settings of the first capacitance C1 and the second capacitance C2 that result in the highest power (e.g., average power) supplied to antenna 320 based on the detected power. In this example, higher power is indicative of higher power transfer efficiency to antenna 320 and therefore better impedance matching.

[071] For the example where the 720 inductor is integrated on the chip, it is desirable that the 720 inductor have very low magnetic coupling with respect to the 430, 440 and 620 inductors. This is because the large magnetic coupling between the 720 inductor and the 430, 440 and 620 inductors can have a large impact on the characteristics of the 420 transformer and can complicate the design of the 420 transformer to take into account the magnetic coupling with respect to Petition 870250083415, dated 09 / 16 / 2025, pp. 172 / 220 23 / 41 inductor 720. One approach to reducing the magnetic coupling between the 720 inductor and the 430, 440, and 620 inductors is to locate the 720 inductor in the opposite direction to the 430, 440, and 620 inductors on the chip. However, this approach may require a large additional area on the chip to accommodate the 720 inductor. To address this, aspects of the present disclosure provide inductor designs for the 720 inductor that allow the 720 inductor to completely or substantially overlap the 430, 440, and 620 inductors of the 420 transformer for high area efficiency, while maintaining very low magnetic coupling between the 720 inductor and the 430, 440, and 620 inductors, as further discussed below.

[072] Figure 9A shows a top view of an exemplary layout of the 720 inductor according to certain aspects. In this example, the 720 inductor includes a figure-8 905 conductive path that forms a first loop 910 and a second loop 915. The figure-8 905 conductive path can be formed from two or more metal layers on the chip in some implementations (e.g., using photolithographic and etching processes). The figure-8 905 conductive path may also be called a figure-8 conductive path or another term. As further discussed below, the figure-8 905 conductive path substantially reduces the magnetic coupling between the 720 inductor and one or more other inductors (e.g., one or more of the 430, 440, and 620 inductors) superimposed on the 720 inductor.

[073] In this example, the driving path 905 includes a first portion 920, a second portion 925, and a bridge 928 that connects the first portion 920 and the second portion 925. The bridge 928 allows the driving path 905 to intersect to form the figure-8 shape (also called an 8-figure). In one example, the first portion 920 and the second portion 925 can be Petition 870250083415, dated 09 / 16 / 2025, pp. 173 / 220 24 / 41 bridges are formed from a first layer of metal on the chip (for example, using a photolithographic and etching process), and the 928 bridge can be formed from a second layer of metal on the chip (for example, using a photolithographic and etching process). The second metal layer can be located above or below the first metal layer on the chip.

[074] In the example shown in Figure 9A, the second metal layer is located above the first metal layer. As a result, bridge 928 crosses the second portion 925 of the conductor path 905 in this example. However, it should be considered that, in other implementations, the second metal layer may be located below the first metal layer, in which case bridge 928 crosses under the second portion 925 of the conductor path 905. Figure 9B shows a view of inductor 720 without bridge 928. In this example, inductor 720 includes one or more vias 950 that couple the first portion 920 of the conductor path 905 to bridge 928 (shown in Figure 9A) and one or more bands 955 that couple the second portion 925 of the conductor path 905 to bridge 928.

[075] In this example, inductor 720 has a first terminal 930 and a second terminal 935. The first terminal 930 can be coupled to the first terminal 712 of the impedance matching circuit 710 (e.g., by on-chip metal routing) and the second terminal 935 can be coupled to the second terminal 714 of the impedance matching circuit 710 (e.g., by on-chip metal routing), or vice versa. As shown in Figure 9A, the first terminal 930 can be located at one end of the conductor path 905 and the second terminal 935 can be located at the other end of the conductor path 905.

[076] As discussed above, the driving route in figure-eight format Petition 870250083415, dated 09 / 16 / 2025, pp. 174 / 220 25 / 41 The 905 loop of inductor 720 in this example substantially reduces the magnetic coupling between inductor 720 and one or more other inductors (for example, one or more of inductors 430, 440, and 620) superimposed on inductor 720. This occurs because, when current flows into inductor 720, the figure-eight conductive path of 905 causes the current to flow in opposite directions in the first loop 910 and the second loop 915, which generates a magnetic flux in the first loop 910 and a magnetic flux in the second loop 915 that have opposite polarities. The opposite polarities of the magnetic flux in the first loop 910 and the magnetic flux in the second loop 915 substantially reduce the magnetic coupling of inductor 720 with respect to one or more other inductors (for example, one or more of inductors 430, 440 and 620) superimposed on inductor 720.

[077] The opposite directions of current flow in the first loop 910 and current flow in the second loop 915 of inductor 720 are illustrated in Figures 9C and 9D. Figure 9C shows an example where current flows in the first terminal 930 of inductor 720. The direction of current flow in the conductive path 905 is indicated by arrows. In this example, the current flows counterclockwise in the first loop 910 and clockwise in the second loop 915. As a result, the magnetic field of the magnetic flux in the first loop 910 is directed out of the page and the magnetic field of the magnetic flux in the second loop 915 is directed into the page.

[078] Figure 9D shows an example where current flows in the second terminal 935 of inductor 720. The direction of current flow in the conductive path 905 is indicated by arrows. In this example, the current flows clockwise in the first loop 910 and counterclockwise in the second loop 915. As a result, the magnetic field of the magnetic flux in the first loop 910 is directed into the page and the magnetic field of the flux Petition 870250083415, dated 09 / 16 / 2025, pages 175 / 220 26 / 41 magnetic loop in the second loop 915 is directed off the page.

[079] In both cases illustrated in Figures 9C and 9D, the current flows in opposite directions in the first loop 910 and in the second loop 915, which generates a magnetic flux in the first loop 910 and a magnetic flux in the second loop 915 that have opposite polarities.

[080] Figure 10 shows a top view of an exemplary layout of the 720 inductor, the first 430 inductor, and the second 440 in accordance with certain aspects of the present disclosure. In this example, the first 430 inductor is implemented with a loop inductor having a first terminal 1010 and a second terminal 1020. The first 1010 terminal and the second 1020 terminal can be coupled between the 416 and 418 outputs of the PA 410 (e.g., by on-chip metal routing). Furthermore, in this example, the second 440 inductor is implemented with a loop inductor having a first 1030 terminal and a second 1040 terminal. The first 1030 terminal can be coupled to the first 712 terminal of the 710 impedance matching circuit, and the second 1040 terminal can be coupled to ground (or some reference potential), or vice versa.

[081] In the example in Figure 10, loop 1025 of the second inductor 440 is located in loop 1015 of the first inductor 430 to intensify the magnetic coupling between the first inductor 430 and the second inductor 440. In this example, the first inductor 430 and the second inductor 440 can be formed from the same metal layer on the chip (for example, using a photolithographic and etching process). However, it should be considered that the present disclosure is not limited to this example. For example, in other implementations, the first inductor 430 and the second inductor 440 can be formed from different metal layers.

[082] The 720 inductor overlaps the first 430 inductor and the second Petition 870250083415, dated 09 / 16 / 2025, pp. 176 / 220 27 / 41 inductor 440. As used in the present invention, an inductor can overlap another inductor when the inductor overlaps an area in a loop of the other inductor. In the example shown in Figure 10, inductor 720 overlaps the area in loops 1015 and 1025 of the first and second inductors 430 and 440. As a result, inductor 720 does not occupy additional area on the chip in this example, thus improving area efficiency. As discussed above, the current flow in inductor 720 generates a magnetic flux in the first loop 910 and a magnetic flux in the second loop 915 that have opposite polarities. Due to their opposite polarities, the magnetic flux of the first loop 910 cancels the magnetic flux of the second loop 915 in loops 1015 and 1025 of inductors 430 and 440, which substantially reduces the magnetic coupling of inductor 720 with respect to inductors 430 and 440. As a result, inductor 720 is weakly magnetically coupled to the first inductor 430 and the second inductor 440.In certain respects, the first loop 910 and the second loop 915 of the 720 inductor may completely overlap the area in the loops 1015 and 1025 of the 430 and 440 inductors.

[083] The first and second portions 920 and 925 of the 905 conductor path of the 720 inductor may be formed from the same metal layer as the 430 and 440 inductors, or the first and second portions 920 and 925 of the 905 conductor path of the 720 inductor may be formed from a different metal layer on the chip.

[084] In the example illustrated in Figure 10, each of the inductors 430 and 440 has a single loop. However, it should be considered that the present disclosure is not limited to this example. For example, in some implementations, the first inductor 430 may include two or more loops and / or the second inductor 440 may include two or more loops.

[085] In this sense, Figure 11 shows an example in which the first Petition 870250083415, dated 09 / 16 / 2025, pp. 177 / 220 The first inductor 430 includes two loops coupled in parallel, and the second inductor 440 includes two loops coupled in parallel. More specifically, in this example, the first inductor 430 includes a first loop 1120 (e.g., output loop) and a second loop 1125 (e.g., inner loop) within the first loop 1120. The first inductor 430 also includes a first bridge 1130 that couples the first end of the first loop 1120 to the first end of the second loop 1125, and a second bridge 1135 that couples the second end of the first loop 1120 to the second end of the second loop 1125. As shown in Figure 11, the first terminal 1010 is located on the first bridge 1130, and the second terminal 1020 is located on the second bridge 1135 in this example.

[086] In this example, the second inductor 440 includes a first loop 1140 (e.g., output loop) and a second loop 1145 (e.g., inner loop) within the first loop 1140. The second inductor 440 also includes a first bridge 1150 that connects a first end of the first loop 1140 to a first end of the second loop 1145, and a second bridge 1155 that connects a second end of the first loop 1140 to a second end of the second loop 1145. As shown in Figure 11, the first terminal 1030 is located on the first bridge 1150 and the second terminal 1040 is located on the second bridge 1155 in this example.

[087] In the example shown in Figure 11, the first loop 1140 of the second inductor 440 is located between the first loop 1120 and the second loop 1125 of the first inductor 430, and the second loop 1125 of the first inductor 430 is located between the first loop 1140 and the second loop 1145 of the second inductor 440. This attribute intensifies the magnetic coupling between the first inductor 430 and the second inductor 440. In the example shown in Figure 11, the first and second bridges 1130 and 1135 of the first inductor 430 pass over Petition 870250083415, dated 09 / 16 / 2025, pp. 178 / 220 29 / 41 the first loop 1140 of the second inductor 440, and the first and second bridges 1150 and 1155 of the second inductor 440 pass over the first and second loops 1120 and 1125 of the first inductor 430.

[088] It should be noted that the present disclosure is not limited to the example illustrated in Figure 11. For example, the first inductor 430 and the second inductor 440 may each include one or more additional loops, in addition to the loops shown in Figure 11.

[089] Figure 12A shows a top view of an exemplary layout of the third inductor 620 according to certain aspects. In this example, the third inductor 620 has an outer loop 1210 and an inner loop 1215. The third inductor 620 may also include a bridge 1228 that couples a first portion 1220 of the third inductor 620 and a second portion 1225 of the third inductor 620. The bridge 1228 allows the third inductor 620 to cross. In one example, the first portion 1220 and the second portion 1225 may be formed from a first metal layer on the chip (e.g., using a photolithographic and etching process) and the bridge 1228 may be formed from a second metal layer on the chip (e.g., using a photolithographic and etching process). The second layer of metal can be located above or below the first layer of metal.

[090] In the example shown in Figure 12A, the second metal layer is located above the first metal layer. As a result, the 1228 bridge crosses the first 1220 portion of the third inductor 620 in this example. However, it should be considered that in other implementations, the second metal layer may be located below the first metal layer, in which case the 1228 bridge crosses under the first 1220 portion of the third inductor 620. Figure 12B shows a view of the third inductor 620 without the 1228 bridge. In this example, the third inductor 620 includes one or more 1250 coupling vias. Petition 870250083415, dated 09 / 16 / 2025, pp. 179 / 220 30 / 41 the first portion 1220 of the third inductor 620 to the bridge 1228 (shown in Figure 12A) and one or more ways 1255 that couple the second portion 1225 of the third inductor 620 to the bridge 1228.

[091] In this example, the third inductor 620 has a first terminal 1230 and a second terminal 1235. The first terminal 1230 can be coupled to the input 612 of the LNA 610 (for example, by metal routing on the chip) and the second terminal 1235 can be coupled to ground (or some reference potential), or vice versa.

[092] Figure 13 shows an example where the third inductor 620 shown in the example in Figure 12 is located in loops 1140 and 1145 of the second inductor 440 to intensify the magnetic coupling of the second inductor 440 with respect to the third inductor 620. The magnetic coupling between the second inductor 440 and the third inductor 620 facilitates the transfer of power from an RF signal from antenna 320 to the LNA 610. In this example, the first inductor 430, the second inductor 440 and the third inductor 760 form a three-coil structure 1310.

[093] Figure 14 shows an example where the inductor 720 overlaps the three-coil structure 1310 shown in Figure 13 to form a four-coil structure 1410. In this example, the inductor 720 overlaps the three-coil structure 1310 shown in Figure 13. As a result, the inductor 720 does not require additional chip area in this example.

[094] As discussed above, the current flow in inductor 720 generates a magnetic flux in the first loop 910 and a magnetic flux in the second loop 915 that have opposite polarities. Due to their opposite polarities, the magnetic flux of the first loop 910 cancels the magnetic flux of the second loop 915 in the loops of inductors 430, 440 and 620, which substantially reduces the magnetic coupling of inductor 720 relative to inductors 430, 440 and 620. Petition 870250083415, dated 09 / 16 / 2025, pages 180 / 220 31 / 41

[095] In the example shown in Figure 14, the first loop 910 and the second loop 915 of inductor 720 overlap the area in loops 1120 and 1125 of the first inductor 430 and overlap the area in loops 1140 and 1145 of the second inductor 440. The first loop 910 and the second loop 915 of inductor 720 also overlap the area in the loops of the third inductor 620.

[096] Although Figure 14 shows an example in which each of the inductors 430, 440 and 620 includes two loops, it should be considered that the present disclosure is not limited to this example. For example, in another implementation, one or more of the inductors 430, 440 and 620 may each include a single loop, or one or more of the inductors 430, 440 and 620 may each include three or more loops.

[097] It should be considered that the 720 inductor is not limited to a figure-8 shaped conductive path and that the 720 inductor may include two or more figure-8 shaped conductive paths (e.g., coupled in series and / or parallel).

[098] Figure 15 shows an example of a 1500 method for antenna tuning in accordance with certain aspects of the present disclosure.

[099] In block 1510, a radio frequency (RF) signal is magnetically coupled from a first inductor to a second inductor. For example, transformer 420 can magnetically couple the RF signal from the first inductor (e.g., first inductor 430) to the second inductor (e.g., second inductor 440). The RF signal can come from a power amplifier (e.g., PA 410) coupled to the first inductor.

[100] In block 1520, an antenna impedance seen at the second inductor is tuned using an impedance matching circuit, wherein the impedance matching circuit includes a third inductor that overlaps the first inductor and the second inductor, and one or more capacitors Petition 870250083415, dated 09 / 16 / 2025, pages 181 / 220 32 / 41 coupled to the third inductor. The impedance matching circuit may correspond to the 710 impedance matching circuit. In certain aspects, antenna impedance tuning includes tuning the capacitance of one or more capacitors (e.g., the first capacitor 730 and / or the second capacitor 740). Capacitance tuning can be performed by the 810 control circuit.

[101] In block 1530, the RF signal is propagated from the impedance matching circuit to the antenna. For example, transmission line 310 can propagate RF to the antenna (e.g., antenna 320).

[102] In certain aspects, the third inductor includes a first loop and a second loop, and method 1500 additionally includes generating magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities. The first loop may correspond to the first loop 910 and the second loop may correspond to the second loop 915.

[103] The 810 control circuit can be implemented with a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic device, discrete hardware components (e.g., logic gates), or any combination thereof designed to perform the functions described in the present invention. A processor can perform the functions described in the present invention by executing software comprising code to perform the functions. The software can be stored in a computer-readable storage medium, such as RAM, read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM). Petition 870250083415, dated 09 / 16 / 2025, pp. 182 / 220 33 / 41 programmable read-only memory), an optical disk and / or a magnetic disk.

[104] It should be considered that an inductor can be physically implemented on a chip with multiple inductors coupled in series and / or parallel.

[105] It should be noted that the present disclosure is not limited to the illustrative terminology used above to describe aspects of the present disclosure. For example, a transformer inductor may also be called a winding or another term. Furthermore, it should be noted that an inductor may be called a coil even in cases where the inductor is not physically implemented with a coil. It should be noted that magnetic coupling may also be called inductive coupling or another term. A tunable capacitor may also be called a variable capacitor, a programmable capacitor, or another term. An impedance matching circuit may also be called an impedance matching network, an impedance tuning circuit, an antenna tuner, or another term.

[106] Implementation examples are described in the following numbered clauses: 1. An apparatus comprising: a power amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; An impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna gate, and the impedance matching circuit comprises: a third inductor coupled between the first terminal and the second Petition 870250083415, dated 09 / 16 / 2025, pp. 183 / 220 34 / 41 terminal, where the third inductor overlaps the first and second inductors; and one or more capacitors are coupled to the third inductor. 2. The apparatus of clause 1, in which the third inductor includes a figure-eight shaped conductive path that forms a first loop and a second loop. 3. The apparatus of clause 2, in which: The first inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area within one or more loops of the first inductor. 4. The provision of clause 2 or 3, where: The second inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area within one or more loops of the second inductor. 5. The apparatus of any of clauses 2 to 4, where the third inductor is configured to generate magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities. 6. The apparatus of any of clauses 2 to 5, wherein the conducting path includes a first portion, a second portion and a bridge, wherein the bridge connects the first portion and the second portion, and the bridge passes over the second portion. 7. The apparatus in clause 1, where the third inductor includes a first loop and a second loop. 8. The apparatus of clause 7, in which: The first inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area within one or more loops of the first inductor. 9. The device in clause 7 or 8, where: Petition 870250083415, dated 09 / 16 / 2025, pp. 184 / 220 35 / 41 the second inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area in one or more loops of the second inductor. 10. The apparatus of any of clauses 7 to 9, in which the third inductor is configured to generate magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities. 11. The apparatus of any of clauses 1 to 10, in which the one or more capacitors comprise a first capacitor having a first tunable capacitance and a second capacitor having a second tunable capacitance. 12. The apparatus of clause 11, where the first tunable capacitance is digitally programmable and the second tunable capacitance is digitally programmable. 13. The apparatus described in any of clauses 1 to 12, in which the antenna port is attached to an antenna. 14. The apparatus of clause 13, in which the antenna is in an array of antennas. 15. The device described in any of clauses 1 to 14, in which the second inductor is coupled between the first terminal of the impedance matching circuit and a ground. 16. The apparatus of any one of claims 1 to 15, wherein the power amplifier has a first output and a second output, and the first inductor is coupled between the first output and the second output of the power amplifier. 17. The apparatus of any of clauses 1 to 16, in which the one or more capacitors comprise a first capacitor coupled to the first terminal and a second capacitor coupled to the second terminal. Petition 870250083415, dated 09 / 16 / 2025, pages 185 / 220 36 / 41 18. The apparatus of clause 17, in which the first capacitor is connected between the first terminal and ground, and the second capacitor is connected between the second terminal and ground. 19. An apparatus comprising: a power amplifier; a low-noise amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; a third inductor coupled to the low-noise amplifier, wherein the third inductor is magnetically coupled to the second inductor; An impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna gate, and the impedance matching circuit comprises: a fourth inductor coupled between the first terminal and the second terminal; and one or more capacitors coupled to the fourth inductor. 20. The apparatus of clause 19, in which the fourth inductor includes a figure-eight shaped conductive path that forms a first loop and a second loop. 21. The apparatus of clause 20, in which: The first inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the first inductor. 22. The apparatus of clause 20 or 21, in which: The second inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the second inductor. Petition 870250083415, dated 09 / 16 / 2025, pp. 186 / 220 37 / 41 23. The device of any of clauses 20 to 22, where: The third inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the third inductor. 24. The apparatus of any of clauses 20 to 23, where the first loop and the second loop of the fourth inductor overlap the first inductor, the second inductor, and the third inductor. 25. The apparatus of any of clauses 20 to 24, where the fourth inductor is configured to generate magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities. 26. The apparatus of any of clauses 20 to 25, in which the conducting route includes a first portion, a second portion and a bridge, wherein the bridge connects the first portion and the second portion, and the bridge passes over the second portion. 27. The apparatus of clause 19, where the fourth inductor includes a first loop and a second loop. 28. The provision of clause 27, in which: The first inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the first inductor. 29. The provision of clause 27 or 28, where: The second inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the second inductor. 30. The device of any of clauses 27 to 29, where: the third inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap with one Petition 870250083415, dated 09 / 16 / 2025, pp. 187 / 220 38 / 41 area in one or more loops of the third inductor. 31. The apparatus of any of clauses 27 to 30, where the first loop and the second loop of the fourth inductor overlap the first inductor, the second inductor, and the third inductor. 32. The apparatus of any of clauses 27 to 31, where the fourth inductor is configured to generate magnetic flux in the first loop and magnetic flux in the second loop which have opposite polarities. 33. The apparatus of any of clauses 19 to 32, wherein the one or more capacitors comprise a first capacitor having a first tunable capacitance and a second capacitor having a second tunable capacitance. 34. The apparatus of any of the clauses 19 to 33, in which the antenna port is coupled to an antenna. 35. The apparatus of clause 34, in which the antenna is in an array of antennas. 36. The apparatus of any of clauses 19 to 35, in which the second inductor is coupled between the first terminal of the impedance matching circuit and a ground. 37. The apparatus of any of the clauses 19 to 36, in which the third inductor is coupled between a low-noise amplifier input and a ground. 38. The apparatus of any one of claims 19 to 37, wherein the power amplifier has a first output and a second output, and the first inductor is coupled between the first output and the second output of the power amplifier. 39. The apparatus of any of clauses 19 to 38, in which the one or more capacitors comprise a first capacitor coupled to the first terminal and a second capacitor coupled to the second terminal. Petition 870250083415, dated 09 / 16 / 2025, pages 188 / 220 39 / 41 40. The apparatus of clause 39, in which the first capacitor is connected between the first terminal and ground, and the second capacitor is connected between the second terminal and ground. 41. A method for tuning an antenna comprising: magnetically couple a radio frequency (RF) signal from a first inductor to a second inductor; To tune the impedance of an antenna seen at the second inductor using an impedance matching circuit coupled to the second inductor, wherein the impedance matching circuit includes a third inductor that overlaps the first and second inductors, and one or more capacitors coupled to the third inductor; and to propagate the RF signal from the impedance matching circuit to the antenna. 42. The method of clause 41, in which tuning the antenna impedance seen in the second inductor involves tuning the capacitance of one or more capacitors. 43. The method of clause 41 or 42, wherein the third inductor includes a first loop and a second loop, and the method further comprises generating magnetic flux in the first loop and magnetic flux in the second loop which have opposite polarities. 44. The method of any of clauses 41 to 43, wherein the first loop and the second loop of the third inductor overlap an area in one or more loops of the first inductor. 45. The method of any of clauses 41 to 44, wherein the first loop and the second loop of the third inductor overlap an area in one or more loops of the second inductor. 46. ​​An apparatus comprising: Petition 870250083415, dated 09 / 16 / 2025, pp. 189 / 220 40 / 41 a power amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; An impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna gate, and the impedance matching circuit comprises: a third inductor magnetically coupled to the first inductor and the second inductor and coupled between the first terminal and the second terminal; and one or more capacitors coupled to the third inductor. 47. An antenna tuning apparatus comprising: means for magnetically coupling a radio frequency (RF) signal from a first inductor to a second inductor; means for tuning an antenna impedance seen in the second inductor, wherein the means for tuning the antenna impedance include a third inductor that overlaps the first inductor and the second inductor; and means for propagating the RF signal from the means for tuning the antenna impedance to the antenna.

[107] In the present disclosure, the word exemplifier is used to mean “serving as an example, an instance, or an illustration.” Any implementations or aspects described in the present invention as “exemplifiers” should not necessarily be interpreted as preferential or advantageous in relation to other aspects of the disclosure. Similarly, the term “aspects” does not require that all aspects of the disclosure include the attribute, advantage, or mode of operation discussed. Unless preceded by the term “magnetically,” the term “coupled” is used in the present invention to refer to a direct electrical coupling or Petition 870250083415, dated 09 / 16 / 2025, pp. 190 / 220 41 / 41 indirect connection between two structures. Furthermore, it is important to consider that the term ground can refer to a direct current (DC) ground or an alternating current (AC) ground, and therefore the term ground encompasses both possibilities. It should be considered that an input can be a single-ended input, a differential input, or one of the two inputs of a differential input, and an output can be a single-ended output, a differential output, or one of the two outputs of a differential output. The term approximately means within 10 percent of the stated value (that is, within a range between 90 percent and 110 percent of the stated value).

[108] The foregoing description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles set forth in the present invention may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples described in the present invention, but rather to be in accordance with the broader scope consistent with the innovative principles and attributes disclosed in the present invention. Petition 870250083415, dated 09 / 16 / 2025, pp. 191 / 220

Claims

1 / 6 CLAIMS 1. Apparatus characterized by comprising: a power amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna port and the impedance matching circuit comprises: a third inductor coupled between the first terminal and the second terminal, wherein the third inductor overlaps the first inductor and the second inductor; and one or more capacitors coupled to the third inductor.

2. Apparatus, according to claim 1, characterized in that the third inductor includes a figure-eight shaped conductive path that forms a first loop and a second loop.

3. Apparatus, according to claim 1, characterized in that the third inductor includes a first loop and a second loop.

4. Apparatus according to claim 3, characterized in that: the first inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area in one or more loops of the first inductor.

5. Apparatus according to claim 3, characterized in that: the second inductor includes one or more loops; and the first loop and the second loop of the third inductor overlap an area in one or more loops of the second inductor.

6. Apparatus, according to claim 3, characterized by the third inductor being configured to generate magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities.

7. Apparatus, according to claim 1, characterized in that one or more capacitors comprise a first capacitor having a first tunable capacitance and a second capacitor having a second tunable capacitance.

8. Apparatus, according to claim 1, characterized in that the antenna port is coupled to an antenna.

9. Apparatus, according to claim 1, characterized in that the second inductor is coupled between the first terminal of the impedance matching circuit and a ground.

10. Apparatus, according to claim 1, characterized in that the power amplifier has a first output and a second output, and the first inductor is coupled between the first output and the second output of the power amplifier.

11. Apparatus, according to claim 1, characterized in that the one or more capacitors comprise a first capacitor coupled to the first terminal and a second capacitor coupled to the second terminal.

12. Apparatus, according to claim 11, characterized in that the first capacitor is coupled between the first terminal and ground, and the second capacitor is coupled between the second terminal and ground.

13. Apparatus characterized by comprising: a power amplifier; a low-noise amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; a third inductor coupled to the low-noise amplifier, wherein the third inductor is magnetically coupled to the second inductor; an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna port, and the impedance matching circuit comprises: a fourth inductor coupled between the first terminal and the second terminal; and one or more capacitors coupled to the fourth inductor.

14. Apparatus, according to claim 13, characterized in that the fourth inductor includes a figure-eight shaped conductive path that forms a first loop and a second loop.

15. Apparatus according to claim 13, characterized in that the fourth inductor includes a first loop and a second loop.

16. Apparatus according to claim 15, characterized in that: the first inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the first inductor.

17. Apparatus according to claim 15, characterized in that: the second inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the second inductor.

18. Apparatus according to claim 15, characterized in that: the third inductor includes one or more loops; and the first loop and the second loop of the fourth inductor overlap an area in one or more loops of the third inductor.

19. Apparatus, according to claim 15, characterized in that the first loop and the second loop of the fourth inductor overlap the first inductor, the second inductor and the third inductor.

20. Apparatus, according to claim 15, characterized in that the fourth inductor is configured to generate magnetic flux in the first loop and magnetic flux in the second loop that have opposite polarities.

21. Apparatus, according to claim 13, characterized in that the one or more capacitors comprise a first capacitor having a first tunable capacitance and a second capacitor having a second tunable capacitance.

22. Apparatus, according to claim 13, characterized in that the antenna port is coupled to an antenna.

23. Apparatus, according to claim 13, characterized in that the second inductor is coupled between the first terminal of the impedance matching circuit and a ground.

24. Apparatus, according to claim 13, characterized in that the third inductor is coupled between an input of the low-noise amplifier and a ground.

25. Apparatus, according to claim 13, characterized in that the power amplifier has a first output and a second output, and the first inductor is coupled between the first output and the second output of the power amplifier.

26. Apparatus, according to claim 13, characterized in that the one or more capacitors comprise a first capacitor coupled to the first terminal and a second capacitor coupled to the second terminal.

27. Apparatus, according to claim 26, characterized in that the first capacitor is coupled between the first terminal and ground, and the second capacitor is coupled between the second terminal and ground.

28. Method for antenna tuning characterized by Petition 870250083415, dated 09 / 16 / 2025, pp. 218 / 220 5 / 6 comprising: magnetically coupling a radio frequency (RF) signal from a first inductor to a second inductor; tuning an antenna impedance seen on the second inductor using an impedance matching circuit coupled to the second inductor, the impedance matching circuit including a third inductor that overlaps the first and second inductors, and one or more capacitors coupled to the third inductor; and propagating the RF signal from the impedance matching circuit to the antenna.

29. Method according to claim 28, characterized in that tuning the antenna impedance seen in the second inductor comprises tuning a capacitance of one or more capacitors.

30. Apparatus characterized by comprising: a power amplifier; a first inductor coupled to the power amplifier; a second inductor magnetically coupled to the first inductor; an impedance matching circuit having a first terminal and a second terminal, wherein the first terminal is coupled to the second inductor, the second terminal is coupled to an antenna port, and the impedance matching circuit comprises: a third inductor magnetically coupled to the first inductor and to the second inductor and coupled between the first terminal and the second terminal; and one or more capacitors coupled to the third inductor.

31. Product, process, system, kit, means or use characterized by comprising one or more elements described in the descriptive report, in the claims, in the drawings, in the sequence listing or in the summary of this application, when applicable.

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