Multiple codec encoder and multiple codec encoding system

Abstract

A multiple codec encoder and a multiple codec encoding system are provided. A multiple codec encoder includes a first partition unit and a second partition unit configured to receive first data and second data, respectively. Consecutive frames of image data are alternately classified as the first data and the second data. The multiple codec encoder further includes a motion estimation module configured to generate motion estimation information based on the first data and reference data, a first codec configured to encode the first data using the motion estimation information, and a second codec configured to encode the second data using the motion estimation information. The multiple codec encoder of the present invention encodes images using multiple encoders while reducing the space occupied by the multiple encoders.

Description

[0001] [Cross-reference to related applications]

[0002] This application claims priority to Korean Patent Application No. 10-2017-0135827, filed on October 19, 2017, with the Korean Intellectual Property Office, the full disclosure of which is incorporated herein by reference. Technical Field

[0003] The apparatus according to an exemplary embodiment relates to a multi-codec encoder and a multi-codec encoding system including the multi-codec encoder. Background Technology

[0004] The demand for high-resolution and high-quality images, such as high-definition (HD) and ultra-high-definition (UHD) images, is increasing. Therefore, high-performance image compression techniques are being used to process high-resolution and high-quality images.

[0005] Recently, mobile devices such as smartphones and mobile phones have become widely used. In mobile environments, the small size and battery-powered nature of these devices have become limiting factors. Therefore, various studies are underway to efficiently compress high-resolution and high-quality images in such mobile devices.

[0006] Recently, images have been frequently encoded at high frame rates (frames per second, fps). Existing encoders can perform encoding at finite frame rates, and therefore it is practically difficult to perform encoding at high frame rates using a single encoder.

[0007] By using multiple encoders, images can be encoded at high frame rates. However, using multiple encoders leads to a problem of increased encoding device size, and consequently, an increase in the size of the device containing the encoding device.

[0008] Similarly, to encode high-resolution images, it is difficult to maintain high speed using a single encoder, and therefore multiple encoders are often used. In this case, there is also the problem of increased size of the device containing the encoding mechanism. Summary of the Invention

[0009] According to an exemplary embodiment, a multi-codec encoder is provided, the multi-codec encoder including a first partitioning unit and a second partitioning unit, the first partitioning unit and the second partitioning unit being configured to receive first data and second data, respectively. Successive frames of image data are alternately classified into the first data and the second data. The multi-codec encoder further includes: a motion estimation module configured to generate motion estimation information based on the first data and reference data; a first codec configured to encode the first data using the motion estimation information; and a second codec configured to encode the second data using the motion estimation information.

[0010] According to an exemplary embodiment, a multi-codec encoding system is provided. The multi-codec encoding system includes a preprocessor circuit and a multi-codec encoder. The preprocessor circuit is configured to alternately classify consecutive frames of image data into first data and second data. The multi-codec encoder is configured to receive the first data and the second data, and includes: a motion estimation module configured to generate motion estimation information based on the first data and reference data; a first codec configured to encode the first data using the motion estimation information; and a second codec configured to encode the second data using the motion estimation information.

[0011] According to an exemplary embodiment, a multi-codec encoder is provided, the multi-codec encoder including a first partitioning unit and a second partitioning unit, the first partitioning unit and the second partitioning unit being configured to receive first data and second data, respectively. Successive frames of image data are alternately classified into the first data and the second data. The multi-codec encoder further includes a motion estimation module, the motion estimation module being configured to generate first motion estimation information based on the first data and reference data, and to generate second motion estimation information based on the second data and the reference data. Each of the first motion estimation information and the second motion estimation information is generated using only half of a single frame of the corresponding one of the first data and the second data. The multi-codec encoder further includes: a memory configured to store the first motion estimation information and the second motion estimation information; a first codec configured to encode the first data using the first motion estimation information; and a second codec configured to encode the second data using the second motion estimation information.

[0012] According to an exemplary embodiment, a multi-codec encoder is provided, the multi-codec encoder including a first partitioning unit and a second partitioning unit, the first partitioning unit and the second partitioning unit being configured to receive first data and second data, respectively. Successive frames of image data are alternately classified as the first data and the second data. The multi-codec encoder further includes a motion estimation module, the motion estimation module being configured to receive image data, generate first motion estimation information based on the image data and reference data, and generate second motion estimation information based on the image data and the reference data. Each of the first motion estimation information and the second motion estimation information is generated using only half of a single frame of the corresponding one of the first data and the second data. The multi-codec encoder further includes: a memory configured to store the first motion estimation information and the second motion estimation information; a first codec configured to encode the first data using the first motion estimation information; and a second codec configured to encode the second data using the second motion estimation information. Attached Figure Description

[0013] Figure 1 This is a block diagram of a multi-codec encoding system according to an exemplary embodiment.

[0014] Figure 2 It is used to conceptually illustrate what is input into Figure 1 The diagram shows the classification of image data in a multi-codec encoding system.

[0015] Figure 3 It is shown in detail Figure 1 The block diagram shown is of the multi-codec encoder.

[0016] Figure 4 It is used to conceptually illustrate through Figure 3 The diagram shows the non-layered coding performed by the first and second codecs.

[0017] Figure 5 It is used to conceptually illustrate through Figure 3 The diagram shows the layered coding performed by the first and second codecs.

[0018] Figure 6 It is shown in detail Figure 3 The block diagram of the first codec is shown.

[0019] Figure 7 It is shown in detail Figure 6 The block diagram shown is of the first prediction module.

[0020] Figure 8 It is shown in detail Figure 3The block diagram of the second codec is shown.

[0021] Figure 9 It is shown in detail Figure 6 The block diagram shown is of the first compression module.

[0022] Figure 10 It is shown in detail Figure 9 The block diagram of the quantization module is shown.

[0023] Figure 11 It is shown in detail Figure 9 The block diagram shown is of the inverse quantization module.

[0024] Figure 12 It is shown in detail Figure 8 The block diagram of the second compression module is shown.

[0025] Figure 13 It is shown in detail Figure 3 The block diagram of the reference module is shown.

[0026] Figure 14 This is a block diagram of a multi-codec encoder according to an exemplary embodiment.

[0027] Figure 15 yes Figure 14 The block diagram of the third codec is shown.

[0028] Figure 16 This is a diagram used to conceptually illustrate the classification of image data input into a multiple codec encoding system according to an exemplary embodiment.

[0029] Figure 17 This is a block diagram of a multi-codec encoder according to an exemplary embodiment.

[0030] Figure 18 It is used to conceptually illustrate through Figure 17 The diagram shows the encoding performed by the first and second codecs.

[0031] Figure 19 It shows through Figure 17 The diagram illustrates how the motion estimation module generates motion vectors.

[0032] Figure 20 This is a block diagram of a multi-codec encoding system according to an exemplary embodiment.

[0033] Figure 21 It is shown in detail Figure 20 The block diagram shown is of the multi-codec encoder. Detailed Implementation

[0034] An exemplary embodiment provides a multi-codec encoder that uses multiple encoders to encode an image while reducing the space occupied by the multiple encoders.

[0035] An exemplary embodiment provides a multicoder encoding system including a multicoder encoder, which uses multiple encoders to encode an image while reducing the space occupied by the multiple encoders.

[0036] Figure 1 This is a block diagram of a multi-codec encoding system according to an exemplary embodiment.

[0037] Reference Figure 1 The first multiple codec encoding system 10 can be any device capable of capturing images to process, display, store, or transmit the processed data as data.

[0038] For example, the first multi-codec encoding system 10 may be implemented as any one or any combination of the following: television (TV), digital television (DTV), internet protocol television (IPT), personal computer (PC), desktop computer, laptop computer, computer workstation, tablet PC, video game platform (or video game console), server, and mobile computing device. The mobile computing device may be implemented as any one or any combination of the following: mobile phone, smartphone, enterprise digital assistant (EDA), digital still camera, digital video camera, portable multimedia player (PMP), personal navigation device or portable navigation device (PND), mobile internet device (MID), wearable computer, internet of things (IoT) device, internet of everything (IOE) device, and e-book.

[0039] The first multiple codec encoding system 10 may include a video source 50, a first multiple codec encoding device 100, a display 200, an input device 210, and a second memory 220.

[0040] Figure 1 The components shown are not essential for implementing the first multiple codec encoding system 10. Other components may be added or some of the listed components may be removed.

[0041] The first multiple codec encoding device 100 can be implemented as a system-on-chip (SoC).

[0042] The video source 50 can be implemented as, for example, a camera equipped with a charge-coupled device (CCD) or a complementary metal-oxide-semiconductor (CMOS) image sensor.

[0043] The video source 50 can capture images of the target, generate image data IM for the target, and provide the generated image data IM to the first multi-codec encoding device 100.

[0044] The image data IM can be still image data or video data. In an exemplary embodiment, the video source 50 can be included in the host (HOST) as an alternative. The image data IM can be image data provided from the host.

[0045] The first multiple codec encoding device 100 can control the overall operation of the first multiple codec encoding system 10.

[0046] For example, the first multi-codec encoding device 100 may include an integrated circuit (IC), a motherboard, an application processor (AP), and / or a mobile application processor that can operate according to exemplary embodiments.

[0047] The first multi-codec encoding device 100 can process image data IM output from video source 50 and display the processed data on display 200, store the processed data in second memory 220, or transmit the processed data to another data processing system.

[0048] The first multi-codec encoding device 100 may include a first pre-processor circuit 110, a first multi-codec encoder 300, a processor 130, a first memory 140, a display controller 150, a memory controller 160, a bus 170, a modem 180, and a user interface 190 (user I / F).

[0049] It should be noted that the above-mentioned components are not essential for implementing the first multiple codec encoding device 100. Other components may be added or some of the listed components may be removed.

[0050] The first multi-codec encoder 300, processor 130, first memory 140, display controller 150, memory controller 160, modem 180 and user interface 190 can transmit data to or receive data from each other via bus 170.

[0051] For example, bus 170 may be implemented as, but is not limited to, a peripheral component interconnect (PCI) bus, a peripheral component interconnect fast (PCIe) bus, an advanced microcontroller bus architecture (AMBA), an advanced high performance (AHB) bus, an advanced peripheral bus (APB), an advanced extensible interface (AXI) bus, or a combination thereof.

[0052] The first preprocessor circuit 110 may include, for example, an image signal processor (ISP). The ISP can convert image data IM having a first data format into first data FI1 and second data FI2.

[0053] For example, the image data IM can be data with a Bayer pattern, and the first data FI1 and the second data FI2 can be YUV data.

[0054] The first preprocessor circuit 110 can receive image data IM output from the video source 50. The first preprocessor circuit 110 can process the received image data IM and provide the resulting first data FI1 and second data FI2 to the first multi-codec encoder 300.

[0055] In an environment in which the first multi-codec encoding device 100 is driven, for example, the first data FI1 and the second data FI2 may be provided in the form of frames (or pictures).

[0056] Figure 2 It is used to conceptually illustrate what is input into Figure 1 The diagram shows the classification of image data in a multi-codec encoding system.

[0057] Reference Figure 2 For example, image data IM can be a dataset comprising multiple frames F1, F2, F3, and F4. The second frame F2 can immediately follow the first frame F1. The third frame F3 can immediately follow the second frame F2. The fourth frame F4 can immediately follow the third frame F3.

[0058] The first data FI1 transmitted to the first multi-codec encoder 300 may be a data group containing data of odd-numbered frames F1 and F3. The second data FI2 transmitted to the first multi-codec encoder 300 may be a data group containing data of even-numbered frames F2 and F4. In subsequent processes, the first data FI1 may be transmitted to... Figure 3 The first codec 320 shown can transmit the second data FI2 to... Figure 3 The second codec 330 is shown.

[0059] Although the first pre-processor circuit 110 is in Figure 1 The diagram is illustrated as being implemented within the first multi-codec encoding apparatus 100; however, this is merely illustrative. In other embodiments, the first preprocessor circuitry 110 of the multi-codec encoding system may be implemented externally to the first multi-codec encoding apparatus 100.

[0060] Reference Figure 1 and Figure 2 The first multi-codec encoder 300 can encode odd-numbered frames (e.g., first frame F1 and third frame F3) separately from the encoding of even-numbered frames (e.g., second frame F2 and fourth frame F4). This will be described in detail below.

[0061] The encoding operation can be performed using, for example, the following video data encoding techniques: Joint Picture Expert Group (JPEG), Motion Picture Expert Group (MPEG), MPEG-2, MPEG-4, Video Coding (VC)-1, H.264, H.265, and High Efficiency Video Coding (HEVC). However, it should be understood that the standards listed above are illustrative only.

[0062] The processor 130 can control the operation of the first multi-codec encoding device 100.

[0063] The processor 130 may receive user input to execute one or more applications (e.g., software applications).

[0064] Some of the applications executed by processor 130 may be video calling applications. Other applications executed by processor 130 may include, but are not limited to, operating system (OS), word processor applications, media player applications, video game applications, and / or graphical user interface (GUI) applications.

[0065] The processor 130 can control the first preprocessor circuit 110 to assign odd-numbered frames F1 and F3 and even-numbered frames F2 and F4 to the first multi-codec encoder 300, respectively. In other words, the processor 130 can determine whether to classify the frame as first data FI1 or second data FI2.

[0066] It should be noted that the processor 130 can classify the first data FI1 and the second data FI2 in various ways. For example, the processor 130 can assign even-numbered frames F2 and F4 to the first data FI1 and odd-numbered frames F1 and F3 to the second data FI2.

[0067] The first memory 140 can, under the control of the memory controller 160, transmit information about the frames currently being encoded by the first multi-codec encoder 300 in the first data FI1 and the second data FI2 to the first multi-codec encoder 300.

[0068] The memory controller 160 can, under the control of the first multi-codec encoder 300 or the processor 130, process data encoded by the first multi-codec encoder 300 or data output from the processor 130 (e.g., Figure 3The first bit stream (BIT STREAM 1) and the second bit stream (BIT STREAM 2) shown are written to the second memory 220.

[0069] The first memory 140 may be implemented as volatile memory, such as static random access memory (SRAM). Volatile memory may be implemented as one of random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), thyristor RAM (T-RAM), zero capacitor RAM (Z-RAM), and twin transistor RAM (TTRAM). However, this is only illustrative. In other embodiments, the first memory 140 may be implemented as non-volatile memory.

[0070] The second memory 220 can be implemented as a non-volatile memory. The non-volatile memory can be implemented as one of electrically erasable programmable read-only memory (EEPROM), flash memory, magnetic random access memory (MRAM), spin-transfer torque magnetic random access memory (SRAM), ferroelectric RAM (FeRAM), phase-change RAM (PRAM), and resistive RAM (RRAM). Alternatively, the non-volatile memory can also be implemented as one of a multimedia card (MMC), an embedded MMC (eMMC), universal flash storage (UFS), a solid-state drive (SSD) or solid-state disk (SSD), a Universal Serial Bus (USB) flash drive, and a hard disk drive (HDD). However, it should be understood that this is only illustrative. In other embodiments, the second memory 220 may be implemented as volatile memory.

[0071] Although the second memory 220 is in Figure 1 The second memory 220 is depicted as being located outside the first multiple codec encoding device 100; however, this is merely illustrative. In other embodiments, the second memory 220 may be implemented within the first multiple codec encoding device 100.

[0072] The display controller 150 can transmit data output from the first multi-codec encoder 300 or the processor 130 to the display 200. The display 200 can be implemented as one of a monitor, a television monitor, a projection device, a thin-film transistor liquid-crystal display (TFT-LCD), a light-emitting diode (LED) display, an organic light-emitting diode (OLED) display, an active-matrix organic light-emitting diode (AMOLED) display, and a flexible display.

[0073] For example, the display controller 150 can transmit data to the display 200 via the Mobile Industry Processor Interface (MIPI) and Display Serial Interface (DSI).

[0074] The input device 210 can receive user input from the user and can transmit input signals to the user interface 190 in response to the user input.

[0075] Input device 210 may be implemented as, but is not limited to, a touch panel, a touch screen, a voice recognizer, a stylus, a keyboard, a mouse, a track point, etc. For example, when input device 210 is a touch screen, input device 210 may include a touch panel and a touch panel controller. Input device 210 may be connected to display 200 or may be implemented as a device separate from display 200.

[0076] Input device 210 can transmit input signals to user interface 190.

[0077] User interface 190 can receive input signals from input device 210 and can transmit data generated by the input signals to processor 130.

[0078] The modem 180 can use wireless communication technology to output data encoded by the first multi-codec encoder 300 or processor 130 to an external device. The modem 180 can use any one or any combination of technologies including, but not limited to, Wi-Fi, wireless broadband (WIBR), 3G wireless communication, and the long term evolution (LTE). TM ), Long Term Evolution-Advanced (LTE-A) and Broadband Advanced Long Term Evolution.

[0079] Figure 3 It is shown in detail Figure 1 The block diagram shown is of the multi-codec encoder.

[0080] Reference Figure 3 The first multi-codec encoder 300 may include a first partitioning unit 340, a second partitioning unit 350, a motion estimation module 310, a first codec 320 (multi-format codec 1), a second codec 330 (multi-format codec 2), and a reference module 360.

[0081] Figure 2The components shown are not essential for implementing the first multi-codec encoder 300. Other components may be added or some of the listed components may be removed.

[0082] The first partitioning unit 340 can divide the frames that should be encoded currently included in the first data FI1 (e.g., ...). Figure 2 The first frame F1 shown is divided into multiple blocks. Similarly, the second partitioning unit 350 can divide the frames currently to be encoded (e.g., included in the second data FI2) into multiple blocks. Figure 2 The second frame (F2) shown is divided into multiple blocks.

[0083] The first partitioning unit 340 can transmit the first data FI1 to the motion estimation module 310 and the first codec 320. The second partitioning unit 350 can transmit the second data FI2 to the second codec 330. The second partitioning unit 350 may choose not to transmit the second data FI2 to the motion estimation module 310.

[0084] The motion estimation module 310 and the first codec 320 can perform intra-frame prediction or inter-frame prediction on frames of the first data FI1 (e.g., the first frame F1).

[0085] Intra-frame prediction is performed without referencing any other frames besides the current frame being encoded. Inter-frame prediction is performed by referring to other frames besides the current frame being encoded.

[0086] Similarly, motion estimation module 310 and second codec 330 can perform inter-frame prediction on frames of the second data FI2 (e.g., second frame F2). It should be noted that, unlike the first codec 320, the second codec 330 can only perform inter-frame prediction, not intra-frame prediction.

[0087] The first codec 320 and the second codec 330 can be multi-format codecs (MFC).

[0088] The motion estimation module 310 can divide the currently encoded frame into blocks of appropriate size and number to suppress distortion and minimize bit count. The motion estimation module 310 can select the mode with the least distortion and the fewest bit count from various motion estimation modes (e.g., normal mode, merged mode, etc.). The motion estimation module 310 can search the reference data Ref stored in the reference module 360 ​​to find the block that best matches the block input to the motion estimation module 310, thereby obtaining the motion vector.

[0089] The motion estimation module 310 can use the first data FI1 and the reference data Ref to generate first motion estimation information I1. The first motion estimation information I1 may contain motion vectors.

[0090] The motion estimation module 310 can transmit the first motion estimation information I1 to the first codec 320 and the second codec 330. Although the first codec 320 encodes the first data FI1 and the second codec 330 encodes the second data FI2, the motion estimation module 310 can transmit the same first motion estimation information I1 to both the first codec 320 and the second codec 330. This is because for image data IM at high frame rates, there is no significant difference whether the motion estimation information (e.g., motion vector) is obtained based on the first frame F1 or based on the second frame F2 immediately following the first frame F1.

[0091] In this way, the first codec 320 and the second codec 330 can share a single motion estimation module 310 to perform encoding. The size of the motion estimation module 310 can be larger than any other module in the encoder. Therefore, by sharing the motion estimation module 310, the overall size of the device can be reduced while the encoding speed can be increased.

[0092] The first codec 320 and the second codec 330 can be synchronized with each other. That is, signals can be simultaneously input to the first codec 320 and the second codec 330 or output from the first codec 320 and the second codec 330 via the synchronization signal SYNC.

[0093] The first codec 320 can transmit intra-frame prediction information I2 to the second codec 330. The first codec 320 performs both intra-frame and inter-frame prediction, while the second codec 330 can only perform inter-frame prediction. Therefore, the intra-frame prediction information I2 is not present in the second codec 330, and the second codec 330 can receive the intra-frame prediction information I2 from the first codec 320.

[0094] The first codec 320 can transmit the first quantization parameter data I3 to the second codec 330. The first codec 320 can generate the first quantization parameter data I3 for rate control. On the other hand, the second codec 330 cannot perform rate control on itself. Therefore, the second codec 330 can receive the first quantization parameter data I3 from the first codec 320. The first quantization parameter data I3 will be described in detail below.

[0095] Figure 4 It is used to conceptually illustrate through Figure 3 The diagram shows the non-layered coding performed by the first and second codecs.

[0096] Reference Figure 4 The first codec 320 and the second codec 330 can perform non-layered coding.

[0097] Since reference data Ref has not yet been created, intra-frame prediction can be used to encode the first frame F1. Inter-frame prediction can be used by the first codec 320 with the first frame F1 as reference data Ref to encode the third frame F3. The third frame F3 can be encoded using the first motion estimation information I1.

[0098] The second frame F2 can be encoded by the second codec 330 through inter-frame prediction. At this time, the first motion estimation information I1 can be used to encode the second frame F2. As mentioned earlier, for image data IM at high frame rates, there is no significant difference whether the motion estimation information (e.g., motion vectors) is obtained based on the first frame F1 or based on the second frame F2 immediately following the first frame F1; therefore, inter-frame prediction can be used to perform encoding.

[0099] In this way, the first codec 320 can encode the odd-numbered frames F1, F3, F5, and F7. Thus, the first frame F1 and the seventh frame F7 can be encoded using intra-frame prediction, while the third frame F3 and the fifth frame F5 can be encoded using inter-frame prediction. The third frame F3 and the fifth frame F5 can be stored as reference data Ref.

[0100] The second codec 330 can encode even-numbered frames F2 and F4. Thus, the second frame F2 can be encoded using inter-frame prediction with the first motion estimation information I1 about the third frame F3, and the fourth frame F4 can be encoded with the first motion estimation information I1 about the fifth frame F5.

[0101] Even though the sixth frame F6 is an even-numbered frame, since it immediately precedes the seventh frame F7, which is encoded via intra-frame prediction, motion estimation information about the seventh frame F7 cannot be used. In this case, the sixth frame F6 can also be encoded by the first codec 320 using inter-frame prediction. For this purpose, the first preprocessor circuit 110 can pre-classify the sixth frame F6 as first data FI1.

[0102] Figure 5 It is used to conceptually illustrate through Figure 3 The diagram shows the layered coding performed by the first and second codecs.

[0103] Reference Figure 5 The first codec 320 and the second codec 330 can perform layered encoding. Figure 5 An example of layered coding (i.e., 5-layer coding) is shown. In other implementations, a 7-layer coding scheme can be used in a multi-codec coding system.

[0104] Similarly, in layered coding, the first codec 320 and the second codec 330 can alternately perform coding on consecutive frames. Thus, by using a single motion estimation module 310 and two codecs, the multi-codec coding system according to the exemplary embodiment can perform coding with increased speed and higher efficiency.

[0105] Reference Figure 3 , Figure 4 and Figure 5 The second codec 330 can use the first motion estimation information I1 by scaling it. That is, when the motion vector of the third frame F3 is obtained by using the first frame F1 as reference data Ref, the first time distance d1 between the first frame F1 and the third frame F3 can be twice the second time distance d2 between the first frame F1 and the second frame F2.

[0106] Therefore, the second codec 330 can perform encoding using inter-frame prediction by scaling the size of the motion vector of the first motion estimation information I1 about the third frame F3 to 1 / 2.

[0107] Similarly, the second codec 330 can perform encoding using inter-frame prediction by scaling the size of the motion vector of the first motion estimation information I1 about the fifth frame F5 to 1 / 2.

[0108] exist Figure 5 In this context, compared to the third distance d3, the scaling ratio of the fourth distance d4 can be 1 / 4, the scaling ratio of the fifth distance d5 can be 1 / 2, and the scaling ratio of the sixth distance d6 can be 3 / 4. Thus, the second codec 330 can encode the fourth frame F4 by scaling the magnitude of the motion vector of the first motion estimation information I1 regarding the fifth frame F5 to 3 / 4. It should be understood that the scaling values ​​are not limited to the values ​​mentioned above.

[0109] Figure 6 It is shown in detail Figure 3 The block diagram of the first codec is shown.

[0110] Reference Figure 6 The first codec 320 may include a first prediction module 321, a first rate control module 322, a first compression module 323, a first subtractor 325, a first adder 326, and a first entropy encoding unit 324.

[0111] The first prediction module 321 can receive first data FI1 and first motion estimation information I1. The first prediction module 321 can perform intra-frame prediction or inter-frame prediction to generate a first prediction block PB1. The first prediction module 321 can transmit intra-frame prediction information I2 to the second codec 330.

[0112] Intra-prediction information I2 may include any one or any combination of the following: information about the block in which intra-prediction has been performed (e.g., information about the size and number of blocks in which intra-prediction has been performed), information about the mode used in intra-prediction, and information about the reference block.

[0113] The first subtractor 325 obtains the difference between the currently encoded block in the first data FI1 and the first predicted block PB1 generated in the first prediction module 321, thereby generating a first residual block RDB1. The first residual block RDB1 can represent the difference between the currently encoded block in the first data FI1 and the first predicted block PB1.

[0114] The first rate control module 322 can use the first prediction block PB1 to adjust the quantization parameters of each of the plurality of blocks included in the current frame. That is, the first rate control module 322 can generate first quantization parameter data I3. The first rate control module 322 can transmit the first quantization parameter data I3 to the second codec 330.

[0115] The first compression module 323 can generate a first quantization coefficient QP1 using the first quantization parameter data I3 and the first residual block RDB1. Additionally, the first compression module 323 can generate an inverse quantization block QB by performing inverse quantization and inverse transform on the first quantization coefficient QP1.

[0116] The first adder 326 can add the first prediction block PB1 to the inverse quantization block QB to produce the reconstructed block RB.

[0117] The first entropy coding unit 324 can perform entropy coding on symbols according to a probability distribution based on the first quantization coefficient QP1 to output the first bit stream BIT STREAM 1. Entropy coding is a method of receiving symbols with various values ​​and expressing them as decodable binary strings while eliminating statistical redundancy.

[0118] In this document, symbols may refer to syntactic elements to be encoded, encoding parameters, residual blocks, etc. Encoding parameters are used for encoding and decoding and may include information (e.g., syntactic elements) encoded in the encoding device and transmitted to the decoding device, as well as information that can be inferred during the encoding or decoding process. This can be information used to encode or decode an image.

[0119] The coding parameters may include values ​​or statistics such as intra-frame prediction / inter-frame prediction, motion vectors, reference data index, coding block pattern, information indicating the presence of residual blocks, transform coefficients, quantized transform coefficients, quantization coefficients, block size, and information about the divided blocks.

[0120] By using entropy coding, a smaller number of bits are allocated to symbols with a higher probability of generation, while a larger number of bits are allocated to symbols with a lower probability of generation, thereby reducing the bitstream size of the symbols to be encoded. Therefore, entropy coding can improve the compression efficiency of image coding.

[0121] Entropy coding can employ coding schemes such as exponential golomb, context-adaptive variable length coding (CAVLC), and context-adaptive binary arithmetic coding (CABAC). For example, the first entropy coding unit 324 may store a table for performing entropy coding (e.g., a variable length coding / code (VLC) table). The first entropy coding unit 324 can use the stored variable length coding (VLC) table to perform entropy coding. Furthermore, the first entropy coding unit 324 can derive a binaryization method for the target symbol and a probabilistic model for the target symbol / bin, and then use the derived binaryization method or probabilistic model to perform entropy coding.

[0122] Figure 7 It is shown in detail Figure 6 The block diagram shown is of the first prediction module.

[0123] Reference Figure 7 The first prediction module 321 includes a motion compensation unit 321a, an intra-frame prediction unit 321b, and a switch 321c.

[0124] The motion compensation unit 321a performs motion compensation using the first motion estimation information I1 (e.g., the motion vector generated by the motion estimation module 310 and the reference data Ref stored in the reference module 360) to generate the first prediction block PB1.

[0125] Intra-prediction unit 321b can divide the currently encoded frame into blocks of appropriate size and number to suppress distortion and minimize the number of bits. Intra-prediction unit 321b can select the mode with the least distortion and the least number of bits from various intra-prediction modes (e.g., DC mode, PLANA mode, etc.).

[0126] The intra-frame prediction module 321b can generate a first prediction block PB1 by performing spatial prediction using the pixel values ​​of the encoded blocks surrounding the currently encoded block of the first data FI1.

[0127] The first prediction module 321 can perform both intra-frame prediction and inter-frame prediction, and can then determine whether to perform intra-frame prediction or inter-frame prediction based on the cost value J calculated by the following equation 1:

[0128] [Equation 1]

[0129] J = D + A * R

[0130] D represents the distortion index of the coded image, A represents a constant value proportional to the quantization parameter value, and R represents the number of bits generated using intra-frame prediction or inter-frame prediction.

[0131] If the first prediction module 321 determines that inter-frame prediction is suitable based on the cost value J, then switch 321c can be used to perform inter-frame prediction. If the first prediction module 321 determines that intra-frame prediction is suitable based on the cost value J, then switch 321c can be used to perform intra-frame prediction.

[0132] Figure 8 It is shown in detail Figure 3 The block diagram of the second codec is shown.

[0133] Reference Figure 8 The second codec 330 may include a second prediction module 331, a second compression module 333, a second subtractor 335, and a second entropy coding unit 334.

[0134] The second prediction module 331 can receive second data FI2 and first motion estimation information I1. The second prediction module 331 can perform inter-frame prediction to generate a second prediction block PB2. The second prediction module 331 can receive intra-frame prediction information I2.

[0135] The second subtractor 335 obtains the difference between the current block being encoded in the second data FI2 and the second predicted block PB2 generated in the second prediction module 331, thereby generating a second residual block RDB2. The second residual block RDB2 can represent the difference between the current block being encoded in the second data FI2 and the second predicted block PB2.

[0136] The second compression module 333 can use the first quantization parameter data I3 and the second residual block RDB2 to generate the second quantization coefficient QP2.

[0137] The second entropy encoding unit 334 can perform entropy encoding on the symbol according to the probability distribution based on the second quantization coefficient QP2 to output the second bit stream BIT STREAM 2.

[0138] Figure 9 It is shown in detail Figure 6 The block diagram shown is of the first compression module.

[0139] Reference Figure 9 The first compression module 323 may include a quantization module 323a and an inverse quantization module 323b.

[0140] The quantization module 323a can receive the first residual block RDB1 and the first quantization parameter data I3 to generate the first quantization coefficient QP1.

[0141] The inverse quantization module 323b can receive the first quantization coefficient QP1 to generate the inverse quantization block QB.

[0142] Figure 10 It is shown in detail Figure 9 The block diagram of the quantization module is shown.

[0143] Reference Figure 10 The quantization module 323a may include a first transformation unit 323a_1 and a first quantization unit 323a_2.

[0144] The first transformation unit 323a_1 can create transformed block data from the first residual block RDB1. The first transformation unit 323a_1 can use either discrete cosine transform (DCT) or wavelet transform. The first transformation coefficients RDP1 generated in the first transformation unit 323a_1 can be transmitted to the first quantization unit 323a_2.

[0145] The first quantization unit 323a_2 can quantize the first transform coefficient RDP1 according to the first quantization parameter data I3 determined by the first rate control module 322, and can output the first quantization coefficient QP1. The first quantization unit 323a_2 can quantize the first transform coefficient RDP1 to reduce the number of bits. In this way, the first rate control module 322 can modify the quantization degree by adjusting the first quantization parameter data I3.

[0146] Figure 11 It is shown in detail Figure 9 The block diagram of the inverse quantization module is shown.

[0147] Reference Figure 11 The inverse quantization module 323b may include an inverse quantization unit 323b_1 and an inverse transformation unit 323b_2.

[0148] The inverse quantization module 323b can inverse quantize the first quantization coefficient QP1 to generate the inverse quantization coefficient IQP1. The inverse transform unit 323b_2 can perform an inverse transform on the inverse quantization coefficient IQP1 to generate the inverse quantization block QB.

[0149] Figure 12 It is shown in detail Figure 8 The block diagram of the second compression module is shown.

[0150] Reference Figure 12 The second compression module 333 may include a second transformation unit 333a and a second quantization unit 333b. Although the second compression module 333 includes the corresponding part (counterpart) of the quantization module 323a of the first compression module 323, the second compression module 333 may not include the corresponding part of the inverse quantization module 323b.

[0151] The second transform unit 333a can create transformed block data from the second residual block RDB2. The second transform unit 333a can use discrete cosine transform (DCT) or wavelet transform. The second transform coefficients RDP2 generated in the second transform unit 333a can be transmitted to the second quantization unit 333b.

[0152] The second quantization unit 333b can quantize the second transform coefficient RDP2 according to the first quantization parameter data I3 determined by the first rate control module 322, and can output the second quantization coefficient QP2. The second quantization unit 333b can quantize the second transform coefficient RDP2 to reduce the number of bits. In this way, the second quantization unit 333b can use the first quantization parameter data I3 of the first codec 320.

[0153] Figure 13 It is shown in detail Figure 3 The block diagram of the reference module is shown.

[0154] Reference Figure 13 The reference unit 360 may include a filter unit 361 and a decoded image buffer 362.

[0155] Filter unit 361 can receive the reconstructed block RB. Filter unit 316 can apply any one or any combination of a deblocking filter, a sample adaptive offset (SAO) filter, and an adaptive loop filter (ALF) to the reconstructed block RB. Filter unit 361 can apply filters to the reconstructed block RB to create reference data Ref.

[0156] The decoded image buffer 362 can store reference data Ref. The decoded image buffer 362 can provide reference data Ref when the motion estimation module 310 needs to use it. Additionally, the decoded image buffer 362 can provide reference data Ref when the first codec 320 needs to use it.

[0157] In the first multiple codec encoding system 10 according to an exemplary embodiment, the two codecs (i.e., the first codec 320 and the second codec 330) share a single motion estimation module 310, thereby significantly reducing the size of the device. Although the first multiple codec encoding system 10 includes only one motion estimation module 310, it can achieve performance comparable to that of a coding system including two motion estimation modules by providing the second codec 330 with first motion estimation information I1 about the frames processed in the first codec 320 via the motion estimation module 310.

[0158] Since the differences between motion vectors in adjacent frames are not significant in coded images at high frame rates, there is no problem in sharing the first motion estimation information I1.

[0159] In the following text, reference will be made to Figure 14 and Figure 15 The following describes a multi-codec encoder according to an exemplary embodiment. To avoid repetition, elements identical to those described above will not be repeated.

[0160] Figure 14 This is a block diagram of a multi-codec encoder according to an exemplary embodiment. Figure 15 yes Figure 14 The block diagram of the third codec is shown.

[0161] Reference Figure 14 According to an exemplary embodiment, the second multi-codec encoder 301 includes a third codec 330' instead of Figure 3 The second codec 330 is shown.

[0162] The third codec 330' may not receive the first quantization parameter data I3 from the first codec 320.

[0163] Reference Figure 15 The third codec 330' may include a second rate control module 332.

[0164] The second rate control module 332 can use the second prediction block PB2 to adjust the quantization parameters of each of the plurality of blocks included in the current frame. That is, the second rate control module 332 can generate second quantization parameter data I4. The second rate control module 332 can then transmit the second quantization parameter data I4 to the second compression module 333.

[0165] The second compression module 333 can use the second quantization parameter data I4 to generate the second quantization coefficient QP2 instead of the first quantization parameter data I3.

[0166] Because the second multi-codec encoder 301 according to the exemplary embodiment includes an additional second rate control module 332 in the third codec 330', the second multi-codec encoder 301 can more accurately adjust the quantization of the second data FI2. This is because the first quantization parameter data I3 generated in the first codec 320 is actually based on the first prediction block PB1 and therefore may not be applicable to the second data FI2.

[0167] In the following text, reference will be made to Figures 16 to 19 The following describes a multi-codec encoder according to an exemplary embodiment. To avoid repetition, elements identical to those described above will not be repeated. Figures 16 to 19 The multicodec encoder shown according to an exemplary embodiment has a... Figures 1 to 15 The multi-codec encoder shown in the exemplary embodiment has the same configuration, except for the movement of internal data. Other alternative methods may be implemented depending on the information input to it. Figures 1 to 15 Exemplary embodiments shown and Figures 16 to 19 The exemplary embodiment shown.

[0168] Figure 16 This is a diagram used to conceptually illustrate the classification of image data input into a multiple codec encoding system according to an exemplary embodiment.

[0169] Reference Figure 16 For example, image data IM may be a dataset comprising multiple frame data F0, F1, F2, F3, and F4. First data FI1 may include the first frame F0 and odd-numbered frames other than the first frame F0 (e.g., F1 and F3). Second data FI2 may include even-numbered frames other than the first frame F0 (e.g., F2 and F4). However, it should be understood that this is merely illustrative.

[0170] Figure 17 This is a block diagram of a multi-codec encoder according to an exemplary embodiment.

[0171] Reference Figure 17 The first multi-codec encoder 300 can exchange information with the first memory 140.

[0172] The second partitioning unit 350 of the first multi-codec encoder 300 can transmit second data FI2 to the second codec 330 and the motion estimation module 310.

[0173] The motion estimation module 310 can use the first data FI1 and the reference data Ref to generate first motion estimation information I1a. The first motion estimation information I1a may contain motion vectors. The motion estimation module 310 can store the first motion estimation information I1a in the first memory 140.

[0174] The motion estimation module 310 can use the second data FI2 and the reference data Ref to generate second motion estimation information I1b. The second motion estimation information I1b may contain motion vectors. The motion estimation module 310 can store the second motion estimation information I1b in the first memory 140.

[0175] The first memory 140 can transmit the first motion estimation information I1a to the first codec 320 and the second motion estimation information I1b to the second codec 330.

[0176] The first codec 320 can retrieve first motion estimation information I1a from the first memory 140, while the second codec 330 can retrieve second motion estimation information I1b from the first memory 140. The first codec 320 can use the first motion estimation information I1a to encode first data FI1, while the second codec 330 can use the second motion estimation information I1b to encode second data FI2.

[0177] Figure 18 It is used to conceptually illustrate through Figure 17 The diagram shows the encoding performed by the first and second codecs.

[0178] Reference Figure 18 The first frame F0 can be encoded by the first codec 320 using intra-frame prediction. Then, the first codec 320 can encode the first frame F1 using inter-frame prediction. The second codec 330 can encode the second frame F2 using inter-frame prediction. The first frame F1 can be used as reference data Ref for the third frame F3 and the fourth frame F4. In this way, encoding can be performed on the third frame F3 through the sixth frame F6.

[0179] Figure 19 It shows through Figure 17 The diagram shows the method by which the motion estimation module generates motion vectors.

[0180] Reference Figure 19 The motion estimation module 310 may generate motion estimation information using only half of each block of the frame. For example, the motion estimation module 310 may generate first motion estimation information I1a using only the odd-numbered rows of blocks in the first frame F1. Alternatively, the motion estimation module 310 may generate first motion estimation information I1a using only the even-numbered rows of blocks in the first frame F1.

[0181] Similarly, the motion estimation module 310 may generate the second motion estimation information I1b using only the odd-numbered or even-numbered blocks in the blocks of the second frame F2.

[0182] As an alternative, the multicodec encoder according to the exemplary embodiment may use only half of the block lines of a frame in different ways. For example, assuming there are thirty-two lines in a frame (line 1 to line 32), only lines 1 to 16 may be used, while lines 17 to 32 may be used.

[0183] When the motion estimation module 310 in the first multi-codec encoder 300 according to the exemplary embodiment uses only half of the information about the frame, the two codecs (i.e., the first codec 320 and the second codec 330) can be used with only a single motion estimation module 310 without waste.

[0184] In other words, the motion estimation module 310 can quickly acquire the first motion estimation information I1a about the first frame F1 and store the first motion estimation information I1a in the first memory 140, and can also quickly acquire the second motion estimation information I1b about the second frame F2 that follows the first frame F1 and store the second motion estimation information I1b in the first memory 140.

[0185] Accordingly, while the first codec 320 retrieves the first motion estimation information I1 from the first memory 140 and encodes the first motion estimation information I1, the second codec 330 can retrieve the second motion estimation information I1b from the first memory 140 to begin encoding the second motion estimation information I1b. In this way, the first multi-codec encoder 300 according to the exemplary embodiment can achieve twice the speed achieved by a single motion estimation module 310 and two codecs.

[0186] Therefore, while maintaining performance comparable to that of a device equipped with two motion estimation modules and two codecs, the space required to create a motion estimation module can be saved, thus reducing the overall size of the device.

[0187] Because pixels are finely divided in the signal image of a high-resolution image, even if the motion estimation module 310 uses only half of the frames, there will be no significant problems in terms of the accuracy of motion vectors and motion estimation information.

[0188] Therefore, the first multi-codec encoder 300 according to the exemplary embodiment can achieve comparable performance using a smaller device.

[0189] In the following text, reference will be made to Figures 20 to 21 This section will illustrate a multiple codec encoding system according to exemplary embodiments. To avoid repetition, elements identical to those described above will not be repeated.

[0190] Figure 20 This is a block diagram of a multi-codec encoding system according to an exemplary embodiment. Figure 21 It is shown in detail Figure 20 The block diagram shown is of the multi-codec encoder.

[0191] Reference Figure 20 According to an exemplary embodiment, the second multicoder encoding system 11 may include a second multicoder encoding device 101, which includes a second preprocessor circuit 111 and a third multicoder encoder 302.

[0192] The second preprocessor circuit 111 can receive image data IM output from the video source 50. The second preprocessor circuit 111 can process the received image data IM and provide the image data IM, the resulting first data FI1 and second data FI2 to the third multi-codec encoder 302.

[0193] Reference Figure 21 The motion estimation module 310 of the third multi-codec encoder 302 can receive image data IM from the second preprocessor circuit 111.

[0194] The first partitioning unit 340 can transmit the first data FI1 to the first codec 320, but cannot transmit the first data FI1 to the motion estimation module 310. The second partitioning unit 350 can transmit the second data FI2 to the second codec 330, but cannot transmit the second data FI2 to the motion estimation module 310.

[0195] According to the exemplary embodiment, the third multi-codec encoder 302 does not receive the first data FI1 and the second data FI2 divided from the first partitioning unit 340 and the second partitioning unit 350, but instead receives image data IM directly from the second preprocessor circuit 111. Therefore, it is not necessary to use arithmetic logic to merge the first data FI1 and the second data FI2 or to process the first data FI1 and the second data FI2 alternately.

[0196] Therefore, the motion estimation module 310 according to the exemplary embodiment can achieve better performance and speed with relatively low computational cost.

[0197] In accordance with the conventions of the art to which this invention pertains, exemplary embodiments are illustrated and explained in the drawings using functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented as electronic (or optical) circuits, such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc., which can be formed using semiconductor-based fabrication techniques or other manufacturing techniques. In cases where the blocks, units, and / or modules are implemented by microprocessors or similar elements, they can be programmed using software (e.g., microcode) to perform the various functions discussed herein and may be driven by firmware and / or software as needed. Alternatively, each block, unit, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware for performing some functions and a processor (e.g., one or more programmed microprocessors and associated circuitry) for performing other functions. Furthermore, each block, unit, and / or module in the exemplary embodiments may be physically divided into two or more interacting and separate blocks, units, and / or modules without departing from the scope of the inventive concept. Additionally, the blocks, units, and / or modules of the exemplary embodiments may be physically combined into more complex blocks, units, and / or modules without departing from the scope of the inventive concept.

[0198] The various operations of the above methods can be performed by any suitable means capable of performing the operations (e.g., various hardware components, circuits and / or modules, and / or software components, circuits and / or modules).

[0199] The software may include an ordered list of executable instructions for constructing logical functions and may be included in any processor-readable medium for use by or in conjunction with an instruction execution system, device, or apparatus (e.g., a single-core or multi-core processor or a system containing a processor).

[0200] The blocks or steps and functions of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly in hardware, as software modules executed by a processor, or a combination of both. If implemented in software, the functions can be stored as one or more instructions or codes on or transmitted through a tangible, non-transitory computer-readable medium. The software modules can reside in random access memory (RAM), flash memory, read-only memory (ROM), electrically programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, removable disks, compact disk ROMs (CD ROMs), or any other form of storage medium known in the art.

[0201] Although the inventive concept has been shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made herein without departing from the spirit and scope of the inventive concept as defined by the appended claims. Therefore, the exemplary embodiments are intended to be regarded entirely as illustrative and not restrictive, and the scope of the invention will be indicated by reference to the appended claims rather than the foregoing description.

Claims

1. A multi-codec encoder, characterized in that, include: The first division unit and the second division unit are configured to receive first data and second data respectively, wherein consecutive frames of image data are alternately classified into the first data and the second data; The motion estimation module is configured to generate first motion estimation information based on the first data and reference data, and to generate second motion estimation information based on the second data and the reference data. A first codec is configured to encode the first data using the first motion estimation information; as well as A second codec is configured to encode the second data using the second motion estimation information. The motion estimation module divides the currently encoded frame in the first data into multiple blocks and searches the reference data to find the block that best matches the block input to the motion estimation module, thereby obtaining the motion vector. The first data includes multiple odd-numbered frames, and the second data includes multiple even-numbered frames that alternate with the multiple odd-numbered frames. The motion estimation module is further configured to select a motion estimation mode with the least distortion and the least number of bits from a plurality of motion estimation modes to generate the first motion estimation information and the second motion estimation information, and The motion estimation module is further configured to generate each of the first motion estimation information and the second motion estimation information using only half a block of a single frame of one of the first data and the second data.

2. The multi-codec encoder according to claim 1, characterized in that, The first codec is also configured to produce reconstructed blocks of the first data, and The encoder further includes a reference module configured to generate the reference data based on the reconstructed block and transmit the reference data to the motion estimation module.

3. The multi-codec encoder according to claim 1, characterized in that, The first codec includes: The first prediction module is configured to generate a first prediction block based on the first data and the first motion estimation information, and to generate intra-frame prediction information based on the first data. A first subtractor is configured to derive a first difference between the first predicted block and the first data as a first residual block; and The first compression module is configured to quantize the first residual block.

4. The multi-codec encoder according to claim 3, characterized in that, The first prediction module includes: The motion compensation unit is configured to perform inter-frame prediction based on the first motion estimation information; Intra-prediction unit, configured to perform intra-prediction on the first data to generate the intra-prediction information; and A switch is configured to selectively connect the motion compensation unit and the intra-frame prediction unit to the first subtractor to generate the first prediction block.

5. The multi-codec encoder according to claim 3, characterized in that, The first codec further includes a first rate control module, which is configured to generate first quantization parameter data based on the first prediction block and transmit the first quantization parameter data to the first compression module.

6. The multi-codec encoder according to claim 5, characterized in that, The first rate control module is also configured to transmit the first quantization parameter data to the second codec.

7. The multi-codec encoder according to claim 3, characterized in that, The second codec includes: The second prediction module is configured to generate a second prediction block based on the second data, the second motion estimation information and the intra-frame prediction information. The second subtractor is configured to derive a second difference between the second predicted block and the second data as a second residual block; and The second compression module is configured to quantize the second residual block.

8. The multi-codec encoder according to claim 7, characterized in that, The second codec further includes a second rate control module, which is configured to generate second quantization parameter data based on the second prediction block and transmit the second quantization parameter data to the second compression module.

9. The multi-codec encoder according to claim 1, characterized in that, The first codec and the second codec perform layered encoding.

10. The multi-codec encoder according to claim 9, characterized in that, The hierarchical coding scheme includes a five-layer scheme or a seven-layer scheme.

11. The multi-codec encoder according to claim 1, characterized in that, The multi-codec encoder further includes a memory configured to store the first motion estimation information and the second motion estimation information, and to transmit the first motion estimation information and the second motion estimation information to the first codec and the second codec, respectively.

12. The multi-codec encoder according to claim 11, characterized in that, The motion estimation module is also configured to generate the first motion estimation information using only odd or even rows of blocks from a single frame of the first data.

13. A multi-codec encoding system, characterized in that, include: The preprocessor circuit is configured to alternately classify consecutive frames of image data into first data and second data; as well as A multi-codec encoder, configured to receive the first data and the second data, and including: The motion estimation module is configured to generate first motion estimation information based on the first data and reference data, and to generate second motion estimation information based on the second data and the reference data. A first codec is configured to encode the first data using the first motion estimation information; and A second codec is configured to encode the second data using the second motion estimation information. The motion estimation module divides the currently encoded frame in the first data into multiple blocks and searches the reference data to find the block that best matches the block input to the motion estimation module, thereby obtaining the motion vector. The first data includes multiple odd-numbered frames, and the second data includes multiple even-numbered frames that alternate with the multiple odd-numbered frames. The motion estimation module is further configured to select a motion estimation mode with the least distortion and the least number of bits from a plurality of motion estimation modes to generate the first motion estimation information and the second motion estimation information, and Each of the first motion estimation information and the second motion estimation information is generated using only half a block of a single frame of the corresponding one of the first data and the second data.

14. The multiple codec encoding system according to claim 13, characterized in that, The first codec is also configured to generate intra-frame prediction information, and The second codec is further configured to receive the intra-frame prediction information from the first codec.

15. The multiple codec encoding system according to claim 13, characterized in that, The second codec is also configured to scale the second motion estimation information.

16. The multiple codec encoding system according to claim 13, characterized in that, The multi-codec encoding system further includes a memory configured to store the first motion estimation information and the second motion estimation information, and to transmit the first motion estimation information and the second motion estimation information to the first codec and the second codec, respectively.

17. A multi-codec encoder, characterized in that, include: The first division unit and the second division unit are configured to receive first data and second data respectively, wherein consecutive frames of image data are alternately classified into the first data and the second data; The motion estimation module is configured to generate first motion estimation information based on the first data and reference data, and to generate second motion estimation information based on the second data and the reference data, wherein each of the first motion estimation information and the second motion estimation information is generated using only half of a single frame of the corresponding one of the first data and the second data. The memory is configured to store the first motion estimation information and the second motion estimation information; A first codec is configured to encode the first data using the first motion estimation information; as well as A second codec is configured to encode the second data using the second motion estimation information. The motion estimation module divides the currently encoded frame in the first or second data into multiple blocks and searches the reference data to find the block that best matches the block input to the motion estimation module, thereby obtaining the motion vector. The first data includes multiple odd-numbered frames, and the second data includes multiple even-numbered frames that alternate with the multiple odd-numbered frames. The motion estimation module is further configured to select a motion estimation mode with the least distortion and the least number of bits from a plurality of motion estimation modes to generate the motion estimation information.

18. The multi-codec encoder according to claim 17, characterized in that, Each of the first motion estimation information and the second motion estimation information is generated using only the odd or even rows of the single frame.

Images