Semiconductor light emitting devices
By designing a specific through-hole structure in the transparent electrode layer and the insulating reflective layer of the semiconductor light emitting device, the problem of the transparent electrode layer absorbing external light is solved, and a higher light extraction efficiency and brightness are achieved.
Patent Information
- Application Number
- CN201811562995.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-01-26
- Filing Date
- 2018-12-20
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2038-12-20
AI Technical Summary
In the existing semiconductor light emitting devices, the transparent electrode layer absorbs external light, resulting in a decrease in light extraction efficiency.
By forming a plurality of first through holes in the transparent electrode layer and forming a plurality of second through holes in the first insulating reflective layer, the light reflectivity is increased by using the reflective electrode layer and the second insulating reflective layer, thereby improving the external light extraction efficiency.
The external light extraction efficiency of semiconductor light emitting devices is improved, light loss is reduced, and the brightness of the light emitting devices is enhanced.
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Figure CN110085715B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] Korean Patent Application No. 10-2018-0010192, filed on January 26, 2018 with the Korean Intellectual Property Office, and entitled “Semiconductor Light Emitting Device” is hereby incorporated by reference in its entirety. Technical Field
[0003] Embodiments relate to semiconductor light emitting devices. Background Art
[0004] A light emitting diode (LED), a device containing a light emitting material to emit light, converts energy generated by the recombination of electrons and holes into light emitted therefrom. Such LEDs are widely used in lighting elements, display devices, and light sources. Summary of the invention
[0005] According to an embodiment, a semiconductor light emitting device includes: a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked therein; a transparent electrode layer, which is disposed on the second conductive type semiconductor layer and is divided into a first region and a second region, the transparent electrode layer having a plurality of first through holes disposed in the first region; an insulating reflective layer, which covers the transparent electrode layer and has a plurality of second through holes disposed in a region overlapping the second region; and a reflective electrode layer, which is disposed on a region of the insulating reflective layer and connected to the transparent electrode layer through the plurality of second through holes.
[0006] According to an embodiment, a semiconductor light emitting device includes: a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked therein; a transparent electrode layer, which is disposed on the second conductive type semiconductor layer and is divided into a first region and a second region, the transparent electrode layer having a plurality of first through holes disposed in the first region; a first insulating reflective layer, which passes through the plurality of first through holes to contact the second conductive type semiconductor layer, and has a plurality of second through holes disposed in a region overlapping the second region; and a reflective electrode layer, which covers the first insulating reflective layer and is connected to the transparent electrode layer through the plurality of second through holes.
[0007] According to an embodiment, a semiconductor light emitting device includes: a substrate; a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked on the substrate; a transparent electrode layer, which is arranged on the second conductive type semiconductor layer and is divided into a first region and a second region, the transparent electrode layer having a plurality of first through holes arranged in the first region; a first insulating reflective layer, which penetrates the plurality of first through holes to contact the second conductive type semiconductor layer, and has a plurality of second through holes arranged in a region overlapping the second region; a reflective electrode layer, which covers the first insulating reflective layer and is connected to the transparent electrode layer through the plurality of second through holes; a second insulating reflective layer, which covers the transparent electrode layer and the reflective electrode layer; and a first conductive pattern and a second conductive pattern, which are arranged on the second insulating reflective layer and are connected to the first conductive type semiconductor layer and the reflective electrode layer respectively through the second insulating reflective layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Features will become apparent to those skilled in the art by describing in detail exemplary embodiments with reference to the accompanying drawings, in which:
[0009] Figure 1 shows a schematic plan view of a semiconductor light emitting device according to an exemplary embodiment;
[0010] Figure 2 Shows Figure 1 an enlarged view of portion A1;
[0011] Figure 3 Shows a view taken along line II' Figure 1 A side cross-sectional view of a semiconductor light emitting device;
[0012] Figure 4 A view showing a current spreading effect of a semiconductor light emitting device according to an exemplary embodiment;
[0013] Figure 5 shows a view showing an effect of enhancing external light extraction of a semiconductor light emitting device according to an exemplary embodiment;
[0014] Figure 6 Another embodiment is shown;
[0015] Figures 7 to 20 Shows the manufacturing Figure 1 A view of each stage in the method of manufacturing a semiconductor light emitting device; and
[0016] Fig.21 A side sectional view illustrating an example in which a semiconductor light emitting device according to an exemplary embodiment is applied to a semiconductor light emitting device package. DETAILED DESCRIPTION
[0017] Will refer to Figures 1 to 3 A semiconductor light emitting device 10 according to example embodiments is described. Figure 1 is a schematic plan view of a semiconductor light emitting device according to example embodiments. Figure 2 yes Figure 1 An enlarged view of portion A1 of FIG. Figure 3 It is taken along line I-I' Figure 1 A side cross-sectional view of a semiconductor light emitting device.
[0018] The semiconductor light emitting device 10 according to the embodiment may include a substrate 105, a light emitting structure 110, a transparent electrode layer 140, a first insulating reflective layer 130, a second insulating reflective layer 150, a reflective electrode layer 144, a first conductive pattern 155n, a second conductive pattern 155p, a passivation layer 160, a first solder bump 170n, a second solder bump 170p, and a molding portion 172. The light emitting structure 110 may be on the front surface 105s1 of the substrate 105.
[0019] The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite to the front surface 105s1. The substrate 105 may be a substrate for growing a semiconductor and may be formed of an insulating, conductive, or semiconductor material, such as sapphire, Si, SiC, MgAl 2 O 4 、MgO、LiAlO 2 、LiGaO 2 , GaN, etc. Sapphire is electrically insulating, may be a crystal having hexa-rhombo R3c symmetry, and may be used as a substrate for growing nitride semiconductors.
[0020] Throughout the specification, terms such as "front surface" and "rear surface" are used to distinguish the relative positions of components. Therefore, terms such as "front surface" and "rear surface" may be replaced by other terms such as "first surface" and "second surface" or "top surface" and "bottom surface", and may be used to describe components in the specification. The front surface 105s1 and the rear surface 105s2 of the substrate 105 may be replaced by the top surface 105s1 and the bottom surface 105s2 of the substrate 105, or may be replaced by the first surface 105s1 and the second surface 105s2 of the substrate 105.
[0021] In one example, the front surface 105s1 of the substrate 105 may have an uneven structure that can improve the external light extraction efficiency and crystallinity of the semiconductor layer constituting the light emitting structure 110. In the present embodiment, the uneven structure of the front surface 105s1 of the substrate 105 is illustrated as having a dome-shaped convex shape. Alternatively, the uneven structure of the front surface 105s1 of the substrate 105 may be formed in various shapes, such as a square, a triangle, etc. In addition, the uneven structure of the front surface 105s1 of the substrate 105 may be selectively formed at various regions or may be omitted.
[0022] In one example, according to an embodiment, the substrate 105 may be removed later. For example, the substrate 105 may be provided as a growth substrate for growing the light emitting structure 110, and then the substrate 105 may be removed by a separation process. The substrate 105 may be separated from the light emitting structure 110 by a method such as a laser lift-off (LLO) method, a chemical lift-off (CLO) method, or the like.
[0023] The light emitting structure 110 may include a first conductive type semiconductor layer 115, an active layer 120, and a second conductive type semiconductor layer 125. The first conductive type semiconductor layer 115 may be grown from the front surface 105s1 of the substrate 105. The first conductive type semiconductor layer 115 may be formed of a semiconductor doped with n-type impurities, or may be an n-type nitride semiconductor layer.
[0024] When viewed in a plan view, the first conductive type semiconductor layer 115 may have a quadrilateral shape. When viewed in a plan view, the first conductive type semiconductor layer 115 may have a first corner C1, a second corner C2, a third corner C3, and a fourth corner C4, which are sequentially arranged in a counterclockwise direction. When viewed in a plan view, the first conductive type semiconductor layer 115 may have a first edge S1 between the first corner C1 and the second corner C2, a second edge S2 between the second corner C2 and the third corner C3, a third edge S3 between the third corner C3 and the fourth corner C4, and a fourth edge S4 between the first corner C1 and the fourth corner C4. Therefore, the first edge S1 and the third edge S3 may face each other, and the second edge S2 and the fourth edge S4 may face each other.
[0025] In one example, when viewed in a plan view, the first conductive type semiconductor layer 115 can be self-aligned on the substrate 105 so that the first corner C1 to the fourth corner C4 and the first edge S1 to the fourth edge S4 of the first conductive type semiconductor layer 115 can be applied to the substrate 105 in the same manner.
[0026] The first conductive type semiconductor layer 115 may have a recessed region E and a protruding region M. The recessed region E may be referred to as an etching region, and the protruding region M may be referred to as a mesa region. In the drawings, reference numeral "B" may represent a boundary B between the recessed region E and the protruding region M. In the first conductive type semiconductor layer 115, an upper surface of the protruding region M may be higher than an upper surface of the recessed region E.
[0027] In one example, the protruding region M may be gradually narrowed in an upward direction. Therefore, the protruding region M may have an inclined side surface. In one example, a portion of the upper surface of the recessed region E may be defined as a first contact region CT1. In one example, at least a portion of the upper surface of the protruding region M may be defined as a second contact region CT2.
[0028] Throughout the specification, terms such as "first", "second", etc. may be used to describe various components, but the components are not limited by these terms. These terms are only used for the purpose of distinguishing one component from another component. For example, a "first component" may be referred to as a "second component" without departing from the scope of the present disclosure.
[0029] In the first conductive type semiconductor layer 115, the protruding region M may be spaced apart from the first to fourth edges S1 to S4, and the recessed region E may be disposed among the first to fourth edges S1 to S4. When viewed in a plan view, the recessed region E may extend in a direction from a portion of the first edge S1 toward the third edge S3, for example, diagonally.
[0030] The active layer 120 and the second conductive type semiconductor layer 125 may be sequentially stacked on the upper surface of the protruding region M of the first conductive type semiconductor layer 115. The second conductive type semiconductor layer 125 may be formed of a semiconductor doped with p type impurities, and may be a p type nitride semiconductor layer.
[0031] In one example, the first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may be stacked, wherein their positions vary according to the embodiment. The first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may have Al x In y Ga (1-x-y) The composition of N (here, 0≤x<1, 0≤y<1, 0≤x+y<1), and may be a material such as GaN, AlGaN, InGaN, and AlInGaN.
[0032] The active layer 120 may be between the first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125. When the semiconductor light emitting device 10 is in operation, the active layer 120 may emit light having a predetermined energy by recombination of electrons and holes. The active layer 120 may include a material having an energy band gap smaller than that of the first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125. For example, when the first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 are GaN-based compound semiconductors, the active layer 120 may include an InGaN-based compound semiconductor having an energy band gap smaller than that of GaN. In addition, the active layer 120 may be a multiple quantum well (MQW) structure in which quantum well layers and quantum barrier layers are alternately stacked, for example, an InGaN / GaN structure. The structure of the active layer 120 may also be a single quantum well (SQW) structure.
[0033] The transparent electrode layer 140 may be located on the upper surface of the second conductive type semiconductor layer 125. The transparent electrode layer 140 is formed of a conductive light-transmitting material. The transparent electrode layer 140 may diffuse the current injected from the reflective electrode layer 144 to prevent the current from being concentrated in one area of the second conductive type semiconductor layer 125. The transparent electrode layer 140 may cover all or part of the second conductive type semiconductor layer 125 as a whole. The transparent electrode layer 140 may be formed of the following TCO (transparent conductive oxide) materials: such as, ITO (indium tin oxide), ZITO (zinc-doped indium tin oxide), ZIO (indium zinc oxide), GIO (gallium indium oxide), ZTO (zinc tin oxide), FTO (fluorine-doped tin oxide), AZO (aluminum-doped zinc oxide), GZO (gallium-doped zinc oxide), In 4 Sn 3 O 12 、Zn (1-x) Mg x O (zinc magnesium oxide, 0≤x≤1), etc. The transparent electrode layer 140 may be formed of a light-transmitting polymer resin having conductivity by including at least one of Ag nanowires and carbon nanotubes (CNTs).
[0034] Reference Figure 1 and Figure 2 , the transparent electrode layer 140 may include a first region R1 in which a plurality of first through holes PD1 are formed and a second region R2 other than the first region R1. When viewed from the upper surface of the semiconductor light emitting device 10, the transparent electrode layer 140 may be formed so that the plurality of first through holes PD1 are arranged at regular intervals DS1. The shape and arrangement of the first through holes PD1 may be modified in various aspects. The first through holes PD1 may be formed in various shapes such as a circle or a polygon, and may be arranged in a lattice manner or may be arranged alternately.
[0035] The transparent electrode layer 140 effectively diffuses the current Is into the second conductive type semiconductor layer 125. A portion of the light L2 and L8 is reflected on the transparent electrode layer 140. However, since a portion of the light is absorbed in the process of transmitting the light emitted from the active layer 120, the transparent electrode layer 140 may reduce the external light extraction efficiency compared to using a high reflective layer as the electrode layer. In one example, the first through hole PD1 may be formed by removing a portion of the transparent electrode layer 140, whereby the current diffusion effect of the transparent electrode layer 140 may be maintained while reducing the amount of light absorbed by the transparent electrode layer 140.
[0036] The first insulating reflective layer 130 may be on the transparent electrode layer 140. The first insulating reflective layer 130 may cover the transparent electrode layer 140 and may fill the first through hole PD1. A plurality of second through holes PD2 may be located in the first insulating reflective layer 130 in the second region R2 and do not overlap with the first through hole PD1 along the stacking direction or the z direction. The plurality of second through holes PD2 are arranged at regular intervals DS2. The first insulating reflective layer 130 may cover a portion of the first conductive type semiconductor layer 115 and a portion of the second conductive type semiconductor layer 125. The first insulating reflective layer 130 may include a first opening OPa exposing a first contact region CT1 of the recessed region E of the first conductive type semiconductor layer 115.
[0037] The first insulating reflective layer 130 is a reflective structure for reflecting some L3 , L4 , L6 , L9 , and L10 of the lights L1 , L6 , and L7 directed in a direction opposite to the substrate 105 among the lights emitted from the active layer 120 , and redirecting the lights to the substrate 105 .
[0038] The first insulating reflective layer 130 may include a multilayer structure. The multilayer structure may have a structure in which a first insulating layer and a second insulating layer having different refractive indexes are alternately stacked. That is, the first insulating reflective layer 130 may be a distributed Bragg reflector (DBR). The first insulating reflective layer 130 may be substantially formed of a material having insulating properties and light-transmitting properties, and may be formed using an inorganic material or an organic material. The first insulating reflective layer 130 may include silicon oxide or silicon nitride having insulating properties and light-transmitting properties. For example, the first insulating reflective layer 130 may be made of S, SiO 2 、SiN、SiO x N y 、TiO 2 、Si 3 N 4 、Al 2 O 3 、TiN、AlN、ZrO 2 , TiAlN, TiSiN, etc.
[0039] According to an embodiment, the first insulating reflective layer 130 may form an omni-directional reflector (ODR) together with the reflective electrode layer 144 contacting therewith on an upper portion of the first insulating reflective layer 130 .
[0040] Reference Figure 5 The first insulating reflective layer 130 fills the first through hole PD1, so that the light L6 emitted from the active layer 120 may be reflected without being absorbed into the transparent electrode layer 140. Therefore, the reflectivity may be improved as a whole to enhance the external light extraction efficiency.
[0041] Reference Figure 2 , the first through hole PD1 and the second through hole PD2 are compared with each other. The first through hole PD1 is formed in the first region R1 of the transparent electrode layer 140, and the second through hole PD2 is formed in the first insulating reflective layer 130 and may be disposed in the second region R2 of the transparent electrode layer 140. Therefore, the first through hole PD1 and the second through hole PD2 may be arranged so as not to overlap each other along the stacking direction. The first through hole PD1 may be arranged to have a maximum size within a range that does not hinder the current diffusion of the transparent electrode layer 140. Since the reflectivity is improved according to an increase in the area in which the first insulating reflective layer 130 and the reflective electrode layer 144 contact each other, the second through hole PD2 may be arranged to have a minimum size within a range in which the reflectivity is not hindered. The total area AR1 of the plurality of first through holes PD1 is greater than the total area AR2 of the plurality of second through holes PD2. Therefore, in one embodiment, the size D1 of the first through hole PD1 is relatively large and the size D2 of the second through hole PD2 is relatively small, that is, the size D1 of the first through hole PD1 is formed to be larger than the size D2 of the second through hole PD2, so that the external light extraction efficiency can be improved without hindering the current diffusion effect of the transparent electrode layer 140.
[0042] The reflective electrode layer 144 is located on the first insulating reflective layer 130 and fills the second through hole PD2. Therefore, the reflective electrode layer 144 can penetrate the first insulating reflective layer 130 and can be connected to the transparent electrode layer 140. The reflective electrode layer 144 can be formed of a single layer or a multilayer structure of a conductive material having ohmic characteristics with the transparent electrode layer 140, and can be formed of a material containing one or more of Au, W, Pt, Si, Ir, Ag, Cu, Ni, Ti, Cr, and alloys thereof. Therefore, as Figure 4 As shown, the current Is applied to the reflective electrode layer 144 may be diffused through the transparent electrode layer 140 .
[0043] Generally, the flip-chip type semiconductor light emitting device emits light generated by the active layer 120 in a direction toward the substrate 105. When the light is emitted away from the substrate, the light may be incident on the transparent electrode layer 140 and absorbed by the transparent electrode layer 140 in large quantities, resulting in light loss. In order to solve the defect that the light is absorbed into the transparent electrode layer 140 and thus reduces the brightness, in the present embodiment, a first through hole PD1 may be formed in the transparent electrode layer 140, and the first through hole PD1 may be filled with a first insulating reflective layer 130 having a higher reflectivity to improve the reflectivity. In addition, the second through hole PD2 of the first insulating reflective layer 130 is arranged not to overlap with the first through hole PD1 in the z direction, so that the area in which the first insulating reflective layer 130 and the reflective electrode layer 144 overlap each other may be increased. Therefore, compared with the case where the first insulating reflective layer 130 is simply arranged, or the first through hole PD1 and the second through hole PD2 overlap each other in the z direction, the reflectivity may be improved. Therefore, the external light extraction efficiency of the semiconductor light emitting device 10 may be further improved.
[0044] The second insulating reflective layer 150 may be on the reflective electrode layer 144 and the first insulating reflective layer 130 to further improve the external light extraction efficiency. The second insulating reflective layer 150 may be formed of the same material as the first insulating reflective layer 130. In some embodiments, the second insulating reflective layer 150 may form a distributed Bragg reflector (DBR). The second insulating reflective layer 150 may reflect a portion L5 of the light L1 passing through the transparent electrode layer 140 to further improve the external light extraction efficiency. The second insulating reflective layer 150 may include a first opening OPa exposing the first contact region CT1 of the first conductive type semiconductor layer 115 and a second opening OPb exposing the third contact region CT3 of the reflective electrode layer 144.
[0045] The first conductive pattern 155n and the second conductive pattern 155p may be formed of the same material and spaced apart from each other on the second insulating reflective layer 150. For example, the first conductive pattern 155n and the second conductive pattern 155p may be formed of a material including one or more of Au, W, Pt, Si, Ir, Ag, Cu, Ni, Ti, Cr, and alloys thereof.
[0046] The first conductive pattern 155n may extend to the first contact region CT1 of the first conductive type semiconductor layer 115 to be electrically connected to the first conductive type semiconductor layer 115. The second conductive pattern 155p may extend to the third contact region CT3 of the reflective electrode layer 144 which is in turn electrically connected to the second conductive type semiconductor layer 125. When viewed in a plan view, the first conductive pattern 155n may be adjacent to the first edge S1, the second edge S2, and the fourth edge S4, and the second conductive pattern 155p may be adjacent to the third edge S3.
[0047] Figure 6 Another embodiment is shown in which a plurality of light emitting structures LED1 and LED2 share one substrate 105 and are connected in series through interconnection portions 155c. Descriptions of components assigned the same reference numerals as those of the previous above-described embodiments will be omitted.
[0048] For example, when a plurality of light emitting structures LED1 and LED2 are formed, the first conductive pattern or the second conductive pattern of one light emitting structure LED1 can be electrically connected in series to the first conductive pattern or the second conductive pattern of another light emitting structure LED2 through the interconnection portion 155c. In one example, the second conductive pattern 155p of one light emitting structure LED1 is connected to the first conductive pattern 155n of another light emitting structure LED2 through the interconnection portion 155c.
[0049] Next, we will refer to Figures 7 to 20 An example of a method of manufacturing the semiconductor light emitting device 10 according to one embodiment is described. Figure 7 , Fig. 9 , Fig.11 , Fig.13 , Fig.15 , Fig.17 and Fig.19 is a schematic plan view showing stages in a method of manufacturing a semiconductor light emitting device 10 according to an embodiment, and Figure 8 , Fig.10 , Fig.12 , Fig.14 , Fig.16 , Fig.18 and Fig. 20 is schematically shown along Figure 7 , Fig. 9 , Fig.11 , Fig.13 , Fig.15 , Fig.17 and Fig.19 A cross-sectional view of the area cut along line II' in FIG.
[0050] Reference Figure 7 and Figure 8 The light emitting structure 110 may be formed on a substrate 105. The substrate 105 may be made of a material such as sapphire, Si, SiC, MgAl 2 O 4 、MgO、LiAlO 2 、LiGaO 2The substrate 105 may have a front surface 105s1 and a rear surface 105s2 opposite to the front surface 105s1. In one example, an uneven structure may be formed on the front surface 105s1 of the substrate 105. According to an embodiment, forming the uneven structure on the front surface 105s1 of the substrate 105 may be omitted.
[0051] The light emitting structure 110 may be formed on the front surface 105s1 of the substrate 105. The light emitting structure 110 may be formed of a plurality of layers formed using a process such as metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE), or molecular beam epitaxy (MBE). For example, the light emitting structure 110 may include a first conductive type semiconductor layer 115, an active layer 120, and a second conductive type semiconductor layer 125, which are sequentially formed on the front surface 105s1 of the substrate 105 along the z direction. The first conductive type semiconductor layer 115 and the second conductive type semiconductor layer 125 may have different conductive types. For example, the first conductive type semiconductor layer 115 may have n-type conductivity, and the second conductive type semiconductor layer 125 may have p-type conductivity.
[0052] The first transparent electrode layer 140 may be formed on the light emitting structure 110 .
[0053] Reference Fig. 9 and Fig.10 , the first transparent electrode layer 140, the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115 may be partially etched. Therefore, the light emitting structure 110 may include: a recessed area E in which a portion of the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115 are removed; and a mesa area M surrounding the recessed area E. The mesa area M may be defined as an area in which the second conductive type semiconductor layer 125, the active layer 120, and the first conductive type semiconductor layer 115 are not etched. The mesa area M may have a relatively protruding shape compared to the recessed area E along the z direction. The recessed area E may also be referred to as an etched area.
[0054] Reference Fig.11 and Fig.12 , a plurality of first through holes PD1 may be formed in the transparent electrode layer 140. The plurality of through holes PD1 of the transparent electrode layer 140 may expose a portion of the second conductive type semiconductor layer 125. The plurality of first through holes PD1 may be located in the mesa region M.
[0055] Reference Fig.13 and Fig.14, a first insulating reflective layer 130 having a plurality of second through holes PD2 may be formed on the transparent electrode layer 140. The plurality of second through holes PD2 of the first insulating reflective layer 130 expose a portion of the first transparent electrode layer 140 and may be disposed at positions where they do not overlap with the plurality of first through holes PD1. The plurality of holes PD2 may be located in the mesa region M.
[0056] Reference Fig.15 and Fig.16 , the reflective electrode layer 144 may be formed on the first insulating reflective layer 130. The reflective electrode layer 144 is formed on the mesa region M and may be formed on one region of the first insulating reflective layer 130.
[0057] Reference Fig.17 and Fig.18 , the second insulating reflective layer 150 may be formed on the reflective electrode layer 144. The second insulating reflective layer 150 may cover the reflective electrode layer 144. The first opening OPa and the second opening OPb are formed in the second insulating reflective layer 150.
[0058] The first opening OPa penetrates the first insulating reflective layer 130 and the second insulating reflective layer 150 and exposes a portion of the first conductive type semiconductor layer 115 in the recessed region E. The second opening OPb penetrates the second insulating reflective layer 150 and exposes a portion of the reflective electrode layer 144 in the mesa region M. The surface of the first conductive type semiconductor layer 115 exposed by the first opening OPa may be referred to as a first contact region CT1, and the surface of the reflective electrode layer 144 exposed by the second opening OPb may be referred to as a third contact region CT3.
[0059] Reference Fig.19 and Fig. 20 , a first conductive pattern 155 n and a second conductive pattern 155 p may be formed on the substrate 105 having the second insulating reflective layer 150 .
[0060] Forming the first conductive pattern 155n and the second conductive pattern 155p may include: forming a conductive material layer on the substrate 105 having the second insulating reflective layer 150, and removing a portion of the conductive material layer using, for example, a photolithography process. Since the first conductive pattern 155n and the second conductive pattern 155p are formed by the same process, the first conductive pattern 155n and the second conductive pattern 155p may be formed of the same material. The first conductive pattern 155n and the second conductive pattern 155p may have the same thickness.
[0061] The first conductive pattern 155n may be electrically connected to the first contact region CT1 of the first conductive type semiconductor layer 115. The second conductive pattern 155p may be electrically connected to the third contact region CT3 of the reflective electrode layer 144.
[0062] Reference Figures 1 to 3 , a passivation layer 160 having a third opening 160a and a fourth opening 160b may be formed on the substrate 105 having the first conductive pattern 155n and the second conductive pattern 155p. The third opening 160a of the passivation layer 160 may expose a portion of the first conductive pattern 155n, and the fourth opening 160b of the passivation layer 160 may expose a portion of the second conductive pattern 155p.
[0063] The portion of the first conductive pattern 155n exposed by the third opening 160a of the passivation layer 160 may be referred to as a fourth contact region CT4, and the portion of the second conductive pattern 155p exposed by the fourth opening 160b of the passivation layer 160 may be referred to as a fifth contact region CT5.
[0064] The first electrode pad 165n and the second electrode pad 165p may be formed on the substrate 105 having the passivation layer 160. The first electrode pad 165n may be formed on the fourth contact region CT4 of the first conductive pattern 155n, and the second electrode pad 165p may be formed on the fifth contact region CT5 of the second conductive pattern 155p. The first electrode pad 165n and the second electrode pad 165p may be under bump metallurgy (UBM). In one example, the number and arrangement of the first electrode pad 165n and the second electrode pad 165p may be modified in various aspects.
[0065] The first solder bump 170n and the second solder bump 170p may be formed on the substrate 105 having the first and second electrode pads 165n and 165p. The first solder bump 170n may be formed on the first electrode pad 165n, and the second solder bump 170p may be formed on the second electrode pad 165p.
[0066] A molding portion 172 covering the side surfaces of the first solder bump 170n and the second solder bump 170p may be formed. The molding portion 172 may include a reflective powder such as TiO 2 、Al 2 O 3 wait.
[0067] The semiconductor light emitting device 10 as described above can be commercialized as a package. Fig.21 An example in which the semiconductor light emitting device 10 as described above is applied to a package is described. Fig.21 is a cross-sectional view schematically showing an example in which the semiconductor light emitting device according to the embodiment is applied to a package.
[0068] Reference Fig.21, the semiconductor light emitting device package 1000 may include a semiconductor light emitting device 1001 as a light source, a package body 1002, a pair of lead frames 1010, and a packaging portion 1005. Here, the semiconductor light emitting device 1001 may be Figure 1 The semiconductor light emitting device 10 is shown in FIG. 1 , and a description thereof will be omitted.
[0069] The semiconductor light emitting device 1001 may be mounted on a pair of lead frames 1010. The pair of lead frames 1010 may include a first lead frame 1012 and a second lead frame 1014. Figure 3 and Fig.21 , the semiconductor light emitting device 1001 may be connected to the first lead frame 1012 and the second lead frame 1014 through the first solder bump 170n and the second solder bump 170p, respectively.
[0070] The package body 1002 may include a reflective cup to improve light reflection efficiency and light extraction efficiency. In the reflective cup, an encapsulation portion 1005 formed of a light-transmitting material may be formed to encapsulate the semiconductor light emitting device 1001 therein.
[0071] The encapsulation part 1005 may include a wavelength conversion material. For example, the encapsulation part 1005 may include at least one fluorescent substance that is excited by the light emitted from the semiconductor light emitting device 10 to emit light of different wavelengths in the light-transmitting resin. Therefore, blue light, green light, or red light may be emitted, and white light, ultraviolet light, etc. may be controlled to be emitted.
[0072] For a flip chip type LED among such light emitting diodes, since a conductive pattern is widely provided on a surface to be mounted on a package substrate, light emitted from an active layer is absorbed therein, and thus external light extraction efficiency may be reduced.
[0073] However, according to one or more embodiments, the semiconductor light emitting device may have increased current spreading and enhanced reflectivity, thereby improving external light extraction efficiency.
[0074] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a general and descriptive sense only, and not for purposes of limitation. In some cases, as of the time of filing this application, as will be apparent to those of ordinary skill in the art, unless otherwise specifically noted, the features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes may be made in form and detail without departing from the spirit and scope of the invention as set forth in the appended claims.
Claims
1. A semiconductor light emitting device, comprising: a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked therein along a stacking direction; a transparent electrode layer on the second conductive type semiconductor layer and divided into a first region and a second region, wherein the transparent electrode layer has a plurality of first through holes in the first region; an insulating reflective layer covering the transparent electrode layer and having a plurality of second through holes in a region overlapping the second region along the stacking direction; and a reflective electrode layer on the first region of the insulating reflective layer and connected to the transparent electrode layer through the plurality of second through holes, wherein, in a plan view, the plurality of first through holes and the plurality of second through holes are arranged in a lattice form in a first direction and a second direction intersecting the first direction, so that the plurality of first through holes do not overlap with the plurality of second through holes in the stacking direction, and Wherein, the total area of the plurality of first through holes is greater than the total area of the plurality of second through holes. 2 . The semiconductor light emitting device according to claim 1 , wherein each of the plurality of first through holes is larger than each of the plurality of second through holes. 3 . The semiconductor light emitting device according to claim 1 , wherein the insulating reflective layer forms a distributed Bragg reflector in which first insulating layers having a first refractive index and second insulating layers having a second refractive index are alternately stacked. The semiconductor light emitting device according to claim 1 , wherein the insulating reflective layer and the reflective electrode layer form an omnidirectional reflector. The semiconductor light emitting device according to claim 1 , wherein the first through hole is filled with the insulating reflective layer. The semiconductor light emitting device according to claim 1 , wherein the second through hole is filled with the reflective electrode layer. 7 . The semiconductor light emitting device of claim 1 , wherein the plurality of first through holes and the plurality of second through holes are spaced apart from each other at predetermined intervals. 8 . The semiconductor light emitting device according to claim 1 , wherein the light emitting structure has an etched region in which the active layer and the second conductive type semiconductor layer are removed, and the insulating reflective layer extends to the etched region.
9. A semiconductor light emitting device, comprising: a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked therein along a stacking direction; a transparent electrode layer on the second conductive type semiconductor layer and divided into a first region and a second region, wherein the transparent electrode layer has a plurality of first through holes in the first region; a first insulating reflective layer that passes through the plurality of first through holes to contact the second conductive type semiconductor layer and has a plurality of second through holes in a region overlapping the second region along the stacking direction; and a reflective electrode layer covering the first insulating reflective layer and connected to the transparent electrode layer through the plurality of second through holes, wherein, in a plan view, the plurality of first through holes and the plurality of second through holes are arranged in a lattice form in a first direction and a second direction intersecting the first direction, so that the plurality of first through holes do not overlap with the plurality of second through holes in the stacking direction, and Wherein, the total area of the plurality of first through holes is greater than the total area of the plurality of second through holes. 10 . The semiconductor light emitting device according to claim 9 , further comprising a second insulating reflective layer covering the reflective electrode layer and contacting the first insulating reflective layer.
11. The semiconductor light emitting device according to claim 10, further comprising a first conductive pattern and a second conductive pattern, the first conductive pattern and the second conductive pattern being on the second insulating reflective layer and respectively connected to the first conductive type semiconductor layer and the reflective electrode layer through the second insulating reflective layer. 12 . The semiconductor light emitting device according to claim 10 , wherein the first insulating reflective layer and the second insulating reflective layer form a distributed Bragg reflector in which first insulating layers having a first refractive index and second insulating layers having a second refractive index are alternately stacked. 13 . The semiconductor light emitting device according to claim 9 , wherein the first insulating reflective layer and the reflective electrode layer form an omnidirectional reflector.
14. A semiconductor light emitting device, comprising: substrate; a light emitting structure having a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer stacked on the substrate in a stacking direction; a transparent electrode layer on the second conductive type semiconductor layer and divided into a first region and a second region, wherein the transparent electrode layer has a plurality of first through holes in the first region; a first insulating reflective layer that penetrates the plurality of first through holes to contact the second conductive type semiconductor layer and has a plurality of second through holes in a region overlapping the second region along the stacking direction; a reflective electrode layer covering the first insulating reflective layer and connected to the transparent electrode layer through the plurality of second through holes; a second insulating reflective layer covering the transparent electrode layer and the reflective electrode layer; and a first conductive pattern and a second conductive pattern, the first conductive pattern and the second conductive pattern being on the second insulating reflective layer and respectively connected to the first conductive type semiconductor layer and the reflective electrode layer through the second insulating reflective layer, wherein, in a plan view, the plurality of first through holes and the plurality of second through holes are arranged in a lattice form in a first direction and a second direction intersecting the first direction, so that the plurality of first through holes do not overlap with the plurality of second through holes in the stacking direction, and Wherein, the total area of the plurality of first through holes is greater than the total area of the plurality of second through holes.
15. The semiconductor light emitting device according to claim 14, wherein: The light emitting structure includes a plurality of light emitting structures, and The plurality of light emitting structures share the substrate, are separated by a region where the first conductive type semiconductor layer is removed, and are electrically connected to each other in series.
16. A semiconductor light-emitting device according to claim 15, wherein the plurality of light-emitting structures are connected in series to each other through an interconnection portion, and the interconnection portion connects a first conductive pattern or a second conductive pattern of a first light-emitting structure of the plurality of light-emitting structures with a corresponding pattern of a second light-emitting structure adjacent to the first light-emitting structure. 17 . The semiconductor light emitting device of claim 14 , wherein the first insulating reflective layer and the second insulating reflective layer are formed of the same material.
18. The semiconductor light emitting device according to claim 14, further comprising: a first solder bump and a second solder bump, the first solder bump and the second solder bump being respectively in a bonding region of the first conductive pattern and the second conductive pattern; and A molding portion covers a side surface of the first solder bump and a side surface of the second solder bump. The semiconductor light emitting device according to claim 18 , wherein the molding portion comprises light reflecting powder.
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