Adaptive control for reconfiguring power converters

Abstract

The present application discloses an apparatus including a controller configured to control the operation of a power converter, wherein a regulator operable in a plurality of regulator modes is connected to a charge pump operable in a plurality of charge pump modes, wherein the controller is configured to receive information indicative of the operation of the power converter and cause a first transition and a second transition based at least in part on the information, wherein the first transition exists between the regulator modes, and wherein the second transition exists between the charge pump modes.

Description

Technical Field

[0001] The present disclosure relates to power supplies, and in particular, to power supplies including both a switched capacitor network and a regulator. Background Art

[0002] Some power converters include a charge pump connected to a regulator. Such power converters convert a first voltage to a second voltage by multiplying the first voltage to a voltage relatively close to the second voltage and making up the difference using the regulator.

[0003] During operation, the input voltage may change. For example, in a digital device powered by a battery, the battery voltage will tend to decrease over time, and the digital circuitry will require some fixed second voltage. Unless something is done, the output voltage may also change. This may cause the power converter to supply an incorrect voltage. Summary of the invention

[0004] In one aspect, the invention is directed to adaptively changing a mode of a regulator and a mode of a charge pump as conditions change.

[0005] In one aspect, the invention features a controller configured to control the operation of a power converter in which a regulator operable in multiple regulator modes is connected to a charge pump operable in multiple charge pump modes; wherein the controller is configured to receive information indicative of the operation of the power converter and to cause a first transition and a second transition based at least in part on the information, wherein the first transition exists between the regulator modes and wherein the second transition exists between the charge pump modes.

[0006] Embodiments of the present invention include embodiments in which the controller synchronizes the first conversion and the second conversion or causes the first conversion and the second conversion simultaneously or substantially simultaneously, and embodiments in which the controller causes the first conversion and the second conversion sequentially or successively.

[0007] Embodiments include: embodiments in which the first transition causes the regulator to switch between operating in a buck mode and operating in a boost mode; and embodiments in which the first transition causes the regulator to switch between two modes selected from the group consisting of a buck mode, a boost mode, and a buck-boost mode.

[0008] Also included in the embodiments are embodiments in which the second switching causes the charge pump to change its voltage conversion ratio.

[0009] In some embodiments, the controller includes a state machine implementing logic for causing the first transition and the second transition. These embodiments include embodiments in which the state machine is a synchronous Moore finite state machine, embodiments that rely on a Mealy finite state machine, embodiments in which the finite state machine is asynchronous, and embodiments in which the state machine receives a clock signal having an adaptive duration between clock pulses of the clock signal.

[0010] Other embodiments including a state machine include embodiments in which there are multiple possible transitions between buck mode and boost mode and the state machine inhibits some of the possible transitions. Likewise, the state machine is configured to allow only some of the possible transitions.

[0011] In some embodiments, the regulator can only increase the voltage supplied to it as a result of the first conversion. In such embodiments, the second conversion is allowed if and only if the voltage conversion ratio of the charge pump is not changed or increased.

[0012] In some embodiments, the regulator can only reduce the voltage supplied to it as a result of the first conversion. In these embodiments, the second conversion is allowed if and only if the voltage conversion ratio of the charge pump is not changed or reduced.

[0013] The present invention also includes variations that perform certain functions upon startup or enabling of the power converter or components thereof.

[0014] These variations include implementations in which, upon startup of the power converter, the controller selects an initial operating mode for the regulator based at least in part on a state of an output capacitor of the power converter.

[0015] Included among these embodiments are embodiments in which the controller ignores information indicative of operation of the power converter for a selected time interval after either of the first transition and the second transition.

[0016] Additional embodiments include embodiments in which the controller selects the first transition and the second transition such that the likelihood of a spurious transition between modes is reduced below a selected threshold.

[0017] Also included among these embodiments are embodiments in which the controller responds to a fault. These embodiments include embodiments in which the controller receives information indicating a fault and disables circuitry within the converter in response to such information. In still other of these embodiments, the controller receives information indicating that the fault is resolved and in response re-enables the circuitry within the converter. Embodiments include embodiments in which the circuitry is only a regulator, and embodiments in which the circuitry includes both a regulator and a charge pump. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] These and other features and advantages of the present invention will become apparent from the following detailed description and accompanying drawings, in which:

[0019] Figure 1 A power converter for stepping up a first voltage is shown;

[0020] Figure 2 shows a method for reducing the first voltage Figure 1 A variation of the power converter shown in;

[0021] Figure 3 Shows Figure 1 and Figure 2 An embodiment of an inductor based regulator as shown in;

[0022] Figure 4 Shows Figure 1 and Figure 2 An embodiment of a switched capacitor network as shown in ;

[0023] Figure 5 Shows Figure 1 and Figure 2 An embodiment of the controller shown in;

[0024] Figure 6 Shows Figure 5 An embodiment of the sensor block shown in;

[0025] Figure 7 Shown in Figure 1 State transitions during steady-state operation of the power converter shown in;

[0026] Figure 8 The MCU is shown embedded in a larger state machine for additional operations such as startup, soft start, shutdown and / or fault protection. Figure 7 state transition;

[0027] Fig. 9 showing a table indicating modes and voltage conversion ratios selected to avoid voltage induced stress on one or more switches in a regulator and / or charge pump; and

[0028] Fig.10 A table indicating the modes and voltage conversion ratios selected to improve power converter efficiency is shown. DETAILED DESCRIPTION

[0029] Figure 1 The circuit for receiving the input voltage V provided by the voltage source 12 is shown. IN And the input voltage V INis converted to an output voltage V available at the output capacitor 14 of the converter 10 and the load 15 OUT The power converter 10 includes a controller 16 that controls a regulator 18 and a charge pump 20. As used herein, the term "charge pump" refers to a switched capacitor network.

[0030] The power converter 10 may be a boost power converter or a buck power converter. In a boost power converter, the output voltage V OUT Exceeds input voltage V IN In a buck converter, the opposite is true.

[0031] exist Figure 1 In the embodiment, power converter 10 is a boost power converter, wherein regulator 18 receives an input voltage V IN . The regulator 18 then generates an intermediate voltage V X And the intermediate voltage V X Provided to the charge pump 20. The intermediate voltage V X is the input voltage to the charge pump 20. Typically, this is different from the input voltage to the power converter 10 overall.

[0032] Then, the charge pump 20 converts the intermediate voltage V X Converts to a ratio voltage V IN High output voltage V OUT .

[0033] The controller 16 receives a set of input signals and generates a set of output signals. Some of these input signals arrive along a first path P1. These input signals indicate the operation of the power converter. The controller 16 also receives an analog or digital clock signal CLK and an external signal IO. Based on the signals received by the controller 16, the controller 16 generates a first control signal CTRL MODE , the second control signal CTRL RATIO and the third control signal CTRL DUTY , the first control signal CTRL MODE , the second control signal CTRL RATIO and the third control signal CTRL DUTY The operation of the regulator 18 and the charge pump 20 are controlled together.

[0034] Figure 2 Shows Figure 1 The power converter 10 has some features that make the power converter 10 reduce its input voltage V IN Rather than making it higher. Figure 1 As in the case of FIG, controller 16 controls both regulator 18 and charge pump 20. However, in Figure 2In the embodiment, the charge pump 20 receives an input voltage V from the voltage source 12. IN Then, the charge pump 20 generates the intermediate voltage V X And the intermediate voltage V X Provided to the regulator 18, the regulator 18 converts the intermediate voltage V X Converted to output voltage V OUT .

[0035] In the illustrated embodiment, the regulator 18 is responsive to the first control signal CTRL MODE The inductor-based regulator switches between different operating modes. If the regulator 18 can only reduce its output voltage relative to its input voltage, the regulator 18 is said to operate in buck mode 26. If the regulator 18 can only increase its output voltage relative to its input voltage, the regulator 18 is said to operate in boost mode 24. If the regulator 18 can increase its output voltage relative to its input voltage, reduce its output voltage relative to its input voltage, or even keep its output voltage the same as its input voltage, the regulator 18 is said to be in buck-boost mode.

[0036] Figure 3 1 shows an embodiment of a regulator 18 that receives an input voltage across a first regulator terminal 41 and a second regulator terminal 42 and generates an output voltage across a third regulator terminal 43 and a fourth regulator terminal 44. In addition to the inductor L, the regulator 18 includes a first regulator switch S A , the second regulator switch S B , the third regulator switch S C and the fourth regulator switch S D The switch control circuit 40 controls the first control signal CTRL MODE and the third control signal CTRL DUTY to control these switches.

[0037] When the regulator 18 operates in the buck mode 26, the third regulator switch S is switched to ON throughout each switching cycle. C remains "ON", while the fourth regulator switch S D Keep "off". Based on the third control signal CTRL DUTY The switch-on time or duty cycle of the regulator 18 is determined, the first regulator switch S A Switches between "on" and "off". The second regulator switch S B can be turned on and off so that its state is consistent with the first regulator switch S A Some implementations of the regulator 18 omit the fourth regulator switch S D and replace the third regulator switch S with a direct connection to the third regulator terminal 43C .

[0038] When the regulator 18 operates in the boost mode 24, throughout each switching cycle, the first regulator switch S A remains "ON" while the second regulator switch S B Keep "off". According to the third control signal CTRL DUTY The on-time or duty cycle of the regulator 18 is determined, the fourth regulator switch S D Switches between "on" and "off". The third regulator switch S C can be turned on and off so that its state is consistent with the fourth regulator switch S D Some implementations omit the second regulator switch S B and replace the first regulator switch S with a direct connection to the first regulator terminal 41 A to reduce the number of switches to just two.

[0039] When the regulator 18 operates in the buck-boost mode, the third control signal CTRL DUTY During each switching cycle, the first regulator switch S A , the second regulator switch S B , the third regulator switch S C and the fourth regulator switch S D To switch between "on" and "off", some of the switches are switched at the same time, while some of the switches are switched at different times. The switch control circuit 40 controls all the regulator switches S A To S D The conversion is controlled and sequenced so that the combination is based on the first control signal CTRL MODE The first regulator switch S in the determined buck mode 26, boost mode 24 or buck-boost mode A , the second regulator switch S B , the third regulator switch S C and the fourth regulator switch S D any required dead time required during operation.

[0040] The charge pump 20 is either a single-phase charge pump or a multiphase charge pump. Examples of such charge pumps include Ladder, Dickson, Series-Parallel, Fibonacci, and Doubler, all of which can be adiabatically charged and configured into a multiphase network. A particularly useful charge pump is an adiabatically charged version of a full-wave cascade multiplier. However, non-adiabatic charging versions may also be used.

[0041] Figure 4An embodiment of a charge pump 20 that receives an input voltage across a first charge pump terminal 61 and a second charge pump terminal 62 and generates an output voltage across a third charge pump terminal 63 and a fourth charge pump terminal 64 is shown. The charge pump 20 is a single-phase symmetrical cascade multiplier having a first stack switch S1, a second stack switch S2, a third stack switch S3, a fourth stack switch S4, and a fifth stack switch S5, and a first phase switch S6, a second phase switch S7, a third phase switch S8, and a fourth phase switch S9. Wherein, the first stack switch S1, the third stack switch S3, and the fifth stack switch S5 define an "odd stack switch" group, and the second stack switch S2 and the fourth stack switch S4 define an "even stack switch" group. Similarly, the first phase switch S6 and the third phase switch S8 define an "even phase switch" group, and the second phase switch S7 and the fourth phase switch S9 define an "odd phase switch" group.

[0042] The charge pump 20 further includes a first capacitor C1, a second capacitor C2, a third capacitor C3 and a fourth capacitor C4. These capacitors together with the switches define stages within the charge pump 20.

[0043] The charge pump 20 shown has four stages. Each stage includes one of the capacitors C1, C2, C3, C4 and one of the four corresponding stack switches S1, S2, S3, S4. The first stage includes the first stack switch S1 and the first capacitor C1; the second stage includes the second stack switch S2 and the second capacitor C2; the third stage includes the third stack switch S3 and the third capacitor C3; and the fourth stage includes the fourth stack switch S4 and the fourth capacitor C4. Figure 4 In the embodiment shown, the maximum voltage conversion ratio is 5 because there are four stages.

[0044] In response to receiving the second control signal CTRL RATIO , the charge pump controller (CP controller) 66 places the operation control signals on the control signal path 60. These operation control signals cause the first stack switch S1, the second stack switch S2, the third stack switch S3, the fourth stack switch S4 and the fifth stack switch S5 and the first phase switch S6, the second phase switch S7, the third phase switch S8 and the fourth phase switch S9 to change states according to a specific sequence. Therefore, the charge pump 20 repeatedly switches between the first operation state and the second operation state at a specific frequency.

[0045] For example, during the first operating state, the charge pump controller 66 closes the odd stack switches S1, S3, S5 and the odd phase switches S7, S9 and opens the even stack switches S2, S4. Conversely, during the second operating state, the charge pump controller 66 opens the odd stack switches S1, S3, S5 and the odd phase switches S7, S9 and closes the even stack switches S2, S4 and the even phase switches S6, S8.

[0046] In addition, the charge pump controller 66 transmits a reconfiguration control signal to a reconfiguration input terminal B1 of the reconfiguration block 68. In response, the reconfiguration block 68 provides reconfiguration signals at its reconfiguration output terminals A1 to A3. These reconfiguration signals change the connections between the capacitors C1 to C4 in the first state and the second state.

[0047] The charge pump 20 is a charge pump that can be reconfigured so that the voltage conversion ratio of the charge pump 20 can be changed. The charge pump 20 responds to the second control signal CTRL RATIO Switching between different voltage conversion ratios. Each such voltage conversion ratio defines a charge pump mode.

[0048] In U.S. Patent No. 8,860,396, U.S. Patent No. 8,743,553, U.S. Patent No. 8,723,491, U.S. Patent No. 8,503,203, U.S. Patent No. 8,693,224, U.S. Patent No. 8,724,353, U.S. Patent No. 8,619,445, U.S. Patent No. 9,203,299, U.S. Patent No. 9,742,266, U.S. Patent No. 9,041,459, U.S. Publication No. 2017 / 0085172, U.S. Patent No. Suitable regulators and charge pumps are described in detail in U.S. Patent No. 9,887,622, U.S. Patent No. 9,882,471, PCT Publication No. WO2017161368, PCT Publication No. WO2017 / 091696, PCT Publication No. WO2017 / 143044, PCT Publication No. WO2017 / 160821, PCT Publication No. WO2017 / 156532, PCT Publication No. WO2017 / 196826 and U.S. Publication No. 2017 / 0244318.

[0049] The charge pumps and regulators described in the above references have switches that are opened and closed during normal operation. The action of opening and closing these switches is not equivalent to changing modes. The term "reconfiguration" explicitly excludes the opening and closing of these switches during normal operation. The opening and closing of such switches during normal operation can be used to achieve many functions. Among them, the more common functions are to achieve a specific voltage conversion ratio and regulate voltage, current and power flow for the purpose of causing a selected voltage conversion ratio or to cause voltage regulation.

[0050] In the context of the regulator 18, the term “mode” should be interpreted as the action of merely closing or opening a switch in the regulator 18 does not necessarily equate to a change in “mode.” For example, merely changing the duty cycle of a switch does not cause a change in “mode.” Similarly, when any switch in the regulator, alone or in combination with other switches, switches between opening and closing, this does not necessarily mean that the regulator 18 has switched between two modes.

[0051] The ability to reconfigure either or both of the regulator 18 and the charge pump 20 provides a way to extend the operating range of the power converter 10. The regulator 18 has only a limited operating range. Therefore, for a given charge pump mode, the degree of regulation required of the regulator 18 may exceed its operating range. By changing the operating mode of the charge pump, it becomes possible to reduce the demand on the regulator 18 so that the regulator 18 can continue to operate within its operating range. This in turn extends the operating range of the power converter 10 as a whole.

[0052] Typically, the output voltage V OUT is the result of having performed the first voltage conversion and the second voltage conversion. Regulator 18 performs the first voltage conversion, while charge pump 20 performs the second voltage conversion. The ordinal adjectives "first" and "second" are not meant to imply that one precedes the other. Figure 1 and Figure 2 As can be clearly seen from the comparison of FIG. 1 , the regulator 18 can be placed on either side of the charge pump 20 .

[0053] There are many output voltages V OUT These paths differ in the relative contributions of the charge pump 20 and the regulator 18. Although these paths all reach the same output voltage V OUT , but they are not completely equivalent.

[0054] For example, some combinations of the first voltage conversion and the second voltage conversion may cause the transistor implementing the switch to maintain a voltage above the rated value of the transistor. To avoid this, it will be beneficial to switch the charge pump 20 to a mode with a sufficiently high voltage conversion ratio so that the voltage across the transistor remains below the upper limit of the transistor.

[0055] Certain combinations of the first voltage conversion and the second voltage conversion also result in lower efficiency. For example, for a specific output voltage V OUT , so that the output voltage V OUT It is generally more efficient if most of the charge pump activity is the result of the activity of the charge pump rather than the regulator 18. Therefore, it is preferred to select a combination that provides such features.

[0056] On the other hand, in some cases, it is not desirable to change the direction of the voltage transition. The disadvantages of doing so may be so numerous that one would like to have the regulator 18 perform a larger voltage transition than a simple mathematical analysis would indicate is required.

[0057] For example, in a boost version of power converter 10, it is possible that if charge pump 20 exceeds the target voltage and regulator 18 operates in buck mode 26 to drop the voltage by a small amount, regulator 18 will perform a smaller voltage conversion. However, depending on the circumstances, it may be more efficient to have charge pump 20 boost the voltage to a value slightly below the target value and have regulator 18 boost the remainder of it. This may be the case even if the regulator's boost amplitude is slightly greater than the regulator's buck amplitude that would cause charge pump 20 to exceed the target value. Doing so avoids the inefficiencies that occur when regulator 18 and charge pump 20 do not perform voltage conversions in the same direction.

[0058] To reach the same target output voltage V OUT Different paths may result in poorer regulation accuracy than other paths. OUT Other paths may cause the regulator 18 to operate under an undervoltage or overvoltage condition. Therefore, the first control signal CTRL MODE and the second control signal CTRL RATIO It is beneficial to select a suitable voltage conversion ratio for the charge pump 20 and also a suitable mode for the regulator 18 .

[0059] In addition, to achieve the same target output voltage V OUT The different paths of voltage may result in regulator 18 having to regulate the voltage so that the output of the regulator is very close to, and in some cases equal to, the input voltage of regulator 18. This is best performed by operating regulator 18 in buck-boost mode.

[0060] Although the output voltage V OUT , but when operating in the buck-boost mode, the regulator 18 causes all four switches to change state during each operating cycle. Having so many switches change state tends to promote inefficiency. Therefore, it tends to be preferred to operate in either the buck mode 26 or the boost mode 24, in which only two of the regulator switches change state in each operating cycle.

[0061] Therefore, it is beneficial to avoid operating the regulator 18 in the buck-boost mode as much as possible. This can be done by providing the controller 16 with two degrees of freedom. Specifically, the controller 16 uses the first control signal CTRL MODE and the second control signal CTRL RATIO The appropriate voltage conversion ratio is selected for the charge pump 20 and also the appropriate mode for the regulator 18. This enables the regulator 18 to preferentially operate in either the buck mode 26 or the boost mode 24, thereby avoiding unnecessary operation in the less efficient buck-boost mode. The ability to avoid such unnecessary operation in the buck-boost mode occurs because the controller has the ability to also select, for either mode, a corresponding charge pump voltage conversion ratio that helps maintain a sufficient voltage difference between the regulator input voltage and the output voltage.

[0062] For the step-down version of the power converter 10, as Figure 2 As shown, the ability to reconfigure either or both of the regulator 18 and the charge pump 20 provides similar benefits in extending the operating range, operating within the transistor voltage ratings, or allowing the use of low voltage transistors as switches. Depending on the circumstances, it may be more efficient for the regulator 18 to operate in the buck mode 26. Doing so means that the voltage conversion in the entire buck power converter 10 is performed in the same direction.

[0063] For a given input voltage V IN and output voltage V OUT , increasing the voltage conversion ratio of the charge pump 20 so that the intermediate voltage V X This requires a higher steady-state duty cycle in buck mode 26 in order to maintain the output voltage V OUT Conversely, reducing the voltage conversion ratio of the charge pump 20 causes the intermediate voltage V X This requires a lower steady state duty cycle in buck mode 26 in order to maintain regulation.

[0064] According to the output voltage V OUTDepending on the size of the load 15 at the power converter 10 and the values ​​of the various components used in the power converter 10 (e.g., the inductor L, the charge pump capacitors C1 to C4, etc.), it may be more efficient for the regulator 18 in the buck mode 26 to operate at a higher duty cycle. MODE and the second control signal CTRL RATIO It is beneficial to select an appropriate voltage conversion ratio for the charge pump 20 and also an appropriate mode for the regulator 18 to maximize efficiency depending on load conditions and / or component value selection.

[0065] While efficiency is a desirable characteristic, it is not the only desirable characteristic. Sometimes it is desirable to give up some efficiency in order to gain a different performance advantage.

[0066] As an example, when operating in buck mode 26 as Figure 2 When the regulator 18 is shown, the charge pump 20 outputs a voltage lower than its input voltage. How much lower it is depends on the voltage conversion ratio of the charge pump 20. Therefore, increasing the voltage conversion ratio of the charge pump further reduces its output voltage, thereby also reducing the intermediate voltage V of the regulator 18. X This in turn reduces the differential voltage across the inductor L (i.e., V X -V OUT Since the rate of change of the current through the inductor L depends on the voltage difference across the inductor L (i.e., V X -V OUT ), so the reduced differential voltage across inductor L will hinder the ability of the inductor to quickly deliver current as needed. Therefore, if the load 15 suddenly increases, the reduced differential voltage across inductor L will limit its current accumulation or slew rate. Since this will rely on quickly supplying the new higher load 15, the output voltage V OUT It may not be as good as it could be.

[0067] To avoid this difficulty, it is desirable in this case to reduce the voltage conversion ratio of the charge pump 20. Doing so increases the intermediate voltage V X , and then increases the differential voltage across inductor L during the buck on-time. This larger differential voltage across inductor L gives inductor L the higher slew rate it needs to respond quickly to sudden changes in output load. This in turn can reduce the output voltage V that might otherwise occur. OUT any undershoot.

[0068] In this case, it is desirable to sacrifice efficiency in favor of a fast response. The described controller 16 provides functionality to make this tradeoff. This is accomplished by the controller 16 by allowing the first control signal CTRLMODE and the second control signal CTRL RATIO An appropriate voltage conversion ratio for the charge pump 20 and also an appropriate mode for the regulator 18 are selected in order to favor this transient response behavior over efficiency or in order to favor efficiency over this transient response behavior.

[0069] like Figure 5 As shown, controller 16 features a logic block 22, a sensor block 25, and a duty cycle control block 17. In some implementations, the A / D converter implements the sensor block 25 and the state machine implements the logic block 22. These structures cooperate to enable controller 16 to determine those modes of regulator 18 and charge pump 20 that best meet the user's performance requirements.

[0070] The controller 16 receives a clock signal CLK and an external signal IO. In addition, the controller 16 receives a first set of operating signals along a first path P1. The operating signals in the first set may be analog signals indicating the operation of the power converter. In the embodiment shown, the first set of operating signals includes an input voltage V IN , intermediate voltage V X and output voltage V OUT Whether all of these signals are used depends on the circuitry implemented by the sensor block 25 and the duty cycle control block 17 .

[0071] At each clock pulse, the logic block 22 receives a signal from the sensor block 25 and / or the duty cycle control block 17 and updates the first control signal CTRL MODE and the second control signal CTRLR RATIO The sensor block 25 receives a first set of operating signals along a first path P1, a second set of operating signals along a second path P2, and transmits a third set of operating signals along a third path P3 to the logic block 22. Whether the sensor block 25 uses both the first set of operating signals and the second set of operating signals or all signals within each set depends on the circuitry implemented within the sensor block 25.

[0072] The duty cycle control block 17 performs the regulation of the output voltage V OUT The duty cycle control block 17 receives the first set of operating signals along the first path P1, the clock signal CLK, the external signal IO and the signal along the bidirectional path P4. Whether all of these signals are used depends on the circuit implemented by the duty cycle control block 17. The duty cycle control block 17 generates a third control signal CTRL DUTY As the output of the duty cycle control block 17, the regulator 18 receives the third control signal CTRL from the duty cycle control block 17. DUTY , and by the third control signal CTRL DUTYThe duty cycle control block 17 is therefore part of a feedback control loop for the regulator 18.

[0073] like Figure 5 As shown, the duty cycle control block 17 also generates a compensation voltage V across the compensation capacitor. COMP The sensor block 25 receives this compensation voltage V at its compensation input. COMP .

[0074] exist Figure 5 In the specific embodiment shown, the duty cycle control block 17 also sends an output signal to the logic block 22 along the bidirectional path P4 to further optimize or adjust the first control signal CTRL MODE and the second control signal CTRLR RATIO .

[0075] There are many control methods for implementing the regulation function of the power converter 10. The selection of a particular control method in turn dictates the implementation of the duty cycle control block 17. Depending on the control method selected, the control loop may be linear or nonlinear, and the operating frequency may be fixed or variable. Linear controllers include voltage mode, peak current mode, valley current mode, and average current mode. Nonlinear controllers include V 2 , hysteresis, constant off-time, constant on-time, sliding, and bounding. To improve performance under different operating conditions, additional control methods can be used in conjunction with the main control method. For example, to improve light load performance, frequency foldback or pulse skipping can be used.

[0076] Alternative implementations include additional operating signals, examples of which include inductor current and phase node current. These can improve the accuracy of the decision at the expense of more chip area or increased complexity. In other implementations, the inputs also include fault detection circuitry, such as boost current limit and V X Undervoltage fault indicator. In this embodiment, the controller 16 disables some or all components of the power converter 10 when a fault is detected, and re-enables some or all components when the fault is detected to be resolved. For example, the components considered may include only the regulator 18 or both the regulator 18 and the charge pump 20.

[0077] For ease of implementation and operational robustness, logic block 22 is a synchronous Moore finite state machine that receives a clock signal CLK and uses the clock signal CLK to synchronize the first output signal and the second output signal with the operating signal. However, other implementations are possible. For example, some implementations are asynchronous. Other implementations rely on a Mealy finite state machine rather than a Moore finite state machine.

[0078] At each occurrence of a clock pulse, the logic block 22 generates a first control signal CTRL MODE and the second control signal CTRL RATIO The first control signal CTRL MODE and the second control signal CTRL RATIO Can be changed simultaneously or at different times.

[0079] The controller 16 provides a first control signal CTRL to the regulator 18 MODE According to the first control signal CTRL MODE , the regulator 18 changes its operating mode or remains in the same mode.

[0080] The controller 16 provides a second control signal CTRL to the charge pump 20 RATIO According to the second control signal CTRL RATIO , the voltage conversion ratio of the charge pump 20 changes or remains the same. The second control signal CTRL RATIO A voltage transformation ratio is selected from a group of available voltage transformation ratios.

[0081] Figure 6 An alternative embodiment of the sensor block 25 is shown. The sensor block 25 shown generates five voltages V that switch between a logic low level and a logic high level. A1 、V A2 、V A3 、V A4 、V A5 These five voltages can be used as indication inputs of the state machine or logic block 22. The sensor block 25 receives multiple signals: voltage V OUT 、V TH1 To V TH2 ; Current I TH1 ,I LX ; Binary code or word code of N bits in length (where N is an integer) VIN [N: 1], code VTH4 [N: 1]; and a signal indicating the internal or external temperature of the power converter 10. The circuits between the various inputs and outputs of the sensor block 25 convert each of the various inputs into a corresponding output or indication for use by the logic block 22. These circuits include a first voltage comparator 51, a second voltage comparator 52, a current comparator 53, a logic comparator 54, and a temperature sensor 56. The first voltage comparator 51 converts the output voltage V OUT With the first threshold voltage V TH1 The comparison is performed and the output indicates the output voltage V OUT Is it greater than the first threshold voltage V TH1 The voltage V A1 .

[0082] The second voltage comparator 52 monitors the output voltage V OUT The output indicates the output voltage V OUT Is the scaled version of greater than the second threshold voltage V TH2 The voltage V A2 . Output voltage V OUT The scaled version of is equal to the product of the output voltage and the digital coefficient coeff2, which can be equal to, greater than, or less than 1.0.

[0083] The current comparator 53 converts the inductor current I LX A scaled version of the threshold current I TH1 is compared and generates an indication of the inductor current I LX Is the scaled version of the current less than the threshold current I TH1 The voltage V A3 . Inductor current I LX The scaled version of the inductor current I LX The product with the scalar coefficient coeff3, the scalar coefficient coeff3 is selected from one of the following three intervals: (coeff3<1), (coeff3>1) and (coeff3=1).

[0084] The digital or logical comparator 54 receives a binary code or word code of N bits in length (where N is an integer). VIN [N: 1], code VTH4 [N:1] as its input. Each code or word is a binary representation of information indicating the operating condition of one or more of the regulator 18 and the charge pump 20, as well as the state or magnitude of various nodes in the overall power converter 10. The logic comparator 54 performs a digital or binary comparison between its inputs and outputs a voltage V A4 The voltage V A4 Indicates the logical relationship between the inputs of the logical comparator 54 .

[0085] The temperature sensor 56 receives a signal indicating the temperature. In some embodiments, the temperature sensor 56 receives the internal temperature or the external temperature of the power converter 10 as an input. The output of the temperature sensor 56 is a voltage V A5 , the voltage V A5 Indicates whether the temperature is above, below, or at a predetermined temperature threshold.

[0086] Since light energy can be considered to have an equivalent temperature, some embodiments feature a temperature sensor 56 implemented as a photodiode or light sensor. In this case, the sensor receives light external to the power converter 10 as input. This allows the controller 16 to change modes in response to a comparison between the ambient light level and a predetermined threshold.

[0087] Figure 7 The state transitions implemented by the logic block 22 when the power converter 10 is operating in a steady state are shown. In the particular example shown, the regulator 18 has two modes: a boost mode 24 and a buck mode 26. The first control signal CTRL MODE and the second control signal CTRL RATIO Limited conversion.

[0088] The first control signal CTRL MODE Indicates whether the mode of the regulator should be changed. Figure 7 The two possible modes are shown in FIG. 1 , so the first control signal CTRL MODE The second control signal CTRL RATIO Indicates whether the charge pump 20 should change mode. Therefore, the second control signal CTRL RATIO is a three-valued variable indicating whether the voltage conversion ratio should be increased, decreased, or kept unchanged. In an alternative implementation, the second control signal CTRL RATIO Including information indicating the desired voltage conversion ratio. In this implementation, it is possible to jump directly to the desired voltage conversion ratio.

[0089] For a given state of the regulator 18, some state transitions T3, T6, T9, T4, T7, and T10 cause the regulator 18 to maintain that same state at the next clock pulse. While maintaining the same regulator state, some transitions T3 and T4 also cause the charge pump 20 to maintain the same state, or maintain the same voltage conversion ratio. Other transitions T6 and T7 cause the regulator 18 to maintain the same state, but increase the voltage conversion ratio of the charge pump. Other transitions T9 and T10 cause the regulator 18 to maintain the same state, but decrease the voltage conversion ratio of the charge pump.

[0090] On the other hand, for a given state of the regulator 18, certain other state transitions T1, T2, T5 and T8 change the mode of the regulator at the next clock pulse. Figure 5 The logic block 22 shown in FIG. 1 reduces the degree of freedom for otherwise reconfiguring the charge pump 20. Specifically, the logic block 22 prohibits state transitions that result in a change in the voltage conversion ratio in a prohibited direction.

[0091] for Figure 1In the example of a boost converter, when the regulator 18 is operating in the buck mode 26, there is a state transition T1 for switching to the boost mode 24 while keeping the voltage conversion ratio of the charge pump 20 constant. There is also a state transition T8 for switching to the boost mode 24 while reducing the voltage conversion ratio. On the other hand, there is no transition for switching to the boost mode 24 while increasing the voltage conversion ratio.

[0092] Conversely, when the regulator 18 is operating in the boost mode 24, there is a state transition T2 for switching to the buck mode 26 while keeping the voltage conversion ratio of the charge pump 20 constant. There is also a state transition T5 for switching to the buck mode 26 while increasing the voltage conversion ratio. On the other hand, there is no transition for switching to the buck mode 26 while reducing the voltage conversion ratio.

[0093] As an example, suppose Figure 1 The power converter 10 shown in FIG. 1 is generating a power supply voltage higher than a given input voltage V IN The output voltage V OUT When the regulator 18 is in the buck mode 26, the intermediate voltage V at the output of the regulator 18 is reduced due to the reduction of the voltage conversion ratio of the charge pump 20. X Increase, so if the voltage conversion ratio of the charge pump 20 remains unchanged or decreases, it allows switching to the boost mode 24. Conversely, when the regulator 18 is in the boost mode 24, the intermediate voltage V at the output of the regulator 18 is increased due to the increase in the voltage conversion ratio of the charge pump 20. X decreases, thus allowing a transition to step-down mode 26 if the voltage conversion ratio of the charge pump 20 remains the same or increases.

[0094] As another example, suppose Figure 2 The power converter 10 shown in FIG. 1 is generating a power supply voltage lower than a given input voltage V IN The output voltage V OUT When the regulator 18 is in the buck mode 26, the intermediate voltage V at the output of the regulator 18 is increased due to the increase in the voltage conversion ratio of the charge pump 20. X is reduced, thus allowing a switch to the boost mode 24 if the voltage conversion ratio of the charge pump 20 remains unchanged or increases. Conversely, if the regulator 18 is in the boost mode 24, the intermediate voltage V at the output of the regulator 18 is reduced due to the reduction in the voltage conversion ratio of the charge pump 20. X increases, thus allowing a transition to step-down mode 26 if the voltage conversion ratio of the charge pump 20 remains the same or decreases.

[0095] like Figure 7 As shown, logic block 22 determines whether and when regulator 18 in one mode should change to another mode. Figure 7The state transitions shown in do not specify which of the two modes 24, 26 should be selected when initially starting up power converter operation.

[0096] When the power converter 10 is started again after having been shut down, some mechanism is needed to determine which mode the regulator 18 should start in. Until then, it will not be possible to determine the mode in which the regulator 18 should start. Figure 7 Logic block 22 is operated by the state changes shown in FIG.

[0097] One solution is to arbitrarily assign the start-up mode of the regulator. A suitable choice is buck mode 26. Then, one can rely on logic block 22 to perform Figure 7 The states shown in change to correct the mode as required.

[0098] Another approach is to check the output capacitor 14 at start-up and assign an initial mode of the regulator based on this check.

[0099] When the power converter 10 is turned off, the charge on the output capacitor 14 does not necessarily disappear. In some cases, the charge can persist. In this case, it is possible to start directly in the boost mode 24 instead of starting in the buck mode 26. In other cases, the power converter 10 will discharge the output capacitor 14 as part of the shutdown process. In those cases, it is preferable to start in the buck mode 26 and later switch to the boost mode 24.

[0100] For a controller 16 that is applicable to each type of power converter 10 , it is beneficial to provide logic to the logic block 22 to select a startup mode for the regulator based at least in part on the state of the output capacitor 14 at startup.

[0101] Figure 8 An off state 28 and a soft start state 30 are shown. Figure 8 Also includes Figure 7 The state of the buck mode 26 and the state of the boost mode 24 are shown in FIG. Figure 7 The state transitions already shown in belong only to steady-state operation, and therefore those state transitions have been omitted for the sake of clarity.

[0102] When power converter 10 is in shutdown state 28, power converter 10 may remain in shutdown state or transition to soft start state 30 depending on other state machine inputs including, for example, whether power converter 10 is enabled or disabled or if any faults exist. Figure 8A state transition T20 is shown in which the power converter 10 remains in the off state 28. In this case, no change in either the voltage conversion ratio or the regulator mode is required. Therefore, this state transition T20 does not require a change in either the voltage conversion ratio or the regulator mode.

[0103] After being enabled, the power converter 10 determines whether there is a charge on the output capacitor 14 and whether the charge is proportional to other voltages within the power converter 10, such as the intermediate voltage V X Or the input voltage V IN This relationship can be determined in several ways. In some embodiments, the controller 16 receives the intermediate voltage V X Or the input voltage V IN In other embodiments, the voltage at the output capacitor 14 is equal to the intermediate voltage V X There is a known relationship between and. These embodiments include embodiments in which the charge pump 20 defaults to an initial charge pump ratio at startup. In this case, the intermediate voltage V can be easily inferred from the voltage at the output capacitor 14. X .

[0104] If the charge present causes the intermediate voltage V X Lower than the input voltage V IN , then state transition T22 can cause the regulator 18 to start in buck mode 26. Otherwise, if the charge present causes the intermediate voltage V X Higher than the input voltage V IN , then state transition T23 causes the regulator 18 to start in boost mode 24. Figure 7 Continue with further operations.

[0105] Some embodiments feature a transition T21 from the off state 28 to the soft start state 30. This transition T21 assigns a default startup mode, such as buck mode 26, to the regulator 18 if the output capacitor 14 is detected to be fully discharged when the power converter is enabled. While in the soft start state 30, the logic block 22 periodically checks the output capacitor 14. If the charge on the output capacitor 14 is such that the default mode is considered optimal, the logic block 22 executes a transition T24 that maintains that state. Otherwise, the state machine executes a transition T25 that keeps the regulator mode in buck mode 26 without changing the voltage conversion ratio of the charge pump; or executes a transition T26 that switches to boost mode 24 but reduces the voltage conversion ratio.

[0106] Fig. 9 and Fig.10 shows an input voltage V intended to span 4.5 volts to 15 volts INrange and provides an output voltage V in the range of 10 volts to 45 volts OUT Each cell in the table corresponds to a specific input voltage V IN and the corresponding desired output voltage V OUT For each such combination, it is desirable for the logic block 22 to specify the mode of the charge pump and the mode of the regulator. In this example, the logic block 22 may also be implemented using a lookup table or a memory.

[0107] Assume that corresponds to Figures 9 and 10 The charge pump 20 has two modes: a first mode in which the voltage at its input is doubled (double); and a second mode in which the voltage at its input is tripled (triple). The input of the charge pump 20 is the intermediate voltage V X .

[0108] In general, the charge pump 20 operates more efficiently with twice its input than with twice its input. The shaded cells correspond to cells in which the charge pump 20 operates in this more efficient mode. Fig. 9 , logic block 22 implements the following logic: This logic selects the mode only to avoid applying an output voltage V greater than 37.5 volts or 18.75 volts across the regulator and charge pump transistors when the charge pump 20 is doubling its input voltage. OUT .exist Fig.10 , logic block 22 implements logic that adds an additional constraint to select a more efficient charge pump mode when possible. Fig.10 Rather than Fig. 9 This leads to higher efficiency over more of the power converter’s operating range.

[0109] A difficulty that may arise in connection with changing modes is mode oscillation. Mode oscillation may occur because the first set of operating signals may have significant transients or require significant settling time in the brief period after the mode has been changed. This may cause the controller 16 to erroneously believe that the mode needs to be changed again. It will then provide a new first control signal CTRL immediately or very soon after the first mode change. MODE and the second control signal CTRL RATIO , thus exacerbating the problem by causing another round of signal transients. This can result in parasitic mode changes or even mode oscillations that persist indefinitely.

[0110] One way to suppress the possibility of mode oscillation is to impose a blackout period during which the new mode is frozen. This can be achieved by having the controller 16 ignore the second set of operating signals for some limited period of time. One way to achieve this is to adaptively control the clock pulses provided to the controller 16 so that immediately after the mode change, the next clock pulse is delayed by the desired blackout period.

[0111] Another way to suppress the possibility of mode oscillation is to avoid the possibility of causing the intermediate voltage V X Mode changes that exceed the regulation capability of the regulator. For example, in the transition from buck mode 26 to boost mode 24, it should be avoided that the intermediate voltage V X Cannot exceed input voltage V IN Conversely, in the transition from boost mode 24 to buck mode 26, it should be avoided that the intermediate voltage V X Exceeds input voltage V IN Reconfiguration event. Mainly to achieve Figure 7 Some theoretically permissible methods of switching between buck mode 26 and boost mode 24 have been omitted.

[0112] Yet another way of suppressing the possibility of mode oscillations relies on selecting the mode so that the intermediate voltage V X The average value of has sufficient margin so that even with the addition of ringing or transient effects, additional mode changes are unlikely to occur. Specifically, for any margin, there is a possibility of a parasitic transition caused by ringing of one or more of the first set of operating signals. The margin is selected so that the probability of such a transition drops below a predetermined threshold.

[0113] for Figure 1 In the example of a boost converter, the state transition of the regulator 18 from the buck mode 26 to the boost mode 24 also reduces the voltage conversion ratio of the charge pump, thereby increasing the intermediate voltage V X This will tend to "park" the regulator 18 deeper into the boost mode 24, making a parasitic transition to the buck mode 26 less likely to occur. Conversely, a state transition that causes the regulator 18 to switch from the boost mode 24 to the buck mode 26 will increase the voltage conversion ratio of the charge pump. This will have the opposite effect, namely reducing the intermediate voltage V X This in turn tends to park regulator 18 deeper into buck mode 26, making a parasitic transition to boost mode 24 less likely to occur. In either case, because output capacitor 14 is typically much larger than any capacitor within charge pump 20, output voltage V OUTRemain relatively unchanged.

[0114] In some embodiments, the computer-accessible storage medium includes a database representing one or more components of power converter 10. For example, the database may include data representing charge pumps that have been optimized to facilitate low-loss operation of charge pump 20.

[0115] Generally speaking, computer-accessible storage media may include any non-transitory storage media that can be accessed by a computer during use to provide instructions and / or data to the computer. For example, computer-accessible storage media may include storage media such as magnetic or optical disks, and semiconductor memories.

[0116] Typically, the database representing the system can be a database or other data structure that can be read by a program and used directly or indirectly to manufacture the hardware including the system. For example, the database can be a behavioral level description of the hardware functions in a high-level design language (HDL) such as Verilog or VHDL or a register transfer level (RTL) description. The description can be read by a synthesis tool, which can synthesize the description to generate a netlist including a list of gates from a synthesis library. The netlist includes a collection of gates that also represent the functions of the hardware including the system. The netlist is then placed and routed to generate a data set describing the geometry to be applied to the mask. The mask can then be used in various semiconductor manufacturing steps to generate one or more semiconductor circuits corresponding to the system. In other examples, alternatively, the database itself can be a netlist (with or without a synthesis library) or a data set.

Claims

1. An apparatus comprising a controller configured to control operation of a power converter in which a regulator operable in a plurality of regulator modes is connected to a charge pump operable in a plurality of charge pump modes, wherein: The controller is configured to receive information indicative of operation of the power converter and to cause a first transition and a second transition based at least in part on the information, wherein the first transition is between regulator modes and wherein the second transition is between charge pump modes, Wherein, as a result of the first conversion, the regulator is capable of increasing the voltage supplied to the regulator, wherein the second conversion is allowed in response to a condition selected from a group consisting of a first condition and a second condition being true, wherein the first condition is a condition that the second conversion does not change the voltage conversion ratio of the charge pump, and wherein the second condition is a condition that the voltage conversion ratio of the charge pump is reduced.

2. The device according to claim 1, wherein: The controller is configured to cause the first transition and the second transition simultaneously.

3. The device according to claim 1, wherein: The controller is configured to cause the first transition and the second transition sequentially.

4. The device according to claim 1, wherein: Causing the first transition includes causing the regulator to transition between operating in a buck mode and operating in a boost mode.

5. The device according to claim 1, wherein: Causing the first transition includes causing the regulator to transition between two modes selected from the group consisting of a buck mode, a boost mode, and a buck-boost mode.

6. The device according to claim 1, wherein: Causing the second switching includes causing the charge pump to change its voltage conversion ratio.

7. The device according to claim 1, wherein: The controller includes a state machine implementing logic for causing the first transition and the second transition.

8. The device according to claim 1, wherein: The controller includes a synchronous Moore finite state machine.

9. The device according to claim 1, wherein: The controller includes a state machine receiving a clock signal having an adaptive duration between clock pulses of the clock signal.

10. The device according to claim 1, wherein: The controller includes a Mealy finite state machine.

11. The device according to claim 1, wherein: The controller includes an asynchronous state machine.

12. The device according to claim 1, wherein: There are a plurality of possible transitions between the buck mode and the boost mode, and wherein the controller comprises a state machine configured to allow only some of the possible transitions.

13. The device according to claim 1, wherein: Upon startup of the power converter, the controller is configured to select an initial operating mode for the regulator based at least in part on a state of an output capacitor of the power converter.

14. The device according to claim 1, wherein: During a selected time interval after one of the first transition and the second transition, the controller is configured to ignore information indicative of operation of the power converter.

15. The device according to claim 1, wherein: The controller is configured to select the first transition and the second transition such that a likelihood of parasitic transitions between modes is reduced below a selected threshold.

16. The device according to claim 1, wherein The information includes information indicative of the presence of a fault, and wherein, in response to the information indicative of the presence, the controller is further configured to disable circuitry within the power converter.

17. The device according to claim 1, wherein: The information includes information indicative of a resolution of the fault, and wherein, in response to the information indicative of the resolution, the controller is further configured to re-enable disabled circuitry within the power converter.

18. The device according to claim 1, wherein: The circuit system is selected from the group consisting of: the regulator; and both the regulator and the charge pump.

19. An apparatus comprising a controller configured to control operation of a power converter in which a regulator operable in a plurality of regulator modes is connected to a charge pump operable in a plurality of charge pump modes, wherein: The controller is configured to receive information indicative of operation of the power converter and to cause a first transition and a second transition based at least in part on the information, wherein the first transition is between regulator modes and wherein the second transition is between charge pump modes, wherein the controller comprises a state machine implementing logic for causing the first conversion and the second conversion, wherein, as a result of the first conversion, the regulator is only capable of reducing the voltage supplied thereto, wherein the second conversion is permitted if and only if a condition selected from a group consisting of a first condition and a second condition is true, wherein the first condition is a condition that the second conversion does not change the voltage conversion ratio of the charge pump, and the second condition is a condition that the voltage conversion ratio of the charge pump is increased.

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