Needle-cell Trench MOSFET

Abstract

A needle-cell trench MOSFET. A power semiconductor die (100) having a semiconductor body (190) coupled to a first load terminal (101) and a second load terminal (102) of the power semiconductor die (100) and configured to conduct a load current between the load terminals (101, 102). The die further comprises: a control trench structure (110); and a plurality of power cells (120). At least one of the power units (120) includes: a portion (191) of a drift region of a first conductivity type, a portion (192) of a channel region of a second conductivity type, and a portion (193) of a source region of a first conductivity type; a control portion; a columnar field plate trench (130) extending into the semiconductor body (190) along a vertical direction (Z) and including a field plate electrode (131) electrically coupled to a first load terminal (101), the columnar field plate trench (130) having a deep portion (136) below the channel region portion (192) and a proximal portion (135) above the deep portion (136).

Description

Technical Field

[0001] The present description relates to embodiments of power semiconductor dies and to embodiments of methods of processing power semiconductor dies. In particular, the present description relates to embodiments of MOSFETs having field plate electrodes included in needle-shaped cell trenches and to corresponding embodiments of processing methods. Background Art

[0002] Modern devices in automotive, consumer and industrial applications rely on power semiconductor devices for many functions, such as converting electrical energy and driving electric motors or motors.

[0003] For example, insulated gate bipolar transistors (IGBTs), metal oxide semiconductor field effect transistors (MOSFETs), and diodes, to name a few, have been used in a variety of applications including, but not limited to, switches in power supplies and power converters.

[0004] A power semiconductor device typically includes a power semiconductor die configured to conduct a load current along a load current path between two load terminals of the device. A first load terminal (e.g., a source terminal) may be disposed at a front side of the die, and a second load terminal (e.g., a drain terminal) may be disposed at a back side of the die. The die may be included in a package of the power semiconductor device, wherein such a package may provide electrical connections to the load terminals.

[0005] Furthermore, the load current path may be controlled by means of a control electrode, usually referred to as a gate electrode. For example, upon receiving a corresponding control signal from eg a driver unit, the control electrode may set the power semiconductor die into one of a conducting state and a blocking state.

[0006] In order to conduct the load current, the power semiconductor die may have one or more power cells, which may be arranged in the so-called active area of ​​the power semiconductor device. For example, in the active area, one or more power cells are electrically connected to the front-side load terminals.

[0007] The active area can be configured to have a stripe pattern, according to which the power cells extend in a stripe-like manner across the entire active area or a substantial portion thereof, or the active area can be configured to have a honeycomb / grid pattern, according to which the power cells exhibit a columnar design (also known as a "needle design") and are distributed within the active area.

[0008] The present specification relates to the latter case, i.e., to a die having an active area in which cells are arranged according to a grid pattern. For example, according to such a grid pattern, the gate channels may form grid openings (e.g., a grid grid), and each grid opening may spatially confine a power cell. For example, the gate channels extend longitudinally in the active area along linear lines that intersect each other perpendicularly. In addition, in each grid opening, a columnar (e.g., needle-shaped) groove may be arranged, which accommodates a columnar (e.g., needle-shaped) groove electrode connected to a different potential than the gate electrode in the gate groove.

[0009] The power semiconductor die is laterally limited by the die edge, and between the die edge and the active area, a so-called edge termination region is usually arranged. In relation to the power semiconductor die, such an edge termination region is also referred to as a "high voltage termination structure", and it may help to support the voltage handling capability of the power semiconductor die, for example, by processes that influence the electric field within the semiconductor die, for example in order to ensure a reliable blocking capability of the power semiconductor die.

[0010] A reliable blocking capability is desirable. To this end, corresponding field plate electrodes may be arranged in one or more power cells.

[0011] On the other hand, a high density of power cells within the active area may be desirable in terms of handling high load currents with low conduction losses. Summary of the invention

[0012] According to some embodiments described herein, at least for one of the power cells of the needle trench MOSFET, it is proposed to include a field plate electrode in a columnar field plate trench, the columnar field plate trench having an elongated upper (proximal) portion close to the channel region of the power cell, and the columnar field plate trench increases in width along its extension in the vertical direction, thereby showing a thicker deep portion. Thus, in the upper portion of the semiconductor body, the needle trench MOSFET (in which an inversion channel is introduced to conduct the load current) can achieve a small cell pitch and thus a high total power cell density. At the same time, due to the increased width of the columnar field plate trench, a sufficiently large field plate electrode can be included in the columnar field plate trench, thereby ensuring a reliable blocking capability.

[0013] According to an embodiment, a power semiconductor die has a semiconductor body coupled to a first load terminal and a second load terminal of the power semiconductor die and configured to conduct a load current between the load terminals. The die further comprises: a control trench structure for controlling the load current, the control trench structure extending into the semiconductor body in a vertical direction and arranged according to a horizontal grid pattern having a plurality of grid openings; a plurality of power cells, each power cell being at least partially arranged in a corresponding one of the plurality of grid openings in a horizontal cross section. At least one of the power units includes: a portion of a drift region of a first conductivity type, a portion of a channel region of a second conductivity type, and a portion of a source region of the first conductivity type, wherein the channel region portion is electrically connected to a first load terminal and isolates the source region portion from the drift region portion; a control portion having at least one control electrode portion in a control trench structure; a columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to the first load terminal, the columnar field plate trench having a deep portion below the channel region portion and a proximal portion above the deep portion, the proximal portion vertically overlapping the channel region portion, wherein a deep horizontal width of the deep portion is equivalent to at least 110% of a proximal horizontal width of the proximal portion.

[0014] According to another embodiment, a power semiconductor die has a semiconductor body coupled to a first load terminal and a second load terminal of the power semiconductor die and configured to conduct a load current between the load terminals. The die further includes: a control trench structure for controlling the load current, the control trench structure extending into the semiconductor body in a vertical direction and arranged according to a horizontal grid pattern having a plurality of grid openings; a plurality of power cells, each power cell being at least partially arranged in a corresponding one of the plurality of grid openings in a horizontal cross section. Each power cell includes: a portion of a drift region of a first conductivity type, a portion of a channel region of a second conductivity type, and a portion of a source region of a first conductivity type, wherein the channel region portion is electrically connected to the first load terminal and isolates the source region portion from the drift region portion; a control portion having at least one control electrode portion in the control trench structure; a columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to the first load terminal. The horizontal distance between two columnar field plate trenches of two adjacent power cells in the plurality of power cells is reduced by at least 10% in the vertical direction.

[0015] According to another embodiment, a method for processing a power semiconductor die is presented. The power semiconductor die has a semiconductor body that is coupled to a first load terminal and a second load terminal of the power semiconductor die and is configured to conduct a load current between the load terminals. The method includes: forming a control groove structure for controlling the load current, the control groove structure extending into the semiconductor body in a vertical direction and arranged according to a horizontal grid pattern having a plurality of grid openings; forming a plurality of power cells, each power cell being at least partially arranged in a corresponding one of the plurality of grid openings in a horizontal cross section, and including: a portion of a drift region of a first conductivity type, a portion of a channel region of a second conductivity type, and a portion of a source region of a first conductivity type, wherein the channel region portion is electrically connected to the first load terminal and isolates the source region portion from the drift region portion; and a control portion having at least one control electrode portion in the control groove structure. The method further includes: forming a columnar field plate trench in at least one of the power cells, the columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to the first load terminal, the columnar field plate trench having a deep portion below the channel region portion and a proximal portion above the deep portion, the proximal portion vertically overlapping the channel region portion, wherein a deep horizontal width of the deep portion is equivalent to at least 110% of a proximal horizontal width of the proximal portion.

[0016] According to yet another embodiment, a method for processing a power semiconductor die is presented. The power semiconductor die has a semiconductor body that is coupled to a first load terminal and a second load terminal of the power semiconductor die and is configured to conduct a load current between the load terminals. The method includes: forming a control groove structure for controlling the load current, the control groove structure extending into the semiconductor body in a vertical direction and arranged according to a horizontal grid pattern having a plurality of grid openings; forming a plurality of power cells, each power cell being at least partially arranged in a corresponding one of the plurality of grid openings in a horizontal cross section, and including: a portion of a drift region of a first conductivity type, a portion of a channel region of a second conductivity type, and a portion of a source region of a first conductivity type, wherein the channel region portion is electrically connected to the first load terminal and isolates the source region portion from the drift region portion; and a control portion having at least one control electrode portion in the control groove structure. The method further includes forming a columnar field plate trench in each power cell, the columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to the first load terminal, wherein a horizontal distance between two columnar field plate trenches of two adjacent power cells among the plurality of power cells decreases by at least 10% in the vertical direction.

[0017] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The parts in the drawings are not necessarily to scale, but the emphasis is placed on illustrating the principles of the present invention. Moreover, in the drawings, the same reference numerals indicate corresponding parts. In the drawings:

[0019] Figure 1 schematically and exemplarily illustrates a portion of a horizontal projection of a power semiconductor die according to one or more embodiments;

[0020] Figure 2 schematically and exemplarily illustrates a portion of a vertical cross-section of a power semiconductor die according to one or more embodiments;

[0021] Figure 3A -C each schematically and exemplarily illustrates a portion of a vertical cross-section of a power semiconductor die according to some embodiments; and

[0022] Figure 4 AB each schematically and exemplarily illustrates a portion of a vertical cross-section of a power semiconductor die according to some embodiments. DETAILED DESCRIPTION

[0023] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced.

[0024] In this regard, directional terms such as "top", "bottom", "front", "back", "backside", "in front of", "behind", "below", "above", etc. may be used with reference to the orientation of the drawings being described. Because the various portions of the embodiments may be positioned in a number of different orientations, the directional terms are used for illustrative purposes and are in no way limiting. It is to be understood that other embodiments may be utilized and that structural or logical changes may be made without departing from the scope of the present invention. Therefore, the following detailed description is not to be considered in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0025] Reference will now be made in detail to various embodiments, one or more examples of which are illustrated in the accompanying drawings. Each example is provided as an explanation and is not meant to be a limitation of the present invention. For example, a feature illustrated or described as part of one embodiment may be used on other embodiments or in combination with other embodiments to produce yet other embodiments. It is intended that the present invention includes such modifications and variations. Examples are described using specific language, which should not be interpreted as limiting the scope of the appended claims. The drawings are not to scale and are for illustrative purposes only. For clarity, the same elements or manufacturing steps have been indicated by the same reference numerals in different drawings unless otherwise stated.

[0026] The term "horizontal" as used in this specification is intended to describe an orientation substantially parallel to a horizontal surface of a semiconductor substrate or semiconductor structure. This may be, for example, the surface of a semiconductor wafer or die or chip. For example, the (first) lateral direction X and the (second) lateral direction Y mentioned below may both be horizontal directions, wherein the first lateral direction X and the second lateral direction Y may be perpendicular to each other.

[0027] The term "vertical" used in this specification is intended to describe an orientation that is arranged substantially perpendicular to a horizontal surface (i.e., parallel to the normal direction of the surface of the semiconductor wafer / chip / die). For example, the extension direction Z mentioned below can be an extension direction perpendicular to both the first lateral direction X and the second lateral direction Y.

[0028] In the context of this specification, the terms "ohmic contact", "electrical contact", "ohmic connection" and "electrical connection" are intended to describe a low-ohmic electrical connection or a low-ohmic current path between two regions, parts, zones, portions or components of a device described herein.

[0029] Furthermore, in the context of this specification, the term "contact" is intended to describe the presence of a direct physical connection between two elements of a corresponding semiconductor device; for example, the transition between two elements that are in contact with each other may not include additional intermediate elements, etc.; that is, the two elements may be in contact with each other.

[0030] Furthermore, in the context of this specification, if not stated otherwise, the term "electrically insulated" is used in the context of its generally valid understanding, and is therefore intended to describe two or more components that are located separately from each other and have no ohmic connection connecting those components. However, components that are electrically insulated from each other can still be coupled to each other, such as mechanically coupled and / or capacitively coupled and / or inductively coupled. For example, two electrodes of a capacitor can be electrically insulated from each other and at the same time mechanically and capacitively coupled to each other, such as by means of an insulator (e.g., a dielectric).

[0031] In this specification, n-doping is referred to as the "first conductivity type" and p-doping is referred to as the second conductivity type. Alternatively, the opposite doping relationship may be adopted, so that the first conductivity type may be p-doped and the second conductivity type may be n-doped.

[0032] Certain embodiments described in this specification pertain to, but are not limited to, power semiconductor dies, such as power semiconductor dies that may be used within a power converter or power supply. For example, the power semiconductor dies described herein are configured to be employed within a power rectifier or within a power inverter, such as within a synchronous power rectifier or power inverter. For example, such a rectifier / inverter is used as part of a motor drive. Thus, in embodiments, the power semiconductor dies described herein may be configured to transmit a portion of a current to be fed to a load and / or provided by a power supply, respectively.

[0033] Therefore, the term "power semiconductor die" as used in this specification is intended to describe a single die having a high voltage blocking capability and / or a high current carrying capability. In other words, such a power semiconductor die is intended for high currents, typically in the ampere range, e.g., up to 5 or 300 amperes, and / or high voltages, the high currents being typically above 15 V, more typically up to 400 V and above, e.g., up to or above at least 500 V, e.g., at least 600 V. In addition, the power semiconductor die described herein may be configured for high switching frequencies, e.g., for switching frequencies of at least 100 kHz and up to 2 MHz.

[0034] For example, the power semiconductor die described below may be a die configured to be employed as a power component in low voltage, medium voltage, and / or high voltage applications.

[0035] Additionally, the term "power semiconductor die" as used in this specification does not refer to logic semiconductor devices that are used, for example, to store data, compute data, and / or other types of semiconductor-based data processing.

[0036] For example, the die may include one or more active power cells, such as monolithically integrated transistor cells, for example monolithically integrated MOSFET cells and / or derivatives thereof. A plurality of such power cells may be integrated in the die.

[0037] According to the embodiments described herein, the power semiconductor die includes a power cell of a columnar / needle type. For example, the power cell is not of a stripe type. The columnar / needle type cells may each include at least one columnar groove, for example, a columnar field plate groove. For example, according to such a columnar / needle configuration, the total lateral extension of each columnar / needle power cell along each of the first lateral direction X and the second lateral direction Y is only equivalent to a small portion of the total lateral extension of the first lateral direction X and the second lateral direction Y of the power semiconductor die. For example, the total lateral extension of the corresponding columnar / needle unit is equivalent to less than 1% or even less than 0.05% of the total extension of the power semiconductor die along one of the first lateral direction X and the second lateral direction Y. For example, a die having a side length of about 4 mm along the first lateral direction X and a typical cell spacing of about 2 μm results in a total lateral extension of the corresponding columnar / needle unit of about 2 / 4000 = 0.05% of the total extension of the die along the first lateral direction X. In addition, each columnar / needle-shaped unit may exhibit a rectangular (e.g., square horizontal cross section, e.g., rectangular horizontal cross section with rounded corners) or an elliptical horizontal cross section, or a circular horizontal cross section, or a polygonal (e.g., an octagonal or hexagonal horizontal cross section) parallel to the XY plane. Such a cross-sectional process may be defined by means of a grid pattern controlling the groove structure, as will become more apparent from the description of the accompanying drawings.

[0038] In an embodiment, each columnar / needle-shaped power unit has a maximum lateral extension and a maximum vertical extension, wherein the maximum lateral extension is less than 1 / 2, 1 / 3, 1 / 4 or 1 / 5 of the maximum vertical extension, or even less than 1 / 6 of the maximum vertical extension. For example, the maximum vertical extension is defined by the total extension of the columnar field plate trenches (as mentioned below) along the vertical direction of the corresponding columnar / needle-shaped power unit.

[0039] In the following, the term power cell refers to a column / pin-shaped power cell, for example, as exemplarily defined above.

[0040] As used herein, the term "needle-like" includes, but is not limited to, designs according to which the groove bottom is gradually tapered (like a needle); more specifically, the term "needle" also includes those designs according to which the groove bottom is substantially flat (e.g., extending horizontally).

[0041] Figure 1 A portion of a horizontal projection of a power semiconductor die 100 according to one or more embodiments is schematically and exemplarily illustrated. Figure 2 A portion of a vertical cross section of a power semiconductor die 100 according to one or more embodiments is schematically and exemplarily illustrated. Figure 1 and Figure 2 Both.

[0042] The power semiconductor die has a semiconductor body 190 coupled to a first load terminal 101 and a second load terminal 102 of the power semiconductor die 100. The die 100 may be a MOSFET and thus the first load terminal 101 may be a source (emitter) terminal and the second load terminal 102 may be a drain (collector) terminal.

[0043] The first load terminal 101 may be arranged at the front side of the die 100, and the second load terminal 102 may be arranged at the back side of the die 100. The front side of the die 100 may be close to the upper surface 1900 of the semiconductor body 190. For example, the first load terminal 101 includes front side metallization, and the second load terminal 102 includes back side metallization.

[0044] The semiconductor body 190 is configured to conduct a load current, for example a load current of at least 5 A, 10 A, at least 50 A, or even more than 100 A, between the load terminals 101 , 102 .

[0045] The die 100 includes a control trench structure 110 for controlling a load current. The control trench structure 110 extends into the semiconductor body 190 along a vertical direction Z and is arranged according to a horizontal grid pattern 115 having a plurality of grid openings 116, such as Figure 1 As shown in the figure.

[0046] The control trench structure 110 may comprise a control electrode 111 which is electrically insulated from the semiconductor body 190, for example by means of a control trench insulator 112. The control electrode 111 may be coupled to an output of a driver unit (not shown) and, in response to a control signal received via the output, sets the die 100 in one of a conducting state during which a load current is conducted between the load terminals 101 and 102 and a blocking state during which a positive forward voltage is blocked between the load terminals 101 and 102 and the flow of the load current is inhibited, if the potential of the second load terminal 102 is greater than the potential of the first load terminal 101.

[0047] To conduct the load current, the die 100 includes a plurality of power cells 120. For example, these power cells 120 are arranged within an active area 105 of the power semiconductor die 100. A die edge 107 terminates the die 100 laterally, and an edge termination region 106 is arranged between the die edge 107 and the active area 105. For example, the edge termination region 106 is not configured for conducting the load current.

[0048] The control trench structure 110 extends primarily within the active region 105 and there along a vertical direction Z into the semiconductor body 190 , for example, over a distance of at least 500 nm, at least 600 nm or at least 700 nm, wherein the extension of the control trench structure 110 along the vertical direction Z can be selected, for example, depending on a specified maximum blocking voltage of the die 100 .

[0049] A grid pattern 115 having a plurality of grid openings 116 defines sub-regions within the active area 105. For example, each grid opening 116 is associated with one of the plurality of power cells 120.

[0050] The grid openings 116 are illustrated as exhibiting a rectangular horizontal perimeter, wherein it should be understood that the present description is not limited to such a horizontal perimeter; for example, in another embodiment, the grid openings 116 may exhibit a circular or elliptical perimeter or a rectangular perimeter with rounded corners. It should also be further understood that the grid openings 116 do not necessarily have to be completely surrounded by corresponding portions of the grid pattern 115. For example, depending on the design of the control groove structure 110, there may be small gaps (not shown), for example, at the intersections between the crossing stripes of the control groove structure 110.

[0051] For example, each grid opening 116 exhibits a maximum horizontal extension of no more than a few micrometers (e.g., no more than 5 μm or no more than 2 μm). For example, such a maximum horizontal extension can be the width of the corresponding grid opening 116 along the first lateral direction X or the length along the second lateral direction Y, whichever is greater.

[0052] Thus, each power cell 120 is at least partially arranged in a respective one of the plurality of grid openings 116 in horizontal cross-section.

[0053] Figure 2 An exemplary configuration of four adjacent grid openings 116 is shown, with each grid opening 116 associated with one power cell 120 .

[0054] For example, all power cells 120 have the same configuration. In another embodiment, the power cells 120 may differ in configuration; for example, it is possible that the active area 105 includes a first type of power cell and a second type of power cell, and optionally even includes one or more power cells of another type (e.g., auxiliary cells or dummy cells). The following description refers to a case where at least the power cells 120 are configured substantially identically, wherein, as noted, it should be understood that this does not necessarily have to be the case. Rather, the power cells 120 may also differ from one another.

[0055] Each power cell 120 includes a drift region portion 191 of a first conductivity type, a channel region portion 192 of a second conductivity type, and a source region portion 193 of a first conductivity type. The channel region portion 193 isolates the source region portion 192 from the drift region portion 191, wherein the source region portion 192 is electrically connected to the first load terminal 101. Moreover, the channel region portion 193 can be electrically connected to the first load terminal 101. For example, in order to achieve the electrical connection, first contact plugs 1011 can be used. For example, these contact plugs 1011 penetrate the first insulating layer 1012 (the penetration is not in Figure 2 ) and the second insulating layer 104. For example, in each power unit 120, the source region portion 193 and the channel region portion 192 are arranged to contact the corresponding first contact plug 1011.

[0056] like Figure 3A As more clearly illustrated in FIG. 1-C, the source region 193 and the channel region 192 may extend continuously within the semiconductor body 190, for example, into each power cell 120. Therefore, the formulations “source region portion” and “channel region portion” have been selected with respect to the respective power cell 120. The same applies to the drift region (portion) 191.

[0057] The transition between the channel region 192 and the drift region 191 forms a pn junction 194. The drift region 191 forms a major part of the semiconductor body 190 and extends in the vertical direction Z until it abuts a doped contact region 198 which is electrically connected to the second load terminal 102, for example.

[0058] The doped contact region 198 may extend continuously along the lateral directions X and Y so as to form a homogeneous semiconductor layer that horizontally (i.e., along the lateral directions X and Y) overlaps all of the power cells 120. For example, the doped contact region 198 includes or is a field stop layer of the first conductivity type (e.g., the same conductivity type as the drift region 190, but with a higher doping concentration).

[0059] Each power cell 120 further comprises a control portion having at least one control electrode portion 111 comprised in the control trench structure 110 as already indicated above. The control electrode portion 111 is electrically insulated from each of the first load terminal 101 , the second load terminal 102 and the semiconductor body 190 .

[0060] With respect to the components control electrode portion 111, source region portion 193, channel region portion 192 and drift region portion 191, the principle configuration of each power cell 120 corresponds to a typical MOSFET configuration, according to which the control electrode portion 111 can introduce an inversion channel in the channel region portion 192 when receiving a corresponding on control signal, and cut off the inversion channel when receiving a corresponding off control signal. The general operating principle will be described in a little more detail further below; however, this is known to those skilled in the art, and the embodiments described herein do not deviate from this general operating principle.

[0061] The control electrode portion 111 of the power unit 120 may be formed by corresponding monolithic stripe control electrodes included in the stripes of the control trench structure 110, such as Figure 1 Therefore, it should also be understood that a particular control electrode portion 111 may be associated with two adjacent power cells 120, such as Figure 2 In other words, each power cell 120 may be controlled, for example, by means of four control electrode portions 111 surrounding the source region portion 193 and the channel region portion 192 of the corresponding power cell 120 .

[0062] The control electrode portion 111 may vertically overlap both the source region portion 193 and the channel region portion 192. In other words, in each power cell 120, at least one control electrode portion 111 and the source region portion 193 may exhibit a first common extension range (e.g., a range of 100 nm) along the vertical direction Z, and at least one control electrode portion 111 and the channel region portion 192 may exhibit a second common extension range (e.g., a range of 50 nm) along the vertical direction Z. In addition, at least the control electrode portion 111 may extend at least as deep as the pn junction 194.

[0063] Each power cell 120 may further include a pillar-shaped field plate trench 130 extending into the semiconductor body 190 along the vertical direction Z and including a field plate electrode 131 electrically coupled to the first load terminal 101 .

[0064] For example, the field plate electrode 131 is electrically connected to the first load terminal 101, for example, so that the potential of the field plate electrode 131 is substantially the same as the potential of the first load terminal 101. For example, to achieve the electrical connection, a second contact plug 1015 can be used, which extends downward from the first load terminal 101 into the field plate trench 130 so as to contact the field plate electrode 131. To improve the contact, a conductive adhesion promoter 1016 can be used, as shown. In another embodiment, the field plate electrode 131 can be electrically coupled to the first load terminal 101 by means of an ohmic resistor.

[0065] Regarding the contact plugs 1011 and 1015, it should be understood that Figure 3A -C, it is additionally or alternatively possible to electrically connect the first load terminal 101 to both the source region portion 193 and the field plate electrode 131 by means of a bonding contact plug 1017. For example, according to an embodiment, the electrical connection of each power cell 120 to the first load terminal 101 may be realized by means of a respective single bonding contact plug 1017.

[0066] Contrary to the common name “field plate electrode”, the field plate electrode 131 generally does not exhibit a plate shape, but rather a pillar / needle shape, as also shown in FIG. Figure 1 and Figure 2 As shown in the figure.

[0067] In each field plate trench 130 , a trench insulator 132 may be provided, which insulates the corresponding field plate electrode 131 from the semiconductor body 190 .

[0068] For example, the total vertical extension of each columnar field plate trench 130 is equivalent to at least twice the total vertical extension of the control trench structure 110; for example, compared with the control trench structure 110, each columnar field plate trench 130 extends at least three times farther in the vertical direction Z, for example, with the upper surface 1900 of the semiconductor body 190 as a reference.

[0069] The pillar field plate trench 130 may be considered to include a corresponding deep portion 136 below the channel region portion 192 and a proximal portion 135 above the deep portion 136 .

[0070] Along the vertical direction Z, the proximal portion 135 can be seamlessly integrated into the deep portion 136, such as Figure 2 This may, for example, result in the two portions 135 and 136 not being coupled to one another by means of coupling components or the like, but the two portions 135 and 136 jointly forming a respective columnar field plate trench 130 .

[0071] For example, the columnar field plate trench 130 exhibits a total extension along the vertical direction Z, and the proximal portion 135 comprises an upper third of the total extension, while the deep portion 136 comprises the remaining two thirds of the total extension. Figure 2 In contrast to the schematic diagram in FIG. 1 , the columnar field plate trench 130 does not necessarily have to be terminated by the deep portion 136, but the columnar field plate trench 130 may include a bottom portion 137 that terminates the columnar field plate trench 130 along the vertical direction Z (see FIG. 1 ). Figure 3A -C and Figure 4 B).

[0072] For example, the proximal portion 135 vertically overlaps the channel region portion 192. In an embodiment, the channel region portion 192, the control electrode portion 111 and the proximal portion 135 exhibit a common vertical extension range (e.g., a range of at least 200 nm). The proximal portion 135 may include a portion of the field plate electrode 131, as will be explained in more detail below.

[0073] The proximal portion 135 has a proximal horizontal width W1 and the deep portion 136 has a deep horizontal width W2 , wherein it should be understood that these horizontal widths W1 and W2 do not necessarily have to be constant along the vertical direction Z.

[0074] According to one or more embodiments, it is proposed to increase the width of the columnar field plate trench 130 as the columnar field plate trench 130 extends along the vertical direction Z. For example, the maximum value of the deep horizontal width W2 is always greater than the maximum value of the proximal horizontal width W1.

[0075] For example, the (maximum) deep horizontal width W2 of the deep portion 136 corresponds to at least 110% of the (maximum) proximal horizontal width W1 of the proximal portion 135 .

[0076] Additionally or alternatively, the horizontal distance between two columnar field plate trenches 130 of two adjacent power cells in the plurality of power cells 120 decreases along the vertical direction Z (eg, decreases by at least 10%) (see Figure 1 ), where the horizontal distance is measured between the trench insulators 132 of adjacent columnar field plate trenches 130 (eg, between the sidewalls of adjacent columnar field plate trenches 130 ).

[0077] For example, the distance D1 between two adjacent proximal portions 135 may be in the range of, for example, 500 to 700 nm, and the distance D2 between two adjacent deep portions 136 may be in the range of, for example, 300 to 500 nm.

[0078] In the following, several examples will be presented on how such an increase in the width of the pillar field plate trench 130 may be achieved.

[0079] For example, at least in a sub-portion of the proximal portion 135, the rate of change of the proximal width with respect to the vertical direction Z (i.e., dW1 / dZ) is substantially zero or even negative. For example, the proximal portion 155 can be relatively elongated, and the proximal horizontal width W1 does not substantially increase within the proximal portion 135, but rather remains fairly constant or even decreases, respectively (see Figure 4 A). As indicated above, the proximal portion 135 may include the upper third of the total extension of the columnar field plate trench 130 along the vertical direction Z. The sub-portion may include at least that portion of the proximal portion 135 that vertically overlaps the control trench structure 110 .

[0080] For example, the increase in horizontal width begins at a threshold level 1356. For example, the columnar field plate trench 130 does not substantially increase in horizontal width until the threshold level 1356 is reached. Figure 2 In another embodiment, the pillar field plate trench 130 also increases (eg, only slightly increases) in width within its proximal portion 135 , for example, as illustrated in FIG. 3 .

[0081] If present, the threshold level 1356 may be disposed within the deeper half of the pillar field plate trench 130 .

[0082] The total vertical extension of the deep portion 136 may correspond to at least 10% of the total vertical extension of the pillar field plate trench 130. As indicated, this share may be greater than 10%, for example greater than 30%, greater than 50%, greater than 66.67% (corresponding to two thirds) or even greater than 90%.

[0083] In addition, along the entire total extension along the vertical direction Z of the deep portion 136 (or along at least a portion thereof, such as at least 50%), the rate of change of the deep horizontal width with respect to the vertical direction Z (i.e., dW2 / dZ) is zero or positive. Therefore, a step-like increase (not shown) in the horizontal width of the pillar field plate trench 130 is also possible; for example, this allows dW2 / dZ to be substantially zero, or even negative within the deep portion 136 (at least in a sub-portion). As indicated above and as Figures 2 to 4 As illustrated in each of A, the increase in horizontal width typically occurs fairly gradually, for example, linearly or exponentially depending on the process.

[0084] The rate of change of the proximal horizontal width dW1 / dZ can be defined by a first angle α (e.g., an angle relative to the upper surface 1900 of the semiconductor body 190), and the rate of change of the deep horizontal width dW2 / dZ can be defined by a second angle β (e.g., also an angle relative to the upper surface 1900 of the semiconductor body 190).

[0085] In an embodiment, the second angle β is greater than the first angle α. For example, in the proximal portion 135, the first angle α is in the range of 60° to 100°. In the deep portion 136, the second angle β can be in the range of 91° to 150°. In addition, at least one of the second angle β and the first angle α can be substantially constant. A transition from the proximal portion 135 to the distal portion 136 (e.g., where the difference between the angles β and α is established) can be formed (gradually) at or near the threshold level 1356.

[0086] In another embodiment, the second angle β and the first angle α may be substantially the same as each other (see Figure 3A ), for example, both correspond to at least 92°, at least 95° or even greater than 100°.

[0087] As indicated above, with Figure 2 In contrast to the schematic diagram in FIG. 1 , the columnar field plate trench 130 does not necessarily have to be terminated by the deep portion 136, but the columnar field plate trench 130 may include the bottom portion 137, which terminates the columnar field plate trench 130 along the vertical direction Z (see Figure 3A -C and Figure 4 B). The total vertical extension of the bottom portion 137 may depend on the applied process, and in the bottom portion 137 the width of the columnar field plate trench 130 (naturally) decreases.

[0088] For example, for at least 40% of the total vertical extension of the corresponding columnar field plate trench 130 (see Figure 2 ), the horizontal width of each columnar field plate trench 130 changes, for example, according to a constant rate of change along the vertical direction Z, wherein the proportion may even be greater than 40%, for example greater than 70% or even amount to approximately 100% (see Figure 3A ).

[0089] In another embodiment, for example, Figure 3B and 3C As illustrated in , the horizontal width of each columnar field plate trench 130 remains substantially constant in the vertical direction for at least 70% of the total vertical extension of the corresponding columnar field plate trench 130 .

[0090] For example, the increase in the horizontal width occurs, for example, exclusively within the deepest tenth part of the corresponding pillar field plate trench.

[0091] Still refer to Figure 3B and 3C In an embodiment, the at least 10% increase in the horizontal width of each columnar field plate trench 130 occurs along no more than 30% of the total vertical extension of the corresponding columnar field plate trench 130. In addition, no more than 30% of the total vertical extension of the corresponding columnar field plate trench 130 may form a portion or the deepest portion of the corresponding columnar field plate trench 130.

[0092] As indicated, the deep portion 136 may, for example, alone or together with the bottom portion 137, form a distal portion of the columnar field plate trench 130 terminating in the vertical direction Z, for example, the distal portion comprising no more than 30% of the total vertical extension of the corresponding columnar field plate trench 130, wherein an increase of at least 10% in the horizontal width occurs. However, the exemplarily mentioned value of no more than 30% of the total vertical extension of the corresponding columnar field plate trench 130 may also be different in other embodiments, for example, depending on the applied process. For example, the increase in width may also occur (for example, linearly) along the total vertical extension of the corresponding columnar field plate trench 130 (in which case the “30% limit” would not apply), or, in another embodiment, exclusively in the deep portion 136.

[0093] Regardless of how the horizontal width increase is achieved (e.g., regardless of how the angles β and α are selected), it should be ensured that the (maximum) deep horizontal width W2 of the deep portion 136 is at least 110% or at least 120% of the (maximum) proximal horizontal width W1 of the proximal portion 135, and / or the horizontal distance between two columnar field plate trenches 130 of two adjacent power cells in the plurality of power cells 120 is reduced by at least 10% or at least 20% along the vertical direction Z. As indicated above. At the same time, it should be ensured that the minimum distance D2 (see Figure 2 and 3A -C) is greater than zero, for example, greater than 350 nm. In addition, it may be appropriate to implement the increase in the horizontal width of the columnar field plate trench 130 in a relatively deep and short portion of the columnar field plate trench 130, in order to minimize the reduction in the area (i.e., the mesa area) between two adjacent columnar field plate trenches 130, and thereby allow a low on-resistance. Therefore, in an embodiment and as described above, the deep portion 136 at least partially forms a distal portion that terminates the columnar field plate trench 130 in the vertical direction Z, wherein, in an embodiment, the distal portion includes no more than 30% of the total extension of the columnar field plate trench 130.

[0094] The above description mainly relates to increasing the width of the corresponding entire columnar field plate trench 130. Each columnar field plate trench 130 includes a field plate trench electrode 131 and a trench insulator 132, or is substantially composed of a field plate trench electrode 131 and a trench insulator 132, respectively. For example, at least one of the horizontal width of the field plate electrode 131 (i.e., the distance between its outer sidewalls) and the horizontal thickness of the field insulator 132 (i.e., the distance between the columnar field plate trench sidewall and the outer sidewall of the field plate electrode) increases along the vertical direction Z.

[0095] As will become apparent from the description below, the increase in the horizontal width of the columnar field plate trench 130 can be achieved by any of the following: by a corresponding increase in the horizontal width of the trench insulator 132 alone, by a corresponding increase in the horizontal width of the field plate electrode 131 alone; or by a corresponding increase in both the horizontal width of the trench insulator 132 and the horizontal width of the field plate electrode 131, wherein, for all options, the increase in the horizontal width of the trench insulator 132 does not necessarily have to be the same as the increase in the horizontal width of the field plate electrode 131.

[0096] Typically, the field plate electrode 131 may extend into both the proximal portion 135 and the deep portion 136 , and may also extend into the bottom portion 137 , if present.

[0097] For example, about Figure 2 and 3C In some embodiments, the horizontal width of the field plate electrode 131 may be substantially constant along the vertical direction Z. For example, according to these embodiments, only the horizontal width of the trench insulator 132 increases along the vertical direction Z. In other words, in the example, the increase in the horizontal width of the columnar field plate trench 130 is substantially achieved only by means of the increase in the horizontal width of the trench insulator 132. As already mentioned above, such an increase may start at the threshold level 1356, such as Figure 2 and Figure 3C As shown in both, and for example, for not more than 30% of the total vertical extension of the columnar field plate trench 130, as Figure 3C More clearly illustrated in FIG.

[0098] about Figure 3A -B embodiment, the horizontal width (i.e., thickness) of the trench insulator 132 can be kept substantially constant, wherein the field plate electrode 131 increases in horizontal width along the vertical direction Z. For example, the field plate electrode 131 has a maximum horizontal width in the portion that forms a part of the deep portion 136 of the columnar field plate trench 130. As already explained more generally with respect to the increase in the width of the columnar field plate trench 130, the increase in the width of the field plate electrode 131 can occur along more than 50% of the total extension of the columnar field plate trench 130, for example, along more than 80% of the total extension. For example, along its entire extension in the vertical direction Z, the field plate electrode 131 can increase in horizontal width, for example, by at least 10%. In Figure 3ASchematically and exemplarily, this gradual increase along a major portion of the columnar field plate trench 130 is illustrated in FIG. 1 . In another embodiment, the horizontal width of the field plate electrode 131 remains substantially constant for at least 70% of its total extension in the vertical direction Z, wherein the at least 70% may form a proximal (i.e., upper) portion of the field plate electrode 131. Thus, in an embodiment, the width increase may occur along no more than 30% (e.g., a deeper portion) of the field plate electrode 131, wherein at least 70% of the horizontal width of the field plate electrode 131 may be substantially constant for at least 70% of its total extension in the vertical direction Z. Figure 3B Such an embodiment is schematically and exemplarily illustrated in FIG.

[0099] As has become clear from the above, the increase in the horizontal width of the columnar field plate trench 130 can occur in the deep portion 136, for example, so that the deep horizontal width W2 (which is greater than 110% of the proximal horizontal width W1) exists within the deepest two-tenths of the columnar field plate trench 130, wherein these deepest two-tenths can also include the bottom portion 137. For example, by virtue of the increase in the horizontal width of the columnar field plate trench 130 being achieved by increasing the horizontal widths of both the field plate electrode 131 and the trench insulator 132 or by increasing only one of these horizontal widths, the effective thickness of the trench insulator 132 in the bottom portion 137, i.e., the distance between the drift region 191 and the field plate electrode 131, can also be adjusted. Moreover, the effective area of ​​the field plate electrode 131 facing the second load terminal 102 can be adjusted accordingly, wherein, for example, an increase in the width of the field plate electrode 131 can produce an increase in the effective area. For example, in this way, the total output capacitance of the semiconductor die 100 can be adjusted.

[0100] For example, in terms of adjustment of the total output capacitance, it may be appropriate to reflect an increase in the width of the columnar field plate trenches by a corresponding increase in the width of the field plate trench electrodes, e.g. Figure 2 3 and schematically illustrated in parts (A) and (B) of FIG. 3 . Therefore, according to an embodiment, the width increase as described with respect to the columnar field plate trench 130 may also apply to the increase in the width of the field plate electrode 131. For example, the deep horizontal width of the field plate electrode 131 in the deep portion 136 may correspond to at least 110% of the proximal horizontal width of the field plate electrode 131 in the proximal portion 135. For example, according to an embodiment, the thickness of the trench insulator 132 may remain substantially constant along the total vertical extension of the columnar field plate trench 130.

[0101] According to one or more embodiments, the field plate electrode 131 may exhibit a void volume portion 1310. For example, such a void volume portion 1310 may be formed during a manufacturing process, for example, if such a process is configured such that an increase in the horizontal width of the field plate electrode 131 is achieved. Figure 3A - is exemplarily and schematically illustrated in B.

[0102] In an embodiment, the empty volume portion 1310 extends into the deep portion 136, but does not extend into the proximal portion 135. For example, thereby, a reliable electrical connection between the first load terminal 101 and the field plate electrode 131 may be achieved.

[0103] The form of the empty volume portion 1310 may be associated with how the increase in the horizontal width of the field plate electrode 131 is achieved. As indicated, if the increase in the horizontal width of the field plate electrode 131 is not desired (e.g., Figure 2 and Figure 3C ), the empty volume portion 1310 is usually not formed, although this is not excluded. If the increase in the horizontal width of the field plate electrode 131 is achieved within a relatively small distance along the vertical direction Z (as shown in FIG. Figure 3B ), the total extension of the empty volume portion 1310 along the first transverse direction X and the vertical direction Z can be in the same order of magnitude. If the increase in horizontal width is achieved over a relatively long distance along the vertical direction Z (e.g. Figure 3A ), the total extension of the empty volume portion 1310 along the vertical direction Z may be significantly larger than the total extension of the empty volume portion 1310 along the first lateral direction X.

[0104] In an embodiment, the minimum distance between the pn junction 194 and the empty volume portion 1310 along the vertical direction Z is greater than zero and corresponds to, for example, at least 400 nm, at least 600 nm, or even greater than 1000 nm.

[0105] Also presented herein are embodiments of methods of processing a power semiconductor die.The power semiconductor die has a semiconductor body coupled to first and second load terminals of the power semiconductor die and configured to conduct a load current between the load terminals.

[0106] The method includes: forming a control trench structure for controlling a load current, the control trench structure extending into a semiconductor body in a vertical direction and arranged according to a horizontal grid pattern having a plurality of grid openings; forming a plurality of power cells, each power cell being at least partially arranged in a corresponding one of the plurality of grid openings in a horizontal cross section, and including: a portion of a drift region of a first conductivity type, a portion of a channel region of a second conductivity type, and a portion of a source region of the first conductivity type, wherein the channel region portion is electrically connected to a first load terminal and isolates the source region portion from the drift region portion; and a control portion having at least one control electrode portion in the control trench structure.

[0107] The method may include: in at least one power cell, forming a columnar field plate trench, the columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to a first load terminal, the columnar field plate trench having a deep portion below a channel region portion and a proximal portion above the deep portion, the proximal portion vertically overlapping the channel region portion, wherein a deep horizontal width of the deep portion is equivalent to at least 110% of a proximal horizontal width of the proximal portion.

[0108] Additionally or alternatively, the method further includes: forming a columnar field plate trench in each power cell, the columnar field plate trench extending into the semiconductor body in a vertical direction and including a field plate electrode electrically coupled to the first load terminal, wherein a horizontal distance between two columnar field plate trenches of two adjacent power cells among the plurality of power cells is reduced by at least 10% in the vertical direction.

[0109] The embodiments of the method described above can be combined with those already mentioned in reference Figures 1 to 4 B. With regard to the exemplary embodiment of the method, reference is therefore made entirely to the above.

[0110] In particular, it should be understood that the order in which the various method steps are performed can be appropriately selected by the skilled person. For example, in one embodiment, the control trench structure is formed before the columnar field plate trench is formed. In another embodiment, the control trench structure is formed after the columnar field plate trench is formed.

[0111] More generally, in the above, embodiments of a semiconductor die 100 have been presented that may include a semiconductor substrate (e.g., semiconductor body 190) having a gate trench (e.g., control trench structure 110) extending into a front surface (e.g., upper surface 1900) of the semiconductor substrate. The semiconductor substrate may include any type of semiconductor material, such as a single element semiconductor (e.g., Si, Ge, etc.), silicon-on-insulator, a binary semiconductor (e.g., SiC, GaN, GaAs, etc.), a ternary semiconductor, etc., with or without (one or more) epitaxial layers. A gate electrode (e.g., control electrode portion 111) and a gate dielectric (e.g., trench insulator 112) are disposed in each gate trench, the gate dielectric separating the corresponding gate electrode from the semiconductor substrate. Field plates (e.g., field plate electrodes 131) may be disposed in columnar field plate trenches 130, each field plate being separated from the semiconductor substrate and the corresponding gate electrode by, for example, a field dielectric (e.g., trench insulator 132) that is thicker than the gate dielectric. Optionally or alternatively, the field plate may be arranged in a trench also housing the gate electrode.

[0112] A first (source / emitter) region (e.g., source region 193) having a first conductivity type (e.g., n-type in the case of an n-channel device, or p-type in the case of a p-channel device) is formed in the semiconductor substrate at the front surface and adjacent to each gate trench. A second (body) region (e.g., channel region 192) having a second conductivity type (e.g., p-type in the case of an n-channel device, or n-type in the case of a p-channel device) is formed in the semiconductor substrate below the source / emitter region and adjacent to each gate trench. A third (drift) region (e.g., drift region 191) having a first conductivity type is formed in the semiconductor substrate, for example as part of an epitaxial layer, below the body region and adjacent to each gate trench. A drain / collector region of the first conductivity type (see doped contact region 198) is formed at the back surface of the semiconductor substrate opposite to the front surface and is more heavily doped than the drift region. In addition, particularly in the case of using another material than Si, one can also imagine a pnp instead of an npn MOSFET.

[0113] The semiconductor die illustrated may be a vertical power MOSFET having a channel region (see 192) extending along a gate dielectric (see 112) in a body region in a vertical direction Z. By applying a sufficient gate voltage to the gate electrode, minority carriers (electrons in the case of a p-type body region, or holes in the case of an n-type body region) gather along the gate dielectric in the channel region, and a conduction path is completed between the source / emitter region and the drain / collector region via the drift region and the channel region.

[0114] According to some embodiments described herein, at least for one of the power cells of the needle-shaped trench MOSFET, it is proposed to include a field plate electrode in a columnar field plate trench, which has an elongated upper (proximal) portion close to the channel region of the power cell, and the columnar field plate trench increases in width along its extension in the vertical direction, thereby showing a thicker deep portion. As a result, in the upper portion of the semiconductor body of the needle-shaped trench MOSFET (where the channel region is introduced to conduct the load current), a small cell pitch P can be achieved, and thus a high total power cell density can be achieved. At the same time, due to the increased width of the columnar field plate trench, a sufficiently large field plate electrode can be included in the columnar field plate trench, thereby ensuring reliable blocking capability.

[0115] In the above, embodiments related to power semiconductor dies and corresponding processing methods are explained. For example, these semiconductor dies are based on silicon (Si). Therefore, the single-crystalline semiconductor region or layer or portion can be a single-crystalline Si region or Si layer. In other embodiments, polycrystalline or amorphous silicon can be used.

[0116] However, it should be understood that the semiconductor die can be made of any semiconductor material suitable for manufacturing a semiconductor die. Examples of such materials include, without limitation, the following: basic semiconductor materials such as silicon (Si) or germanium (Ge), group IV compound semiconductor materials such as silicon carbide (SiC) or silicon germanium (SiGe), binary, ternary or quaternary III-V semiconductor materials such as gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide (InGaPa), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AlGaInN) or indium gallium arsenide phosphide (InGaAsP), and binary or ternary II-VI semiconductor materials such as cadmium telluride (CdTe) and mercury cadmium telluride (HgCdTe), to name a few examples. The aforementioned semiconductor materials are also referred to as "homojunction semiconductor materials". When two different semiconductor materials are combined, a heterojunction semiconductor material is formed. Examples of heterojunction semiconductor materials include, without limitation, the following: aluminum gallium nitride (AlGaN)-aluminum gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-aluminum gallium indium nitride (AlGaInN), indium gallium nitride (InGaN)-gallium nitride (GaN), aluminum gallium nitride (AlGaN)-gallium nitride (GaN), indium gallium nitride (InGaN)-aluminum gallium nitride (AlGaN), silicon-silicon carbide (SixC1-x), and silicon-SiGe heterojunction semiconductor materials. For power semiconductor device applications, Si, SiC, GaAs, and GaN materials are currently used.

[0117] For ease of description, spatially relative terms such as "below", "below", "below", "above", "above", etc. are used to explain the positioning of one element relative to a second element. These terms are intended to cover different orientations of the corresponding devices other than those depicted in the drawings. In addition, terms such as "first", "second", etc. are also used to describe various elements, regions, parts, etc., and are not intended to be limiting. Throughout this description, the same terms refer to the same elements.

[0118] As used herein, the terms “having,” “containing,” “including,” “comprising,” “exhibiting,” and the like are open-ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features.

[0119] In view of the above range of variations and applications, it should be understood that the present invention is not limited by the foregoing description, nor by the accompanying drawings. Instead, the present invention is limited only by the appended claims and their legal equivalents.

Claims

1. A power semiconductor die (100) having a semiconductor body (190), the semiconductor body (190) being coupled to a first load terminal (101) and a second load terminal (102) of the power semiconductor die (100) and being configured to conduct a load current between the load terminals (101, 102), and comprising: a control trench structure (110) for controlling the load current, the control trench structure (110) extending into the semiconductor body (190) in a vertical direction (Z) and arranged according to a horizontal grid pattern (115) having a plurality of grid openings (116); - a plurality of power cells (120), each power cell (120) being arranged at least partially in a corresponding one of the plurality of grid openings (116) in horizontal cross-section, wherein at least one of the power cells (120) comprises: - a portion (191) of a drift region of a first conductivity type, a portion (192) of a channel region of a second conductivity type and a portion (193) of a source region of the first conductivity type, wherein the channel region portion (192) is electrically connected to the first load terminal (101) and isolates the source region portion (193) from the drift region portion (191); and - a control portion having at least one control electrode portion (111) in the control trench structure (110); - a columnar field plate trench (130) extending into the semiconductor body (190) along the vertical direction (Z) and comprising a field plate electrode (131) electrically coupled to the first load terminal (101), the columnar field plate trench (130) having a deep portion (136) below the channel region portion (192) and a proximal portion (135) above the deep portion (136), the proximal portion (135) vertically overlapping the channel region portion (192), wherein a deep horizontal width (W2) of the deep portion (136) corresponds to at least 110% of a proximal horizontal width (W1) of the proximal portion (135).

2. The power semiconductor die (100) of claim 1, wherein at least in a sub-portion of the proximal portion (135), a rate of change of the proximal horizontal width with respect to the vertical direction (Z) is zero or negative.

3. The power semiconductor die (100) of claim 1, wherein the total vertical extension of the deep portion (136) corresponds to at least 10% of the total vertical extension of the columnar field plate trench (130).

4. The power semiconductor die (100) of claim 3, wherein a rate of change of the deep horizontal width with respect to the vertical direction (Z) is zero or positive.

5. The power semiconductor die (100) of any one of claims 1 to 4, wherein the field plate electrode (131) extends into each of the proximal portion (135) and the deep portion (136).

6. The power semiconductor die (100) according to any one of claims 1 to 4, wherein the columnar field plate trench (130) comprises: A trench insulator (132) electrically isolates the field plate electrode (131) from the semiconductor body (190).

7. The power semiconductor die (100) of claim 6, wherein at least one of a horizontal width of the field plate electrode (131) and a horizontal thickness of the trench insulator (132) increases along the vertical direction (Z).

8. The power semiconductor die (100) of any one of claims 1 to 4, wherein the field plate electrode (131) has a maximum width in a portion forming a part of a deep portion (136) of the columnar field plate trench (130).

9. The power semiconductor die (100) of one of claims 1 to 4, wherein the field plate electrode (131) exhibits a void volume portion (1310).

10. The power semiconductor die (100) of claim 9, wherein the empty volume portion (1310) extends into the deep portion (136) and does not extend into the proximal portion (135).

11. A power semiconductor die (100) as claimed in any one of claims 1 to 4, wherein the deep portion (136) at least partially forms a distal portion terminating the columnar field plate trench (130) along the vertical direction (Z), wherein the distal portion includes no more than 30% of the total extension of the columnar field plate trench (130).

12. A power semiconductor die (100) having a semiconductor body (190), the semiconductor body (190) being coupled to a first load terminal (101) and a second load terminal (102) of the power semiconductor die (100) and being configured to conduct a load current between the load terminals (101, 102), and comprising: a control trench structure (110) for controlling the load current, the control trench structure (110) extending into the semiconductor body (190) in a vertical direction (Z) and arranged according to a horizontal grid pattern (115) having a plurality of grid openings (116); - a plurality of power cells (120), each power cell (120) being arranged at least partially in a respective one of the plurality of grid openings (116) in horizontal cross section and comprising: - a portion (191) of a drift region of a first conductivity type, a portion (192) of a channel region of a second conductivity type and a portion (193) of a source region of the first conductivity type, wherein the channel region portion (192) is electrically connected to the first load terminal (101) and isolates the source region portion (193) from the drift region portion (191); and - a control portion having at least one control electrode portion (111) in the control trench structure (110); - a columnar field plate trench (130) extending into the semiconductor body (190) along the vertical direction (Z) and comprising a field plate electrode (131) electrically coupled to the first load terminal (101), - wherein a horizontal distance between two columnar field plate trenches (130) of two adjacent power cells in the plurality of power cells (120) decreases by at least 10% along the vertical direction (Z).

13. A power semiconductor die (100) as claimed in claim 12, wherein the horizontal width of each columnar field plate trench (130) changes according to a constant rate of change along the vertical direction Z for at least 40% of the total vertical extension of the corresponding columnar field plate trench (130).

14. The power semiconductor die (100) of claim 12, wherein the horizontal width of each columnar field plate trench (130) increases for at least 70% of the total vertical extension of the corresponding columnar field plate trench (130).

15. The power semiconductor die (100) of claim 12, wherein the horizontal width of each columnar field plate trench (130) remains substantially constant along the vertical direction for at least 70% of the total vertical extension of the corresponding columnar field plate trench (130).

16. The power semiconductor die (100) of claim 12, wherein the at least 10% increase in the horizontal width of each columnar field plate trench (130) occurs along no more than 30% of the total vertical extension of the corresponding columnar field plate trench (130).

17. The power semiconductor die (100) of claim 16, wherein no more than 30% of the total vertical extension of the respective columnar field plate trench (130) forms part of the deepest portion of the respective columnar field plate trench (130).

18. The power semiconductor die (100) of any of claims 12 to 17, wherein each grid opening (116) exhibits a maximum horizontal extension of not more than 1 μm.

19. A method of processing a power semiconductor die (100), the power semiconductor die (100) having a semiconductor body (190), the semiconductor body (190) being coupled to a first load terminal (101) and a second load terminal (102) of the power semiconductor die (100) and being configured to conduct a load current between the load terminals (101, 102), wherein the method comprises: - forming a control trench structure (110) for controlling the load current, the control trench structure (110) extending into the semiconductor body (190) along a vertical direction (Z) and arranged according to a horizontal grid pattern (115) having a plurality of grid openings (116); - forming a plurality of power cells (120), each power cell (120) being arranged at least partially in a corresponding one of the plurality of grid openings (116) in horizontal cross section and comprising: - a portion (191) of a drift region of a first conductivity type, a portion (192) of a channel region of a second conductivity type and a portion (193) of a source region of the first conductivity type, wherein the channel region portion (192) is electrically connected to the first load terminal (101) and isolates the source region portion (193) from the drift region portion (191); and - a control portion having at least one control electrode portion (111) in the control trench structure (110); The method comprises: forming a columnar field plate trench (130) in at least one of the power cells (120), the columnar field plate trench (130) extending into the semiconductor body (190) along the vertical direction (Z) and comprising a field plate electrode (131) electrically coupled to the first load terminal (101), the columnar field plate trench (130) having a deep portion (136) below the channel region portion (192) and a proximal portion (135) above the deep portion (136), the proximal portion (135) vertically overlapping the channel region portion (192), wherein a deep horizontal width (W2) of the deep portion (136) is at least 110% of a proximal horizontal width (W1) of the proximal portion (135).

20. A method (200) of processing a power semiconductor die (100), the power semiconductor die (100) having a semiconductor body (190), the semiconductor body (190) being coupled to a first load terminal (101) and a second load terminal (102) of the power semiconductor die (100) and being configured to conduct a load current between the load terminals (101, 102), wherein the method comprises: - forming a control trench structure (110) for controlling the load current, the control trench structure (110) extending into the semiconductor body (190) along a vertical direction (Z) and arranged according to a horizontal grid pattern (115) having a plurality of grid openings (116); - forming a plurality of power cells (120), each power cell (120) being arranged at least partially in a corresponding one of the plurality of grid openings (116) in horizontal cross section and comprising: - a portion (191) of a drift region of a first conductivity type, a portion (192) of a channel region of a second conductivity type and a portion (193) of a source region of the first conductivity type, wherein the channel region portion (192) is electrically connected to the first load terminal (101) and isolates the source region portion (193) from the drift region portion (191); and - a control portion having at least one control electrode portion (111) in the control trench structure (110); The method comprises forming a columnar field plate trench (130) in each power cell (120), the columnar field plate trench (130) extending into the semiconductor body (190) along the vertical direction (Z) and comprising a field plate electrode (131) electrically coupled to the first load terminal (101), wherein a horizontal distance between two columnar field plate trenches (130) of two adjacent power cells among the plurality of power cells (120) decreases by at least 10% along the vertical direction (Z).

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