Display device and method for manufacturing the same

Abstract

A display device and a method for manufacturing the display device are disclosed. The method for manufacturing the display device includes: providing a display substrate having a plurality of pixels; mounting a packaging substrate on the display substrate; bonding the display substrate and the packaging substrate to form a display panel; and forming a module hole in the display panel that penetrates a hole region of the display panel. The hole region surrounds the module hole, and the display substrate and the packaging substrate can be bonded by irradiating the hole region with an ultra-high frequency pulse laser. As the ultra-high frequency pulse laser is irradiated onto the hole region, the display substrate and the packaging substrate are bonded in the hole region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This patent application claims the priority of Korean Patent Application No. 10-2018-0132271 filed on October 31, 2018, and Korean Patent Application No. 10-2019-0026125 filed on March 7, 2019, filed in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments disclosed herein relate to a display device and a method for manufacturing the display device. Background Art

[0004] Various displays have been developed for use in smartphones, tablets, computers, and other electronic devices. As displays continue to evolve, the ongoing goal of system design is to reduce power consumption while providing excellent portability and high added value. Many devices on the market today fail to meet these design goals. Summary of the invention

[0005] Embodiments of the inventive concept provide a display device having improved durability and aesthetic appearance and a method of manufacturing such a display device using a simplified process and with reduced manufacturing costs.

[0006] According to one or more embodiments, a method for manufacturing a display device includes: providing a display substrate having a plurality of pixels; mounting a packaging substrate on the display substrate; joining the display substrate with the packaging substrate to form a display panel; and forming a module hole in the display panel that penetrates a hole area of ​​the display panel, wherein the hole area surrounds the module hole, and wherein joining the display substrate and the packaging substrate includes: irradiating the hole area with an ultra-high frequency pulse laser, and as the ultra-high frequency pulse laser is irradiated onto the hole area, the display substrate and the packaging substrate are joined in the hole area.

[0007] The ultra-high frequency pulse laser may be a femtosecond laser. The hole area may include a margin area surrounding the module hole, a hole sealing area surrounding the margin area, and a wiring area surrounding the hole sealing area and including a plurality of signal lines, wherein joining the display substrate and the package substrate includes: placing a focus of the ultra-high frequency pulse laser in at least one of the margin area and the hole sealing area.

[0008] The method may include: arranging a hole sealing member on a hole sealing area of ​​the packaging substrate before mounting the packaging substrate on the display substrate. The hole sealing member may include a glass material. Irradiating the hole area with an ultra-high frequency pulse laser may include: continuously moving a focus of the ultra-high frequency pulse laser in an interface area between the display substrate and the packaging substrate.

[0009] Bonding the display substrate and the packaging substrate may include irradiating a laser onto a substrate sealing region located at an edge region of each of the display substrate and the packaging substrate between the display substrate and the packaging substrate. The laser irradiated onto the substrate sealing region may be a femtosecond laser.

[0010] The method may further include: before mounting the encapsulation substrate on the display substrate, arranging a substrate sealing member on a substrate sealing area of ​​the encapsulation substrate. The width of the hole sealing area formed in the hole area may be less than or equal to about 100 μm, and the display substrate and the encapsulation substrate are joined in the hole sealing area. When the ultra-high frequency pulse laser is irradiated onto the hole area, the display substrate and the encapsulation substrate may be melted and mixed at the boundary between the display substrate and the encapsulation substrate to form a joining area. The method may include: arranging an electronic module below the display panel to correspond to the module hole. The electronic module may include at least one of a camera, a speaker, a light sensing sensor, and a heat sensing sensor.

[0011] According to one or more embodiments, a display device includes a display panel and an electronic module, the display panel includes a hole area, a display area surrounding the hole area, and a non-display area surrounding the display area, a module hole penetrating the hole area is formed in the display panel, and the hole area surrounds the module hole of the display panel, and the electronic module overlaps with the module hole, wherein the display panel includes a display substrate having a plurality of pixels and a packaging substrate located on the display substrate to cover the plurality of pixels, the packaging substrate is bonded to the display substrate in a hole sealing area corresponding to a portion of the hole area, wherein a width of the hole sealing area is less than about 100 μm.

[0012] The display device may include a hole sealing member located between the display substrate and the encapsulation substrate in the hole sealing area. The hole sealing member may include a glass material. The thickness of the hole sealing member may be in the range of about 4.5 μm to about 5.5 μm. The bonding strength between the display substrate and the encapsulation substrate in the hole sealing area may be greater than or equal to about 5 kgf.

[0013] The hole area may include a wiring area surrounding the hole sealing area and including a plurality of signal lines, and the display substrate and the packaging substrate are spaced apart from each other by a predetermined distance in the wiring area. The electronic module may include at least one of a camera, a speaker, a light sensing sensor, and a heat sensing sensor. The non-display area may include a substrate sealing area, and the display substrate and the packaging substrate may be joined in the substrate sealing area. The display device may also include a substrate sealing member located between the display substrate and the packaging substrate in the substrate sealing area.

[0014] According to one or more embodiments, a method for manufacturing a display device includes: providing a display substrate including a plurality of pixels; mounting a packaging substrate on the display substrate; bonding the display substrate with the packaging substrate to form a display panel; and forming a module hole in the display panel, wherein the display panel includes a hole area surrounding the module hole, a display area surrounding the hole area, and a non-display area surrounding the display area, and wherein: bonding the display substrate with the packaging substrate includes: irradiating a femtosecond laser between the display substrate and the packaging substrate in the hole area, and as the femtosecond laser is irradiated, the display substrate and the packaging substrate melt and mix at the boundary between the display substrate and the packaging substrate to form a bonding area. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Example embodiments will be more clearly understood from the following brief description taken in conjunction with the accompanying drawings.The accompanying drawings represent non-limiting example embodiments as described herein.

[0016] Figure 1 An embodiment of a display device is shown.

[0017] Figure 2 Shows Figure 1 Exploded view of the display device.

[0018] Figure 3 Shows Figure 1 Functional block diagram of a display device.

[0019] Figure 4 Shows Figure 1 An implementation method of a pixel of a display device in FIG.

[0020] Figure 5 Shown along Figure 2 A cross-sectional view taken along line II'.

[0021] Figure 6 An embodiment of a display panel is shown.

[0022] Figure 7 Shows Figure 2 Implementation method of area A1 in .

[0023] Figure 8 Shown along Figure 2 A cross-sectional view taken along line II-II'.

[0024] Fig. 9 A cross-sectional view of a bonding area according to an embodiment is shown.

[0025] Fig. 10A An embodiment of the hole sealing area before irradiation of the first laser in the embodiment is shown, and Fig. 10B An embodiment in which a bonding area is formed in a hole sealing area after irradiation of a first laser is shown.

[0026] Fig.11 An example of variation in bonding strength of a display panel is shown.

[0027] Fig.12 An embodiment of a method for manufacturing a display device is shown.

[0028] FIG. 13A to FIG. 13E Different stages of a manufacturing process of a display device according to an embodiment are shown.

[0029] Fig.14A and Fig. 14B A manufacturing process of a display device according to an embodiment is shown.

[0030] FIG. 15A to FIG. 15D A manufacturing process of a display device according to an embodiment is shown.

[0031] It should be noted that these figures are intended to illustrate the general characteristics of the methods, structures and / or materials used in certain example embodiments, and are intended to supplement the written description provided below. However, these drawings are not drawn to scale and may not accurately reflect the precise structure or performance characteristics of any given embodiment, and should not be interpreted as defining or limiting the range of values ​​or properties contained in the example embodiments. For example, for clarity, the relative thickness and position of molecules, layers, regions and / or structural elements may be reduced or enlarged. The use of similar or identical reference numerals in the drawings may indicate the presence of similar or identical elements or features. DETAILED DESCRIPTION

[0032] Example embodiments of the present invention will now be described more fully with reference to the accompanying drawings showing example embodiments. However, example embodiments of the present invention may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and the concepts of the example embodiments will be fully communicated to those of ordinary skill in the art. In the accompanying drawings, the sizes of layers and regions are exaggerated for clarity. The same reference numerals in the drawings represent the same elements, and therefore their descriptions will be omitted.

[0033] It should be understood that when an element is referred to as being "connected" or "coupled" to another element, the element may be directly connected or coupled to the other element, or there may be an intermediate element. On the contrary, when an element is referred to as being "directly connected" or "directly coupled" to another element, there is no intermediate element. Throughout the specification, the same reference numerals indicate the same elements. As used herein, the term "and / or" includes any and all combinations of one or more of the related listed items. Other wordings used to describe the relationship between elements or layers should be interpreted in the same manner (e.g., "between" and "directly between", "adjacent" and "directly adjacent", "on" and "directly on").

[0034] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the example embodiments, the first element, component, region, layer or part discussed below may be referred to as a second element, component, region, layer or part.

[0035] Spatially relative terms such as "beneath", "below", "lower", "above", "upper", etc. may be used herein for convenience of description to describe the relationship of one element or feature to another element or feature as shown in the figure. It should be understood that in addition to the orientation shown in the figure, the spatially relative terms are intended to include different orientations of the device in use or operation. For example, if the device in the figure is turned over, the element described as being "below" or "beneath" other elements or features will subsequently be oriented to be "above" other elements or features. Therefore, the exemplary term "below" may include both the orientations of above and below. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein are interpreted accordingly.

[0036] The terms used herein are for the purpose of describing specific embodiments only and are not intended to be limiting of the example embodiments. Unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" as used herein are also intended to include the plural forms. It will also be understood that if the terms "comprise", "comprising", "include", and / or "including" are used herein, the presence of stated features, wholes, steps, operations, elements, and / or parts is indicated, but the presence or addition of one or more other features, wholes, steps, operations, elements, parts, and / or clusters thereof is not excluded.

[0037] Example embodiments of the present invention are described herein with reference to cross-sectional views that are schematic representations of idealized embodiments (and intermediate structures) of example embodiments. Thus, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and / or tolerances are to be expected. Thus, example embodiments of the present invention should not be construed as limited to the specific shapes of the regions shown herein, but rather include deviations in shape resulting, for example, from manufacturing.

[0038] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the exemplary embodiments of the inventive concept belong. It should also be understood that, unless explicitly defined as such herein, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and will not be interpreted in an idealized or overly formal sense.

[0039] Figure 1 shows an embodiment of a display device DD, Figure 2 shows an exploded view of a display device DD according to an embodiment, and Figure 3 FIG. 2 shows a functional block diagram of a display device DD according to an embodiment. Figure 1 , Figure 2 and Figure 3 In an embodiment, the display device DD may be selectively activated based on an applied electrical signal. The display device DD may be included, for example, in a smart phone, a tablet computer, a notebook, a computer, a media player, a navigation device, an Internet of Things (IoT) device, a monitor, and a smart TV, as well as other electronic devices that display information. For illustrative purposes, the following description considers the case where the display device DD is implemented in a smart phone.

[0040] like Figure 1As shown in , the display device DD may include a front surface displaying an image IM. The front surface may be parallel to a plane defined by a first direction DR1 and a second direction DR2. In an exemplary embodiment, the display device DD may have a rectangular shape having a long side extending in the first direction DR1 and a short side extending in the second direction DR2 perpendicular to the first direction DR1. In another embodiment, the display device DD may have a different shape.

[0041] like Figure 1 and Figure 2 As shown in , the display device DD may include a window member WD, a display panel DP, an electronic module EM and a housing member HS. Figure 3 As shown in , the display device DD may further include a power module PM. Figure 3 Some of the elements in the figure may be omitted from the figures described below. Figures 1 to 3 The display device DD is described in more detail.

[0042] The window member WD may include a front surface corresponding to the display panel DP and protecting the front surface of the display panel DP. The window member WD may include, for example, a glass substrate, a sapphire substrate, or a plastic film. The window member WD may have a single-layer structure or a multi-layer structure. In one embodiment, the window member WD may have a stacked structure including a plurality of plastic films coupled together by an adhesive layer, or may have a stacked structure including a glass substrate and a plastic film coupled together by an adhesive layer.

[0043] The front surface of the window member WD may include a transmissive area TA and a light blocking area CA. The transmissive area TA may transmit an image IM for the user USER to observe. As an example, Figure 1 The image IM shown in includes an Internet search window.

[0044] The light-blocking area CA may be adjacent to the transmissive area TA and may be transparent or have a specific color. In one embodiment, the light-blocking area CA may surround the transmissive area TA. In another embodiment, the light-blocking area CA may be adjacent to only one (or less than all) of the side areas of the transmissive area TA, or may be completely omitted.

[0045] The direction perpendicular to the front surface of the display device DD may correspond to the thickness direction of the display device DD. For the convenience of description, the normal direction of the front surface of the display device DD (for example, the propagation direction of the image or light in the display device DD) may be referred to as the upward direction, and the direction opposite to the upward direction may be referred to as the downward direction. In one embodiment, the upward direction and the downward direction may extend in a third direction DR3 orthogonal to the first direction DR1 and the second direction DR2. Hereinafter, the front surface and the rear surface of each of the elements described below will be distinguished based on the third direction DR3. However, the upward direction and the downward direction may be relative concepts, and may indicate other directions in another embodiment.

[0046] The display panel DP may include a display unit DPU that displays an image IM. When viewed in a plan view, the display panel DP may include a display area DA, a non-display area NDA, and a hole area HA. ​​The display area DA may display the image IM (e.g., emit light corresponding thereto). The image IM may be displayed based on light emitted from a plurality of pixels PX in the display area DA. The non-display area NDA and the hole area HA may not emit light corresponding to the image IM. In one embodiment, the non-display area NDA may have a shape that surrounds the display area DA or is adjacent to the display area DA.

[0047] The display panel DP may have at least one module hole MH extending in the third direction DR3. In one embodiment, the module hole MH may be a through hole that penetrates the display panel DP from its front surface to the rear surface. If an element is arranged on the rear surface of the display panel DP and overlaps with the module hole MH, the user may observe such element through the front surface of the display panel DP due to the presence of the module hole MH. In the present embodiment, the module hole MH has a cylindrical shape elongated in the third direction DR3. In another embodiment, the module hole MH may have a different shape, for example, a polygon, an elliptical cylinder, a truncated pyramid, or a cone.

[0048] When viewed in a plan view, the module hole MH may overlap with the electronic module EM. The electronic module EM may be inserted into the module hole MH. The electronic module EM may receive an external input through the module hole MH. The electronic module EM may receive an input signal through the module hole MH, and then may provide the input signal to the display panel DP. The geometric features of the electronic module EM may be designed to allow the electronic module EM to be accommodated in the module hole MH. For example, the electronic module EM may have a size equal to or smaller than the module hole MH.

[0049] The hole area HA may surround the module hole MH. When viewed in a plan view, the hole area HA may be spaced apart from the non-display area NDA with the display area DA interposed therebetween. In one embodiment, the hole area HA may be surrounded by the display area DA. Figure 4 and Figures 7 to 9Embodiments of the pore area HA are described in more detail.

[0050] The display panel DP may further include an input sensing unit ISU that senses an external input signal. The external input signal may include various types of signals generated by externally applied stimuli or effects. For example, the input signal may be generated based on an externally applied touch or external light, heat, or pressure from a part of the user's body. In the present embodiment, the input signal is a touch signal.

[0051] The display panel DP may generate an input signal based on an input received by the display area DA, but may not generate an input signal based on an input received by the non-display area NDA. In an embodiment, the display panel DP may generate an input signal based on an input received by the non-display area NDA, but may not generate an input signal based on an input received by the display area DA. In an embodiment, the display panel DP may generate an input signal based on an input received by a front surface of the display panel DP including the display area DA and the non-display area NDA. In an embodiment, the display panel DP may generate an input signal based on inputs received by various areas depending on the internal configuration of the display panel DP, but the inventive concept is not limited to a specific embodiment.

[0052] For illustrative purposes, Figure 1 An example of an input signal generated by a part of the user's body (e.g., a hand or a finger) is shown. However, the inventive concept is not limited to this example, and in an exemplary embodiment, the display device DD may sense various types of input signals. In an embodiment, the input sensing unit ISU may be provided as an element separate from the display panel DP and may be arranged on the display panel DP. In an embodiment, the input sensing unit ISU may be omitted. For convenience of illustration, the input sensing unit ISU is omitted from the figures described below.

[0053] The shell member HS may be arranged on the rear surface of the display panel DP. The shell member HS may be combined with the window member WD to define the rear surface of the display device DD. In one embodiment, the shell member HS may be combined with the window member WD to include an internal space therebetween. The internal space may accommodate various components of the display device DD (e.g., the display panel DP, the electronic module EM and / or electronic and optical components). The shell member HS may be formed of or include a material having relatively high rigidity or strength. In an embodiment, the shell member HS may include a plurality of frames and / or plates, each of the plurality of frames and / or plates being formed of at least one of glass, plastic and metal materials. The shell member HS may protect the components of the display device DD stored in the internal space from external impacts.

[0054] The display device DD may also include an anti-reflection member between the display panel DP and the window member WD. The anti-reflection member may prevent external light incident on the display device DD from being reflected by the display panel DP and recognized by the user. For example, the anti-reflection member may include a polarizing layer and a phase delay layer.

[0055] Reference Figure 3 , the display device DD may include a power module PM, a first electronic module EM1, and a second electronic module EM2. The power module PM may supply power to the display device DD. In one embodiment, the power module PM may include a battery module.

[0056] The first electronic module EM1 and the second electronic module EM2 may include one or more functional modules for operating the display device DD. The first electronic module EM1 may be directly mounted on a printed circuit board or a flexible circuit board electrically connected to the display panel DP.

[0057] The first electronic module EM1 may include a control module CM, a wireless communication module TM, an image input module IIM, an audio input module AIM, a memory MM, and an external interface IF. The control module CM may control the overall operation of the display device DD. The control module CM may be, for example, a microprocessor. In an embodiment, the display panel DP may be activated or deactivated under the control of the control module CM. The control module CM may control other modules based on a touch signal received from the display panel DP, including but not limited to the image input module IIM and / or the audio input module AIM.

[0058] The wireless communication module TM can transmit wireless signals to another terminal and receive wireless signals from another terminal, for example, via a Bluetooth link or a Wi-Fi line. The wireless communication module TM can transmit and receive voice signals via a communication line. The wireless communication module TM may include a transmitter TM1 and a receiver TM2. The transmitter TM1 can modulate and transmit signals, and the receiver TM2 can demodulate received signals.

[0059] The image input module IIM may process and convert image signals into image data for display on the display panel DP. The sound input module AIM may receive and convert external sound signals (eg, obtained by a microphone in a recording mode, a voice recognition mode, etc.) into electronic voice data.

[0060] The external interface IF may be connected to an external charger, a wired / wireless data port, a card slot (eg, a slot for a memory card or a SIM / USIM card), and / or other features.

[0061] The second electronic module EM2 may include an acoustic output module AOM, a light emitting module LM, a light receiving module LRM, a camera module CMM, etc. The module may be mounted on a printed circuit board or a flexible circuit board and may be electrically connected to the display panel DP or the first electronic module EM1.

[0062] The sound output module AOM may convert sound data received from the wireless communication module TM or stored in the memory MM and output the converted sound data to the outside.

[0063] The light emitting module LM may generate and output light. In one embodiment, the light emitting module LM may emit infrared light. The light emitting module LM may include a light emitting diode (LED) device, and the light receiving module LRM may sense the infrared light. For example, when the incident infrared light has an intensity higher than a reference value, the light receiving module LRM may be activated. The light receiving module LRM may include, for example, a CMOS sensor. The infrared light emitted from the light emitting module LM may be reflected by an external object (e.g., a finger or face of a user) and may be received by the light receiving module LRM. The camera module CMM may be used to obtain an image of an external object.

[0064] Figure 2 The electronic module EM shown in the figure may receive an external input transmitted through the module hole MH, or may provide an output signal through the module hole MH. The electronic module EM may include a first electronic module EM1 and / or a second electronic module EM2. Examples of the electronic module EM include a camera, a speaker, a light sensing sensor, and a heat sensing sensor. In an embodiment, the electronic module EM may sense a signal of an external object received through the module hole MH, and may provide a sound (e.g., voice) signal to the outside through the module hole MH. The remaining elements of the first electronic module EM1 and the second electronic module EM2 may be arranged at various positions. In an embodiment, the electronic module EM may include two or more of the modules included in the first electronic module EM1 and the second electronic module EM2.

[0065] In an embodiment, the display device DD may further include a transparent member between the electronic module EM and the display panel DP. The transparent member may be an optically transparent film that allows an external input transmitted through the module hole MH to pass through the transparent member and reach the electronic module EM. The transparent member may be attached to the rear surface of the display panel DP, or may be located between the display panel DP and the electronic module EM without an additional adhesive layer.

[0066] In an embodiment, the electronic module EM may be inserted into the module hole MH. According to an embodiment of the inventive concept, since the module hole MH is formed in the display panel DP, it may not be necessary to provide an additional space for the electronic module EM outside the non-display area NDA. In addition, since the module hole MH is defined in the hole area HA surrounded by the display area DA, the electronic module EM may overlap with the transmission area TA without overlapping with the light blocking area CA. Therefore, the area of ​​the light blocking area CA can be reduced, which in turn can allow the frame of the display device DD to have a narrower or reduced size. In addition, in the case where the electronic module EM is disposed in the module hole MH, the thickness of the display device DD can be reduced.

[0067] Figure 4 Shows Figure 2 Implementation example of an equivalent circuit diagram of a pixel PX. Figure 5 Shown along Figure 2 A cross-sectional view taken along line II'.

[0068] Reference Figure 4 and Figure 5 , the display panel DP may include a base substrate BS, a device layer DP-E, a filling layer DP-S, and an encapsulation substrate EN. The device layer DP-E and the filling layer DP-S may be located between the base substrate BS and the encapsulation substrate EN. The device layer DP-E may be located on the base substrate BS. The device layer DP-E and the base substrate BS may be included in the display substrate. The encapsulation substrate EN may cover the device layer DP-E. The device layer DP-E may include a circuit layer DP-C and a display layer DP-D. The circuit layer DP-C and the display layer DP-D may include components of the pixel PX.

[0069] The pixel PX may be included in the display area DA and may generate light to form an image IM. In an embodiment, a plurality of pixels PX may be arranged on the display area DA.

[0070] like Figure 5 As shown in , the pixel PX may be connected to a plurality of signal lines. In the present embodiment, the gate line GL, the data line DL, and the power line VDD are shown as examples of the signal lines. In one embodiment, the pixel PX may be connected to one or more other signal lines.

[0071] The pixel PX may include a first thin film transistor TR1, a capacitor CAP, a second thin film transistor TR2, and a light emitting element OD. In at least one embodiment, the remaining elements of the pixel PX (eg, the first thin film transistor TR1, the capacitor CAP, and the second thin film transistor TR2) except the light emitting element OD may be referred to as a driving device.

[0072] The first thin film transistor TR1 may be a switching device for controlling an on / off switching operation of the pixel PX. The first thin film transistor TR1 may transmit or block a data signal transmitted through the data line DL based on a gate signal transmitted through the gate line GL.

[0073] The capacitor CAP may be connected to the first thin film transistor TR1 and the power line VDD. The capacitor CAP may store, for example, an amount of charge determined by a voltage difference between a data signal transmitted from the first thin film transistor TR1 and a first power voltage applied to the power line VDD.

[0074] The second thin film transistor TR2 may be connected to the first thin film transistor TR1, the capacitor CAP, and the light emitting element OD. The second thin film transistor TR2 may control the driving current flowing through the light emitting element OD based on the amount of charge stored in the capacitor CAP. The on time of the second thin film transistor TR2 may be determined depending on the amount of charge stored in the capacitor CAP. During the on time, the second thin film transistor TR2 may provide the first power supply voltage (which is transmitted through the power line VDD) to the light emitting element OD.

[0075] The light emitting element OD may be connected to the second thin film transistor TR2 and the power supply terminal VSS. The light emitting element OD may emit light having an intensity determined, for example, by a voltage level difference between a signal transmitted by the second thin film transistor TR2 and a second power supply voltage received through the power supply terminal VSS. During the on-time of the second thin film transistor TR2, the light emitting element OD may emit light.

[0076] The light emitting element OD may include an electroluminescent material. The color of light emitted from the light emitting element OD may be determined depending on the type of the electroluminescent material. In some embodiments, the color of light emitted from the light emitting element OD may be one of red, green, blue, and white.

[0077] exist Figure 5 FIG. 4 shows an example of one of the thin film transistors of the pixel PX (eg, the pixel transistor TR-P) and the light emitting element OD. The pixel transistor TR-P may correspond to Figure 4 The second thin film transistor TR2 is shown in FIG.

[0078] The pixel transistor TR-P and a plurality of insulating layers (e.g., a first insulating layer 10, a second insulating layer 20, and a third insulating layer 30) may be included in the circuit layer DP-C. Each of the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30 may be formed of an organic material and / or an inorganic material, or include an organic material and / or an inorganic material, and may have a single-layer structure or a stacked structure. The circuit layer DP-C may be located on a base substrate BS. The base substrate BS may be an insulating substrate. For example, the base substrate BS may be formed of various insulating materials, or include various insulating materials such as glass or plastic materials.

[0079] In an implementation, the display panel DP may further include a functional layer BL between the base substrate BS and the device layer DP-E. The functional layer BL may be directly formed on the base substrate BS to cover the front surface of the base substrate BS.

[0080] The functional layer BL may be formed of an inorganic material or include an inorganic material. The functional layer BL may include a barrier layer and / or a buffer layer. Therefore, the functional layer BL may prevent oxygen or moisture from entering the circuit layer DP-C or the display layer DP-D through the base substrate BS, and may allow the circuit layer DP-C to be stably formed on the base substrate BS. The inventive concept is not limited to a specific material of the functional layer BL. In some embodiments, the functional layer BL may be omitted.

[0081] The pixel transistor TR-P may include a semiconductor pattern SP, a control electrode CE, an input electrode IE, and an output electrode OE. The semiconductor pattern SP may be arranged on the base substrate BS and may be formed of a semiconductor material or include a semiconductor material. The control electrode CE may be spaced apart from the semiconductor pattern SP with the first insulating layer 10 interposed therebetween. The control electrode CE may be connected to Figure 4 One of the electrodes of the first thin film transistor TR1 and one electrode of the capacitor CAP shown in FIG.

[0082] The input electrode IE and the output electrode OE may be spaced apart from the control electrode CE with the second insulating layer 20 interposed therebetween. The input electrode IE and the output electrode OE of the pixel transistor TR-P may penetrate the first and second insulating layers 10 and 20 and may be coupled to corresponding portions of the semiconductor pattern SP.

[0083] The third insulating layer 30 may be located on the second insulating layer 20 and may cover the input electrode IE and the output electrode OE. In the pixel transistor TR-P, the semiconductor pattern SP may be located on (or in contact with) the control electrode CE. In an embodiment, the semiconductor pattern SP may be located on (or in contact with) the input electrode IE and the output electrode OE. In an embodiment, the input electrode IE and the output electrode OE may be located on the same layer as the semiconductor pattern SP and may be directly coupled to the semiconductor pattern SP. In another embodiment, the structure of the pixel transistor TR-P may be different.

[0084] The light emitting element OD may be located on the circuit layer DP-C. The light emitting element OD and one of the insulating layers (e.g., the fourth insulating layer 40) may be included in the display layer DP-D. The light emitting element OD may include a first electrode E1, a light emitting layer EL, and a second electrode E2. The fourth insulating layer 40 may be formed of an organic material and / or an inorganic material, or include an organic material and / or an inorganic material, and may have a single-layer structure or a stacked structure.

[0085] The first electrode E1 may penetrate the third insulating layer 30 and may be coupled to the pixel transistor TR-P. The display panel DP may further include an additional connection electrode between the first electrode E1 and the pixel transistor TR-P. In this case, the first electrode E1 may be electrically coupled to the pixel transistor TR-P through the connection electrode.

[0086] The fourth insulating layer 40 may be located on the third insulating layer 30. The fourth insulating layer 40 may have an opening defined therein to expose at least a portion of the first electrode E1. The fourth insulating layer 40 may be a pixel defining layer.

[0087] The light emitting layer EL may be arranged in the opening and on the first electrode E1 exposed through the opening. The light emitting layer EL may include an electroluminescent material. In one embodiment, the light emitting layer EL may be formed of at least one of an electroluminescent material emitting red light, green light, and blue light, and / or may include at least one of a fluorescent material and a phosphorescent material. The light emitting layer EL may be formed of an organic electroluminescent material or an inorganic electroluminescent material, or include an organic electroluminescent material or an inorganic electroluminescent material. The light emitting layer EL may emit light based on a potential difference between the first electrode E1 and the second electrode E2.

[0088] The second electrode E2 may be located on the light emitting layer EL facing the first electrode E1. The second electrode E2 may be a single body extending from the display area DA to the non-display area NDA. The second electrode E2 may be provided in common to a plurality of pixels PX. Each of the pixels PX may include a light emitting element OD that may receive a common power supply voltage (e.g., a second power supply voltage) through the second electrode E2.

[0089] The second electrode E2 may be formed of a transparent conductive material or a transflective conductive material, or include a transparent conductive material or a transflective conductive material. Therefore, the light generated by the light emitting layer EL can be easily emitted in the third direction DR3 through the second electrode E2. In an embodiment, the light emitting element OD may be designed to have a back-emitting structure in which the first electrode E1 includes a transparent or semi-transflective material, or a double-sided emission structure that allows light to be emitted through its top and bottom surfaces.

[0090] In an embodiment, the display panel DP may further include a thin film transistor TR-D (eg, a driving transistor) and a plurality of signal patterns E-VSS, E-CNT, and CL arranged on the non-display area NDA. The driving transistor TR-D and the signal patterns E-VSS, E-CNT, and CL may be included in the circuit layer DP-C.

[0091] In an example embodiment, the driving transistor TR-D may have a structure corresponding to the pixel transistor TR-P. For example, the driving transistor TR-D may include a semiconductor pattern SP arranged on the base substrate BS, a control electrode CE arranged on the first insulating layer 10, and an input electrode IE and an output electrode OE arranged on the second insulating layer 20. Therefore, the pixel transistor TR-P and the driving transistor TR-D may be simultaneously formed by the same process, which may simplify manufacturing and reduce process costs. In an embodiment, the driving transistor TR-D may be formed to have a structure different from that of the pixel transistor TR-P.

[0092] The signal patterns E-VSS, E-CNT, and CL may include a power supply line E-VSS, a connection electrode E-CNT, and a drive signal line CL. The power supply line E-VSS may correspond to a power supply terminal VSS of the pixel PX. Therefore, the power supply line E-VSS may supply the second power supply voltage to the light emitting element OD. In this embodiment, the second power supply voltage may be commonly supplied to all pixels PX.

[0093] The power supply line E-VSS may be arranged on the second insulating layer 20 and may be included in the circuit layer DP-C. The power supply line E-VSS may be formed simultaneously with the input electrode IE or the output electrode OE of the driving transistor TR-D by the same process. In an embodiment, the power supply line E-VSS may be on a different layer from the input electrode IE or the output electrode OE of the driving transistor TR-D and may be formed separately by an additional process.

[0094] The connection electrode E-CNT may be located on the third insulating layer 30 and in the display layer DP-D. The connection electrode E-CNT may be electrically coupled to the power supply line E-VSS. The connection electrode E-CNT may extend from the third insulating layer 30 to cover the top surface of the power supply line E-VSS exposed by the third insulating layer 30.

[0095] The second electrode E2 of the light emitting element OD may extend from the display area DA and may be coupled to the connection electrode E-CNT. The connection electrode E-CNT may receive a second power supply voltage from the power supply line E-VSS. Therefore, the second power supply voltage may be transmitted to the second electrode E2 through the connection electrode E-CNT and may be provided to each of the pixels PX.

[0096] The connection electrode E-CNT may be located on the same layer as the first electrode E1 of the light emitting element OD and may be formed simultaneously with the first electrode E1. In an embodiment, the connection electrode E-CNT may be located on a different layer from the first electrode E1.

[0097] In an embodiment, a plurality of driving signal lines CL may be located on the second insulating layer 20 and positioned in the non-display area NDA. The driving signal lines CL may be routing lines connected to one or more pads, or may be lines included in an integrated circuit (IC). The driving signal lines CL may be spaced apart from each other in the first direction DR1 and may be used to transmit corresponding electrical signals in an independent manner.

[0098] The filling layer DP-S may be located between the device layer DP-E and the encapsulation substrate EN. In an embodiment, the filling layer DP-S may include an inert gas. The filling layer DP-S may prevent diffusion of contaminants or foreign substances that may exist between the device layer DP-E and the encapsulation substrate EN.

[0099] Figure 6 shows an embodiment of the display panel DP, Figure 7 Shows Figure 2 is an enlarged plan view of area A1 in FIG. 1 , and Figure 8 Shown along Figure 2 A cross-sectional view taken along line II-II'.

[0100] Combination Figure 4 and Figure 5 Reference Figures 6 to 8 The non-display area NDA may have a frame shape surrounding the display area DA. The non-display area NDA of the display panel DP may include a substrate sealing area SA1. The substrate sealing area SA1 may be defined along an edge of the non-display area NDA.

[0101] As described above, the hole area HA of the display panel DP may be surrounded or enclosed by the display area DA. In one embodiment, the hole area HA may have a ring shape surrounding the module hole MH.

[0102] The pixels PX may be arranged to surround the hole area HA. ​​Some of the pixels PX may be arranged along an edge of the hole area HA. ​​When viewed in a plan view, the pixels PX may be spaced apart from the module hole MH.

[0103] The hole area HA may include a hole sealing area SA2, a wiring area SLA, and a margin area MA. The margin area MA may have a ring shape surrounding the module hole MH. The hole sealing area SA2 may be located outside the margin area MA and may have a ring shape surrounding the margin area MA. According to an embodiment of the inventive concept, the display substrate and the encapsulation substrate EN may be combined with each other in the hole sealing area SA2. In the present embodiment, the width of the hole sealing area SA2 may be less than about 100 μm, but may have a different width in another embodiment.

[0104] The wiring area SLA may be located outside the hole sealing area SA2 and may have a ring shape surrounding the hole sealing area SA2. In the wiring area SLA, the display substrate and the encapsulation substrate EN may be spaced apart from each other by a certain distance. In other words, the display substrate and the encapsulation substrate EN may not be combined with each other in the wiring area SLA.

[0105] A plurality of signal lines SL1 and SL2 connected to the pixel PX may be disposed in the wiring area SLA. Figure 7 Some of the signal lines (eg, the first signal line SL1 and the second signal line SL2 ) connected to the pixels PX are exemplarily shown in FIG.

[0106] In the display area DA, the first signal line SL1 may extend in the first direction DR1 and may be connected to some of the pixels PX arranged in the first direction DR1 to form a single column. The first signal line SL1 may correspond to, for example, a data line DL (eg, see Figure 4 ).

[0107] In the wiring area SLA, the first signal line SL1 may have a bent shape. Figure 7 As shown in FIG. 1 , the first signal line SL1 in the wiring area SLA may extend along the outer circumference of the module hole MH and thus may have a semicircular shape. In another embodiment, the first signal line SL1 may have a different shape in the wiring area SLA.

[0108] When viewed in a plan view, some of the pixels PX connected to the first signal line SL1 may be located above the module hole MH, and other pixels PX may be located below the module hole MH. Therefore, although the module hole MH exists between the pixels PX in the same column, the pixels PX connected to the first signal line SL1 and included in the same column may receive the same data signal through the same line.

[0109] In the display area DA, the second signal line SL2 may extend in the second direction DR2 and may be commonly connected to the pixels PX arranged in the second direction DR2 in the same row. The second signal line SL2 may correspond to, for example, the gate line GL (eg, see Figure 4 ).

[0110] In the wiring area SLA, the second signal line SL2 may have a bent shape. Figure 7 As shown in FIG. 1 , the second signal line SL2 in the wiring area SLA may extend along the outer circumference of the module hole MH and thus may have a semicircular shape. In another embodiment, the second signal line SL2 may have a different shape in the wiring area SLA.

[0111] When viewed in a plan view, some of the pixels PX connected to the second signal line SL2 may be located on the left side of the module hole MH, and other pixels PX may be located on the right side of the module hole MH. Therefore, although the module hole MH exists between the pixels PX in the same row, the pixels PX connected to the second signal line SL2 in the same row may be turned on or off by substantially the same gate signal.

[0112] The margin area MA may be located between the hole sealing area SA2 and the module hole MH. The margin area MA may prevent the hole sealing area SA2 from being damaged by variations in the patterning process, which may occur when the module hole MH is formed after the bonding process between the display substrate and the encapsulation substrate EN. The display substrate and the encapsulation substrate EN are bonded in the hole sealing area SA2.

[0113] In this embodiment, the display substrate and the encapsulation substrate EN may be bonded to each other in the substrate sealing area SA1 and the hole sealing area SA2. Figure 5 and Figure 8 As shown in , the display panel DP may further include a substrate sealing member SM1 and a hole sealing member SM2 respectively arranged in the substrate sealing area SA1 and the hole sealing area SA2. The substrate sealing member SM1 may be located between the display substrate and the encapsulation substrate EN and in the substrate sealing area SA1. The hole sealing member SM2 may be located between the display substrate and the encapsulation substrate EN and in the hole sealing area SA2. The thickness of each of the substrate sealing member SM1 and the hole sealing member SM2 may be, for example, in the range of about 4.5 μm to about 5.5 μm.

[0114] Each of the substrate sealing member SM1 and the hole sealing member SM2 may be formed of a glass material or include a glass material. For example, each of the substrate sealing member SM1 and the hole sealing member SM2 may be provided in a molten state of a frit including a glass powder.

[0115] In the present embodiment, the substrate sealing member SM1 and the hole sealing member SM2 may include the same material, but may include different materials in another embodiment. In some embodiments, the hole sealing member SM2 may include a glass material, but the substrate sealing member SM1 may not include a glass material.

[0116] In this embodiment, the display substrate and the encapsulation substrate EN may be joined in the substrate sealing area SA1 by the substrate sealing member SM1. In one embodiment, the display substrate and the encapsulation substrate EN may be joined in the hole sealing area SA2 surrounding the module hole MH by the hole sealing member SM2. Therefore, it is possible to prevent moisture or contaminants from entering the device layer DP-E between the display substrate and the encapsulation substrate EN.

[0117] Fig. 9 FIG. 4 shows a cross-sectional view of a bonding area between a display substrate and an encapsulation substrate EN according to an embodiment. Fig. 9 The device layer DP-E is partially shown in FIG.

[0118] According to an embodiment of the present inventive concept, at least the display substrate and the encapsulation substrate EN in the hole sealing area SA2 may be bonded to each other by a first laser. For example, the first laser may be irradiated onto the hole sealing area SA2. The first laser may be, for example, an ultra-high frequency pulse laser. In one embodiment, the first laser may be a femtosecond laser. The term "femtosecond laser" may be understood to include a laser having a pulse duration of less than picoseconds or in the order of femtoseconds.

[0119] When the first laser is irradiated onto the hole sealing area SA2, the bonding area PHA may be formed between the display substrate and the encapsulation substrate EN in the hole sealing area SA2. The bonding area PHA may have a spherical shape. In the present embodiment, the bonding area PHA may be formed on the interface between the hole sealing member SM2 and the encapsulation substrate EN, or on the interface between the hole sealing member SM2 and the base substrate BS. The width d1 of the bonding area PHA may be in the range of, for example, about 70 μm to about 100 μm. In another embodiment, the bonding area PHA may have a different shape or width d1.

[0120] In the present embodiment, the bonding area PHA may be a zone that absorbs the energy of the first laser. In the case where the first laser is irradiated to the base substrate BS, the hole sealing member SM2 and the encapsulation substrate EN, each of the base substrate BS, the hole sealing member SM2 and the encapsulation substrate EN may absorb the energy of the first laser and may undergo a change of state. For example, in the case where the first laser is irradiated to the base substrate BS, the hole sealing member SM2 and the encapsulation substrate EN, at least a portion of each of the base substrate BS, the hole sealing member SM2 and the encapsulation substrate EN may melt in the bonding area PHA and mix with each other. Therefore, in the case where the contact surface between the hole sealing member SM2 and the encapsulation substrate EN or the contact surface between the hole sealing member SM2 and the base substrate BS overlaps with the bonding area PHA, at least a portion of the interface between the hole sealing member SM2 and the encapsulation substrate EN or at least a portion of the interface between the hole sealing member SM2 and the base substrate BS may become unclear.

[0121] The joining area PHA may include a focusing area CTA formed at a predetermined position (e.g., center) of the joining area PHA. The focusing area CTA may correspond to a region including a focus of the first laser, and may be defined as a portion of the joining area PHA where the energy of the first laser is concentrated and has the highest energy absorption rate. When viewed in a cross-sectional view, the focusing area CTA may have an elliptical shape with a longitudinal axis parallel to the third direction DR3. For example, the length d2 of the longitudinal axis may be less than 200 μm. In another embodiment, the focusing area CTA may have a different shape. For example, in an embodiment, when viewed in a cross-sectional view, the focusing area CTA may have a circular shape, a water drop shape, or a polygonal shape.

[0122] Fig. 10A An example of an image of an enlarged shape of the hole sealing area SA2 before irradiation of the first laser is shown, and Fig. 10B FIG. 4 shows an example of an image of an enlarged shape of the landing area PHA formed in the hole sealing area SA2 after the irradiation of the first laser. Fig. 10A As shown in FIG, before the first laser is irradiated to the hole sealing area SA2, the interface between the hole sealing member SM2 and the encapsulation substrate EN and the interface between the hole sealing member SM2 and the base substrate BS are different. Fig. 10B As shown in , after the first laser is irradiated to the hole sealing area SA2 , the interface between the hole sealing member SM2 and the encapsulation substrate EN and the interface between the hole sealing member SM2 and the base substrate BS become blurred.

[0123] According to an embodiment of the present invention, when a first laser (for example, outputting an ultra-high frequency pulse energy beam) is used to bond the base substrate BS and the encapsulation substrate EN in the hole sealing area SA2, the base substrate BS, the hole sealing member SM2, and the encapsulation substrate EN corresponding to the hole sealing area SA2 may absorb energy nonlinearly to form a bonding area PHA. For example, at least a portion of each of the base substrate BS, the hole sealing member SM2, and the encapsulation substrate EN in the bonding area PHA may undergo a change in state, and then may be mixed with each other at their interfaces. This may result in an increase in the bonding strength between the base substrate BS, the hole sealing member SM2, and the encapsulation substrate EN. Therefore, according to an embodiment of the present invention, the durability of the display device DD can be increased.

[0124] In addition, according to an embodiment of the inventive concept, even when the width of the hole sealing area SA2 is reduced, the display substrate and the encapsulation substrate EN may not be delaminated or damaged. In one embodiment of the inventive concept, as described above, the width of the hole sealing area SA2 may be less than about 100 μm. Therefore, the dead area around the module hole MH may be reduced so that the aesthetic appearance of the display device DD can be improved. In another embodiment, the width of the hole sealing area SA2 may be different.

[0125] In the above-mentioned embodiment, an example of irradiating the first laser onto the hole sealing area SA2 is discussed. In another embodiment, the first laser may be irradiated onto the substrate sealing area SA1 to bond the base substrate BS and the encapsulation substrate EN.

[0126] In addition, in the present embodiment, the display panel DP may include a substrate sealing member SM1 and a hole sealing member SM2. In another embodiment, at least one of the substrate sealing member SM1 and the hole sealing member SM2 may be omitted. In this case, in the sealing area SA1 or SA2 (in which the sealing member SM1 or SM2 is omitted), a portion of each of the top surface of the display substrate (e.g., the base substrate BS) and the bottom surface of the encapsulation substrate EN may be melted and mixed by the first laser. The display substrate and the encapsulation substrate EN may be joined by mixing the melted portions of the base substrate BS and the encapsulation substrate EN in the sealing area SA1 or SA2.

[0127] Fig.11 Graphs showing examples of changes in the bonding strength of the display panel DP that may occur according to an embodiment of the inventive concept are shown. Fig.11 In case 1, when the base substrate BS and the encapsulation substrate EN are bonded using a laser having a longer oscillation duration than the first laser (e.g., a CW laser), the bonding strength between the base substrate BS and the encapsulation substrate EN is about 4.94 kgf. When the base substrate BS and the encapsulation substrate EN are bonded using the first laser according to an embodiment of the inventive concept, the bonding strength between the base substrate BS and the encapsulation substrate EN is about 5.78 kgf.

[0128] exist Fig.11 In case 2, when a laser having a longer oscillation duration than the first laser is used to bond the base substrate BS and the encapsulation substrate EN, the bonding strength between the base substrate BS and the encapsulation substrate EN is about 4.26 kgf. When the base substrate BS and the encapsulation substrate EN are bonded using the first laser according to an embodiment of the present inventive concept, the bonding strength between the base substrate BS and the encapsulation substrate EN is about 5.23 kgf. Therefore, as shown in cases 1 and 2, when the first laser is used to bond the display panel DP, the bonding strength can be increased compared to the case of using other lasers.

[0129] Fig.12 A method for manufacturing a display device DD according to an embodiment of the present inventive concept is shown, and FIG. 13A to FIG. 13E 1 is a cross-sectional view showing a manufacturing process of a display device DD according to an embodiment of the present invention. Fig.12 and FIG. 13A to FIG. 13E A method of manufacturing the display panel DP is described.

[0130] like Fig.12 and 13A As shown in , the method includes providing a display substrate (S1). Providing the display substrate may include, for example, forming a device layer DP-E on a base substrate BS. The device layer DP-E may include a plurality of pixels PX. The device layer DP-E may not overlap with the substrate sealing area SA1 and the hole sealing area SA2. The base substrate BS and the device layer DP-E may constitute a display substrate.

[0131] Afterwards, if Fig.12 and Fig. 13B As shown in , the substrate sealing member SM1 and the hole sealing member SM2 may be arranged on the encapsulation substrate EN (S2). In one embodiment, the substrate sealing member SM1 may be arranged on the substrate sealing area SA1, and the hole sealing member SM2 may be arranged on the hole sealing area SA2. According to an embodiment of the inventive concept, the width of the hole sealing area SA2 may be less than or equal to the width of the substrate sealing area SA1. For example, the width of the hole sealing area SA2 may be less than or equal to about 100 μm.

[0132] Then, if Fig.12 and Fig. 13C As shown in , the encapsulation substrate EN may be mounted on the display substrate (S3). The encapsulation substrate EN and the base substrate BS may face each other with the device layer DP-E interposed therebetween. Mounting the encapsulation substrate EN on the display substrate may further include using a filler layer DP-S (e.g., see Figure 5 and Figure 8 ) fills the area between the encapsulation substrate EN and the display substrate.

[0133] Afterwards, if Fig.12 and Fig.13D As shown in , the first laser LSR1 may be irradiated onto the hole sealing area SA2 to bond the display substrate and the encapsulation substrate EN (S4). In the present embodiment, the focus FA of the first laser LSR1 may be formed in the area between the display substrate and the encapsulation substrate EN, and may correspond to the hole sealing area SA2. The focus FA of the first laser LSR1 may be continuously moved along the interface area between the display substrate and the encapsulation substrate EN.

[0134] Bonding the display substrate and the encapsulation substrate EN (S4) may further include irradiating laser onto the substrate sealing area SA1. The laser irradiated onto the substrate sealing area SA1 may be the first laser LSR1, but in some embodiments, it may be different from the first laser LSR1.

[0135] like Fig.12 and Fig.13EAs shown in , after bonding the display substrate and the encapsulation substrate EN, the second laser LSR2 may be irradiated onto the area of ​​the display panel DP where the bonding structure of the display substrate and the encapsulation substrate EN is provided to form the module hole MH (S5). In one embodiment, the oscillation duration of the second laser LSR2 may be longer than the oscillation duration of the first laser LSR1. For example, the second laser LSR2 may be a continuous wave (CW) laser. When viewed in a plan view, the area including the module hole MH may be surrounded by the hole sealing area SA2 and the margin area MA.

[0136] The present inventive concept is not limited to a specific method of forming the module hole MH. For example, in an embodiment, the module hole MH may be formed by a process different from the laser cutting process. According to an embodiment of the present inventive concept, the manufacturing method of the display device DD may further include: Figure 2 The module hole EM) is arranged to correspond to the module hole MH in the display panel DP.

[0137] Fig.14A and Fig. 14B A cross-sectional view illustrating a manufacturing process of a display device DD according to another embodiment of the inventive concept. Fig.14A and Fig. 14B The bonding of the display substrate and the encapsulation substrate EN is shown in different ways ( Fig.12 S4) of the implementation method. Fig.13D The manufacturing process according to this embodiment can be performed in the same manner as in the aforementioned embodiment except for the operations shown in FIG. Fig.12 Detailed descriptions of other operations (e.g., S1, S2, S3, and S5) other than S4) will be omitted.

[0138] like Fig.14A As shown in FIG. , according to another embodiment of the inventive concept, the focus FA-1 of the first laser LSR1 may be formed in a region between the base substrate BS and the package substrate EN and may correspond to the margin region MA instead of the hole sealing region SA2. Fig. 9 The PHA) may overlap with the margin area MA and the hole sealing area SA2.

[0139] For example, when the first laser LSR1 is irradiated on the margin area MA, a portion of the front surface of the base substrate BS and a portion of the rear surface of the encapsulation substrate EN in the margin area MA may be melted. Moreover, a portion of each of the hole sealing member SM2 in the hole sealing area SA2, the base substrate BS, and the encapsulation substrate EN may be melted. In this case, at least a portion SM2' of the hole sealing member SM2 in the hole sealing area SA2 may overflow into the margin area MA. In the present embodiment, the display substrate and the encapsulation substrate EN may be joined to each other in the margin area MA and the hole sealing area SA2.

[0140] FIG. 15A to FIG. 15D A cross-sectional view illustrating a manufacturing process of a display device DD according to another embodiment of the inventive concept. Fig.15A and Fig. 15B The arrangement of the sealing member is shown in different ways ( Fig.12 S2) and the package substrate EN provides ( Fig.12 Implementation method of S3). Fig. 15C and Fig.15D The bonding of the display substrate and the encapsulation substrate EN is shown in different ways ( Fig.12 S4) of the implementation method. FIG. 15A to FIG. 15D Except for the operations shown in , the manufacturing process can be performed in the same manner as in the previous embodiment. Fig.12 Detailed descriptions of some of the described operations (eg, S1 and S5) will be omitted.

[0141] According to another embodiment of the present inventive concept, when the sealing member is arranged ( Fig.12 The substrate sealing member SM1 may be arranged only on the substrate sealing area SA1 of the encapsulation substrate EN, but as FIG. 15A to FIG. 15D As shown in FIG, the hole sealing member SM2 may not be arranged on the hole sealing area SA2.

[0142] In this case, a portion of each of the base substrate BS and the encapsulation substrate EN may be melted in the hole sealing area SA2 irradiated with the first laser LSR1. Melting these portions may allow the separation space to be filled between the base substrate BS and the encapsulation substrate EN. The material SM3 filling the separation space on the hole sealing area SA2 may bond the base substrate BS and the encapsulation substrate EN.

[0143] In the present embodiment, the hole sealing member SM2 may be disposed not only in the hole sealing area SA2. In an embodiment, the substrate sealing member SM1 may not be disposed in the substrate sealing area SA1.

[0144] In this embodiment, by using the first laser LSR1 (for example, ultra-high frequency pulse laser), the display substrate and the encapsulation substrate EN can be bonded without an additional sealing member (for example, SM2). Figure 1 The thickness of DD) in can be reduced.

[0145] According to the embodiments of the present invention, the durability and aesthetic appearance of the display device can be improved. In detail, according to the embodiments of the present invention, the bonding strength between the display substrate and the encapsulation substrate can be increased, and the width of the dead zone can be reduced. In addition, according to the embodiments of the present invention, the manufacturing cost of the display device can be reduced, and the manufacturing process of the display device can be simplified.

[0146] While example embodiments of the inventive concepts have been particularly shown and described, it will be understood by those skilled in the art that changes in form and details may be made therein without departing from the spirit and scope of the following claims.

Claims

1. A method for manufacturing a display device, comprising: providing a display substrate having a plurality of pixels; Mounting a packaging substrate on the display substrate; bonding the display substrate to the packaging substrate to form a display panel; as well as forming a module hole in the display panel that penetrates a hole area of ​​the display panel, wherein the hole area surrounds the module hole, and Wherein, bonding the display substrate and the packaging substrate comprises: Irradiating the hole region with an ultra-high frequency pulse laser, As the ultra-high frequency pulse laser is irradiated onto the hole area, the display substrate and the packaging substrate are joined in the hole area and form a joining area, and at least a portion of each of the display substrate and the packaging substrate in the joining area undergoes a change of state and then melts and mixes with each other at the interface between the display substrate and the packaging substrate.

2. The method of claim 1, wherein: The ultra-high frequency pulse laser is a femtosecond laser.

3. The method of claim 2, wherein: The hole area includes: A margin area, the margin area surrounding the module hole; a hole sealing area surrounding the margin area; and a wiring area surrounding the hole sealing area and including a plurality of signal lines, Wherein, bonding the display substrate and the packaging substrate comprises: A focus of the ultra-high frequency pulse laser is placed in at least one of the margin area and the hole sealing area.

4. The method of claim 3, further comprising: Before mounting the encapsulation substrate on the display substrate, a hole sealing member is disposed on the hole sealing region of the encapsulation substrate.

5. The method of claim 4, wherein: The hole sealing member includes a glass material.

6. The method of claim 1, wherein: Irradiating the hole region with the ultra-high frequency pulse laser comprises: The focus of the ultra-high frequency pulse laser is continuously moved in an interface region between the display substrate and the packaging substrate.

7. The method of claim 1, wherein: Joining the display substrate and the packaging substrate comprises: Laser is irradiated onto a substrate sealing region positioned at an edge region of each of the display substrate and the packaging substrate between the display substrate and the packaging substrate.

8. The method of claim 7, wherein: The laser irradiated onto the substrate sealing area is a femtosecond laser.

9. The method of claim 7, further comprising: Before mounting the encapsulation substrate on the display substrate, a substrate sealing member is disposed on the substrate sealing region of the encapsulation substrate.

10. A display device, comprising: a display panel, the display panel comprising a hole area, a display area surrounding the hole area, and a non-display area surrounding the display area, a module hole penetrating the hole area is formed in the display panel, and the hole area surrounds the module hole of the display panel; as well as an electronic module, the electronic module overlapping the module hole, Wherein, the display panel comprises: A display substrate comprising a plurality of pixels; and A packaging substrate is located on the display substrate to cover the plurality of pixels, and as an ultra-high frequency pulse laser is irradiated onto a hole sealing area corresponding to a portion of the hole area, the packaging substrate is bonded to the display substrate in the hole sealing area to form a bonding area, wherein the width of the hole sealing area is less than 100 μm, and at least a portion of each of the display substrate and the packaging substrate in the bonding area undergoes a change of state and then melts and mixes with each other at an interface between the display substrate and the packaging substrate.

11. The display device according to claim 10, further comprising: A hole sealing member is located between the display substrate and the encapsulation substrate in the hole sealing region.

12. The display device according to claim 11, wherein: The hole sealing member includes a glass material.

13. The display device according to claim 11, wherein: The hole sealing member has a thickness in the range of 4.5 μm to 5.5 μm.

14. The display device according to claim 10, wherein: A bonding strength between the display substrate and the package substrate in the hole sealing region is greater than or equal to 5 kgf.

15. The display device according to claim 10, wherein: The hole area includes a wiring area surrounding the hole sealing area and including a plurality of signal lines, and The display substrate and the package substrate are spaced apart from each other by a predetermined distance in the wiring region.

16. The display device according to claim 10, wherein: The electronic module includes at least one of a camera, a speaker, a light sensing sensor, and a heat sensing sensor.

17. The display device according to claim 10, wherein: The non-display area includes a substrate sealing area, and The display substrate and the packaging substrate are bonded in the substrate sealing region.

18. The display device according to claim 17, further comprising: A substrate sealing member is located between the display substrate and the encapsulation substrate in the substrate sealing region.

19. A method for manufacturing a display device, comprising: providing a display substrate including a plurality of pixels; Mounting a packaging substrate on the display substrate; bonding the display substrate to the packaging substrate to form a display panel; as well as A module hole is formed in the display panel, wherein the display panel includes a hole area surrounding the module hole, a display area surrounding the hole area, and a non-display area surrounding the display area, and wherein, Bonding the display substrate to the packaging substrate comprises: irradiating a femtosecond laser between the display substrate and the packaging substrate in the hole area, As the femtosecond laser is irradiated, the display substrate and the packaging substrate melt and mix with each other at a boundary therebetween to form a bonding area, wherein at least a portion of each of the display substrate and the packaging substrate in the bonding area undergoes a change in state.

Images