A method of performing a pressure test in a test machine

CN111367734BActive Publication Date: 2026-10-27SHANGHAI NCATEST TECH CO LTD
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Patent Information

Application Number
CN202010127776.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-02-28
Publication Date
2026-10-27
Estimated Expiration
2040-02-28

AI Technical Summary

Benefits of technology

[0026]本发明的有益效果为:本发明通过在控制中心统一配置各个测试单板的配置数据,并且各个测试单板中配置数据格式相同,只需要针对不同测试单板更改对应的区别码,测试项目,测试时间和测试顺序;通过在控制中心的一次配置,即可完成多个测试单板的压力测试;同时本发明若想增加新的测试单板,也只需要在控制中心增加新的配置数据即可,本发明可以灵活地对各个测试单板进行压力测试,减少人工配置,提高整体效率。

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Abstract

The application discloses a method for pressure test in a test machine, the test machine contains M test single boards, comprising the following steps: S01: in the control center, N test single boards needing pressure test are respectively tested and configured, configuration data is formed, the configuration data includes the distinguishing code, test item, test time and test sequence of the corresponding test single board; S02: the control center sends the configuration data of each test single board to the corresponding test single board; S03: the test single board acquires and analyzes the configuration data, and performs pressure test according to the configuration data and the test flow matched with the local storage; S04: the test single board sends the test result to the control center. The method for pressure test of the test machine provided by the application can flexibly perform pressure test on each test single board through the unified configuration of the control center, reduces manual configuration, and improves overall efficiency.
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Description

Technical Field

[0001] This invention relates to the field of integrated circuit testing, and more specifically to a method for performing stress testing in a testing machine. Background Technology

[0002] Semiconductor automated testing machines contain multiple test boards, each containing multiple test chips. A single testing machine needs to verify various types of chips. To meet different usage requirements in production, the types and quantities of test boards in the testing machine are quite numerous. Current technology for stress testing test boards in testing machines requires separate, targeted stress tests because different types of test boards differ significantly.

[0003] Stress testing, also known as load testing or stress testing, simulates the system load of real-world hardware and software environments and user operations. It involves running test software under prolonged or extremely heavy loads to assess the performance, reliability, and stability of the system under test.

[0004] Existing technologies require customized and differentiated stress testing for each test board, necessitating the writing of different test codes each time to adapt to the test items, number of tests, test times, and test order. When stress testing multiple test boards simultaneously, code adaptation for each test board is also required in the control center before sequential testing. Existing stress testing technologies involve cumbersome coding. Even when multiple test boards share identical test items, test times, and test orders, code adaptation is still required on both sides of the control center. This repetitive work is particularly problematic for targeted stress testing, resulting in wasted manpower and a lack of flexibility. Summary of the Invention

[0005] The purpose of this invention is to provide a method for stress testing using a testing machine. Through unified configuration in the control center, stress testing can be flexibly performed on each test board, reducing manual configuration and improving overall efficiency.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: a method for performing pressure testing in a testing machine, the testing machine comprising M test boards, comprising the following steps:

[0007] S01: In the control center, test configurations are performed on N test boards that need to be stress tested, and configuration data is generated. The configuration data includes the identification code of the corresponding test board, test items, test time, and test order; M and N are both positive integers greater than 0, and M is greater than or equal to N.

[0008] S02: The control center sends the configuration data of each test board to the corresponding test board;

[0009] S03: The test board acquires and parses the configuration data, and performs stress testing after matching the configuration data with the locally stored test process;

[0010] S04: The test board sends the test results to the control center;

[0011] S05: The control center parses and displays the test results of each test board.

[0012] Furthermore, the test board includes at least one chip, and chips of the same type correspond to one test item.

[0013] Furthermore, the configuration data also includes the number of tests.

[0014] Furthermore, the test time and test items in the configuration data correspond one-to-one, and the test board converts the test time corresponding to each test item into the number of tests for that test item.

[0015] Further, step S03 specifically includes:

[0016] S031: The test board acquires and parses the configuration data to determine the test order in the configuration data;

[0017] S032: According to the test order, match the test process of the first test item in the locally stored test process, perform the test of the first test item according to the process, and execute the stress test a corresponding number of times;

[0018] S033: Perform stress tests on each test item sequentially according to the method in step S032.

[0019] Furthermore, the test time in the configuration data is the total test time for each test item; the test board allocates the total test time to each test item according to the locally stored test process; the test board converts the test time corresponding to each test item into the number of tests for that test item.

[0020] Further, step S03 specifically includes:

[0021] S031: The test board acquires and parses the configuration data, determines the test order in the configuration data, and allocates the test time to each test item according to the locally stored test process;

[0022] S032: Match the test process of the first test item in the local storage test process, perform the test of the first test item according to the process, and execute the stress test the corresponding number of times;

[0023] S033: Perform stress tests on each test item sequentially according to the method in step S032.

[0024] Furthermore, the test items include one or more of the following: CPLD test, EEPROM test, DDR test, CPU test, and CPLD upgrade.

[0025] Furthermore, when a new test board is added to the test machine, the control center performs test configuration on the test board and generates corresponding configuration data.

[0026] The beneficial effects of this invention are as follows: This invention configures the configuration data of each test board uniformly in the control center, and the configuration data format in each test board is the same. Only the corresponding identification code, test items, test time, and test order need to be changed for different test boards. Through a single configuration in the control center, stress testing of multiple test boards can be completed. At the same time, if a new test board is to be added, only new configuration data needs to be added in the control center. This invention can flexibly perform stress testing on each test board, reduce manual configuration, and improve overall efficiency. Attached Figure Description

[0027] Appendix Figure 1 A flowchart illustrating a pressure testing method for inventing a testing machine;

[0028] Appendix Figure 2 This is a schematic diagram of the connection relationship of the test machine of the present invention. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the present invention clearer, the specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0030] As attached Figure 1 and 2 As shown, a method for stress testing in a testing machine is described. In this invention, stress testing simulates the system load of a real-world hardware and software environment and user operation, running the test software under prolonged or extremely heavy loads to test the performance, reliability, and stability of the system under test. The testing machine in this invention includes M test boards, each located in one of the machine's slots. Each test board includes at least one chip, with chips of the same type corresponding to a test item. For example, if one type of chip is used for temperature measurement, its corresponding test item is temperature testing; if another type of chip is used for current measurement, its corresponding test item is current testing. The specific test item is related to the chip's composition and performance. The test items in this invention include, but are not limited to, one or more of the following: CPLD testing, EEPROM testing, DDR testing, CPU testing, and CPLD upgrade. This invention specifically includes the following steps:

[0031] S01: In the control center, test configuration is performed on N test boards that need to be stress tested, and configuration data is generated. The configuration data includes the identification code of the corresponding test board, test items, test time and test order; M and N are both positive integers greater than 0, and M is greater than or equal to N.

[0032] The distinguishing code can be represented by a slot, IP address, or other markers that can differentiate the test boards; the goal is simply to distinguish each test board from the others. Test items are configured according to the specific structure of the test board. All chips on the test board can be configured, or only the chips that need to be tested can be configured. The test order is the sequence in which the various test items within that test board are performed.

[0033] In this invention, the configuration data may also include the number of tests, i.e., the number of tests corresponding to each test item. Since the time for each test item is fixed, and the time for each test is stored in the test process locally on the test board, the test time and the number of tests in the configuration can be converted. That is, the test time in the configuration data can be converted into the number of tests, and during the test process, the corresponding number of stress tests is executed.

[0034] In this invention, when a new test board is added to the testing machine, only the test configuration of that test board needs to be performed in the control center to generate the corresponding configuration data. The advantage of this approach is that it allows for flexible stress testing of individual test items on individual test boards, as well as batch stress testing of all test boards with the same configuration; stress testing can be performed based on the number of tests issued or the issued stress testing time.

[0035] S02: The control center sends the configuration data of each test board to the corresponding test board. (See attached...) Figure 2 As shown, the control center uses SWITCH to assemble the configured data into a data stream according to the transmission protocol, and uses the distinguishing code in the configuration data to correspond to each test board to complete the distribution of these configuration data.

[0036] S03: The test board acquires and parses the configuration data, and performs stress testing after matching the configured data with the locally stored test process. The test board parses and matches the received configuration data sequentially according to the transmission protocol, and obtains the corresponding test items, test time, and test order for the test board.

[0037] The locally stored test process represents the specific test method for each test chip in the test board. Since the test items in each test board are different, when the command from the control center is sent to the test board, the test board needs to combine it with its own structure after obtaining and parsing the configuration data. The test methods and processes for the same test item may be different for different types of resource boards, which is determined by the locally stored test process of each test board: for example, resource board A has 2 CPLDs, CPLD1 supports 16-bit access, and CPLD2 only supports 8-bit access; resource board B has 3 CPLDs, all of which support 16-bit access, but as long as a CPLD test command is received, the local test process will be matched to perform stress testing on the CPLD. The locally stored test process in each test board can specifically include the following two parts: (1) the order of each test item in the test board; (2) the specific test method for each test item. Since the specific test method of each test item is related to the structure and performance of its corresponding test chip, it can be stored in the test process of the test board's local storage, without needing to be configured in the control center.

[0038] Regarding the test time in the configuration data, there are two scenarios:

[0039] The first method involves a one-to-one correspondence between test time and test item in the configuration data. The test board converts the test time for each test item into the number of tests for that test item. Specifically, this includes:

[0040] S031: Test the board to acquire and parse the configuration data, and determine the test order in the configuration data;

[0041] S032: According to the test order, match the test process of the first test item in the locally stored test process, perform the test of the first test item according to the process, and execute the stress test a corresponding number of times; if the test item cannot be matched, return an error.

[0042] S033: Perform stress tests on each test item sequentially according to the method in step S032.

[0043] The second method configures the test time in the data as the total test time for all test items; the test board allocates the total test time to each test item according to the locally stored test process; the test board converts the test time corresponding to each test item into the number of tests for that test item. Step S03 specifically includes:

[0044] S031: The test board acquires and parses the configuration data, determines the test order in the configuration data, and allocates test time to each test item according to the locally stored test process;

[0045] S032: Match the test process of the first test item in the locally stored test process, perform the test of the first test item according to the process, and execute the stress test the corresponding number of times; if the test item cannot be matched, return an error.

[0046] S033: Perform stress tests on each test item sequentially according to the method in step S032.

[0047] S04: The test board sends the test results to the control center. The specific control center is the user terminal. The test board returns the test results to the user terminal after each stress test item is completed.

[0048] S05: The control center parses and displays the test results of each test board. After parsing, the user terminal presents the corresponding test results and test progress to the user, allowing the user to understand the stress test progress in real time.

[0049] This invention provides a unified configuration data solution for each test board in a control center. Since the configuration data format is identical across all test boards, only the identification code, test items, test time, and test order need to be changed for different test boards. By configuring once in the control center, stress testing of multiple test boards can be completed. Furthermore, adding new test boards only requires adding new configuration data in the control center. This invention allows for flexible stress testing of various test boards, reducing manual configuration and improving overall efficiency.

[0050] The above description is merely a preferred embodiment of the present invention. The embodiments are not intended to limit the scope of patent protection of the present invention. Therefore, any equivalent structural changes made based on the description and drawings of the present invention should also be included within the scope of protection of the appended claims.

Claims

1. A method for performing pressure testing in a testing machine, the testing machine comprising M test boards, characterized in that, Includes the following steps: S01: In the control center, test configuration is performed on N test boards that need to be stress tested, and configuration data is generated. The configuration data includes the identification code of the corresponding test board, test items, test time, test order and number of tests. M and N are both positive integers greater than 0, and M is greater than or equal to N; the configuration data format is the same in each test board, and the corresponding distinguishing code, test items, test time, and test order are changed for different test boards; stress testing of multiple test boards is completed through a single configuration in the control center; each test board includes at least one chip, and chips of the same type correspond to one test item; the test time and test items in the configuration data are one-to-one, and the test board converts the test time corresponding to each test item into the number of tests for that test item; the test time in the configuration data is the total test time for all test items; The test board allocates the total test time to each test item according to the locally stored test process; the test board converts the test time corresponding to each test item into the number of tests for that test item. S02: The control center sends the configuration data of each test board to the corresponding test board; S03: The test board acquires and parses the configuration data, and after matching the configuration data with the locally stored test process, performs stress tests on each test item in sequence; The test process stored locally in each test board includes: the order of each test item in the test board and the specific test method for each test item; S04: The test board sends the test results to the control center; S05: The control center parses and displays the test results of each test board.

2. The method for performing pressure testing in a testing machine according to claim 1, characterized in that, Step S03 specifically includes: S031: The test board acquires and parses the configuration data to determine the test order in the configuration data; S032: According to the test order, match the test process of the first test item in the locally stored test process, perform the test of the first test item according to the process, and execute the stress test a corresponding number of times; S033: Perform stress tests on each test item sequentially according to the method in step S032.

3. The method for performing pressure testing in a testing machine according to claim 1, characterized in that, Step S03 specifically includes: S031: The test board acquires and parses the configuration data, determines the test order in the configuration data, and allocates the test time to each test item according to the locally stored test process; S032: Match the test process of the first test item in the local storage test process, perform the test of the first test item according to the process, and execute the stress test the corresponding number of times; S033: Perform stress tests on each test item sequentially according to the method in step S032.

4. The method for performing pressure testing in a testing machine according to claim 1, characterized in that, The test items include one or more of the following: CPLD test, EEPROM test, DDR test, CPU test, and CPLD upgrade.

5. The method for performing pressure testing in a testing machine according to claim 1, characterized in that, When a new test board is added to the test machine, the control center performs test configuration on the test board and generates corresponding configuration data.

Citation Information

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