A display panel, a manufacturing method thereof, and a display device

Abstract

A display panel, a manufacturing method thereof, and a display device. The display panel includes a display area and a fan-out area located around the display area. The non-display area includes a first fan-out area. The display panel includes three or more metal layers. Among them, the non-display area includes multiple fan-out leads. Each fan-out lead is located on one of the three or more metal layers in the first fan-out area, and two adjacent fan-out leads are located on different metal layers in the first fan-out area. In this application, by arranging the fan-out leads on three or more metal layers and arranging two adjacent fan-out leads in the first fan-out area on different metal layers, the number of fan-out leads on each metal layer is reduced, and the distance between adjacent fan-out leads can be made as small as possible, thereby effectively compressing the height of the first fan-out area, that is, compressing the size of the lower border of the display panel and improving the screen-to-body ratio of the display panel.

Description

Technical Field

[0001] The present application relates to, but is not limited to, the field of display technology, and particularly relates to a display panel, a preparation method thereof, and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) is one of the hotspots in the current research field of flat panel displays. It has many advantages such as being thin, flexible, having excellent shock resistance, fast response, and being suitable for wearable products, and has been widely used in display fields such as televisions, smartphones, smart wearables, Virtual Reality (VR), and automotive displays.

[0003] With the development of OLED display products, "screen-to-body ratio" has become an extremely popular term in the appearance of OLED smart products such as smartphones and wearable devices. However, the size of the product cannot increase infinitely. To obtain a higher screen-to-body ratio, only the display screen border can be reduced. Therefore, with the pursuit of consumers for aspects such as portability and viewing angle effect of display products, extremely narrow borders or even full-screen displays have become a new trend in the development of OLED products.

[0004] Among the upper, lower, left, and right borders of the display panel, compared with the left and right borders, the lower border size of the display panel is usually larger. Currently, there are mature compression solutions for the left and right borders. Since the lower border size is restricted by more factors, it is more difficult to compress the lower border. Summary of the Invention

[0005] Embodiments of the present application provide a display panel, a preparation method thereof, and a display device, which can compress the lower border size of the display panel.

[0006] Embodiments of the present application provide a display panel, including: a display area and a non-display area located around the display area. The non-display area includes a first fan-out area. The display panel includes three or more metal layers, wherein: the non-display area includes a plurality of fan-out leads. Each fan-out lead is located on one of the three or more metal layers in the first fan-out area, and two adjacent fan-out leads are located on different metal layers in the first fan-out area.

[0007] In some possible implementation manners, the display panel includes a substrate, a first insulating layer disposed on the substrate, an active layer disposed on the first insulating layer, a second insulating layer covering the active layer, a first gate metal layer disposed on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer disposed on the third insulating layer, a fourth insulating layer covering the second gate metal layer, and a first source-drain metal layer disposed on the fourth insulating layer; the three or more metal layers include: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer.

[0008] In some possible implementation manners, the non-display area further includes a second fan-out area, and each of the fan-out leads is located at any one of the following positions in the second fan-out area: on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer.

[0009] In some possible implementation manners, the positions of the fan-out leads on the metal layers in the first fan-out area and the second fan-out area are different, where: when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out lead is on the first source-drain metal layer in the second fan-out area; when the fan-out lead is on the first source-drain metal layer in the first fan-out area, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out area.

[0010] In some possible implementation manners, the non-display area further includes a third fan-out area, and each of the fan-out leads is located at any one of the following positions in the third fan-out area: on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the second gate metal layer.

[0011] In some possible implementation manners, the positions of the fan-out leads on the metal layers in the second fan-out area and the third fan-out area are the same.

[0012] In some possible implementation manners, the display panel further includes a fifth insulating layer covering the first source-drain metal layer and a second source-drain metal layer disposed on the fifth insulating layer; the three or more metal layers further include: the second source-drain metal layer.

[0013] In some possible implementations, the non-display area further includes a second fan-out area, and the fan-out leads are located at different positions on the metal layers of the first fan-out area and the second fan-out area, where: when the fan-out leads are located on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out leads are located on the first source / drain metal layer or the second source / drain metal layer in the second fan-out area; when the fan-out leads are located on the first source / drain metal layer or the second source / drain metal layer in the first fan-out area, the fan-out leads are located on the first gate metal layer or the second gate metal layer in the second fan-out area.

[0014] An embodiment of the present application further provides a display device, including the display panel as described in any of the foregoing.

[0015] An embodiment of the present application further provides a method for manufacturing a display panel, the display panel including a display area and a non-display area located around the display area, the non-display area including a first fan-out area, and the manufacturing method including: forming a first insulating layer and an active layer on a substrate; forming a second insulating layer and a first gate metal layer on the active layer, the first gate metal layer including a first gate metal layer pattern corresponding to the display area and a first layer lead segment corresponding to the non-display area; forming a third insulating layer and a second gate metal layer on the first metal layer, the second gate metal layer including a second gate metal layer pattern corresponding to the display area and a second layer lead segment corresponding to the non-display area; forming a fourth insulating layer and a first source / drain metal layer on the second metal layer, the first source / drain metal layer including a first source / drain metal layer pattern corresponding to the display area and a third layer lead segment corresponding to the non-display area; at least two layers of lead segments are connected through vias on the insulating layer to form fan-out leads, and adjacent two fan-out leads are located on different metal layers in the first fan-out area, the lead segments including the first layer lead segment, the second layer lead segment, and the third layer lead segment, and the insulating layers including the third insulating layer and the fourth insulating layer.

[0016] In some possible implementations, the manufacturing method further includes: forming a fifth insulating layer and a second source / drain metal layer on the third metal layer, the second source / drain metal layer including a second source / drain metal layer pattern corresponding to the display area and a fourth layer lead segment corresponding to the non-display area; the lead segments further include a fourth layer lead segment, and the insulating layers further include a fifth insulating layer.

[0017] For the display panel, its manufacturing method, and the display device according to the embodiments of the present application, by arranging each fan-out lead on one of three or more metal layers in the first fan-out area, and arranging adjacent two fan-out leads on different metal layers in the first fan-out area, the number of fan-out leads on each metal layer is reduced, and the distance between adjacent fan-out leads can be made as small as possible, thereby effectively compressing the height of the first fan-out area, that is, compressing the size of the lower border of the display panel and improving the screen-to-body ratio of the display panel.

[0018] Other features and advantages of the present application will be described in the subsequent specification. Moreover, some of them will become apparent from the specification or be understood by implementing the present application. Other advantages of the present application can be achieved and obtained through the solutions described in the specification and the accompanying drawings. Description of the Drawings

[0019] The drawings are used to provide an understanding of the technical solutions of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solutions of the present application and do not constitute a limitation to the technical solutions of the present application.

[0020] Figure 1 It is a schematic structural diagram of a display panel before bending in the bending area;

[0021] Figure 2 It is a schematic structural diagram of a display panel after bending in the bending area;

[0022] Figure 3 It is a schematic structural diagram of a display panel according to an embodiment of the present application;

[0023] Figure 4 It is a schematic structural diagram of some fan-out leads in the first fan-out area according to an embodiment of the present application;

[0024] Figure 5 It is a schematic structural diagram of some fan-out leads in the second fan-out area or the third fan-out area according to an embodiment of the present application;

[0025] Figure 6 It is a schematic diagram after preparing an active layer pattern according to an embodiment of the present application;

[0026] Figure 7 It is a schematic structural diagram of a display area after preparing a first gate metal layer pattern according to an embodiment of the present application;

[0027] Figure 8 It is a schematic structural diagram of a non-display area after preparing a first gate metal layer lead segment according to an embodiment of the present application;

[0028] Figure 9 It is a schematic structural diagram of a display area after preparing a second gate metal layer pattern according to an embodiment of the present application;

[0029] Figure 10 It is a schematic structural diagram of a non-display area after preparing a second gate metal layer lead segment according to an embodiment of the present application;

[0030] Figure 11 It is a schematic structural diagram of a display area after preparing a fourth insulating layer pattern according to an embodiment of the present application;

[0031] Figure 12Schematic diagram of the structure of the display area after preparing the pattern of the first source-drain metal layer in an embodiment of the present application;

[0032] Figure 13 Schematic diagram of the structure of the non-display area after preparing the lead segment of the first source-drain metal layer in an embodiment of the present application;

[0033] Figure 14 Flow chart of a method for manufacturing a display panel in an embodiment of the present application.

[0034] Explanation of reference numerals:

[0035] 1 - Display area; 2 - Non-display area; 10 - Substrate;

[0036] 11 - First insulating layer; 12 - Active layer; 13 - Second insulating layer;

[0037] 14 - First gate metal layer; 15 - Third insulating layer; 16 - Second gate metal layer;

[0038] 17 - Fourth insulating layer; 18 - First source-drain metal layer; 20 - Fan-out lead;

[0039] 21 - First fan-out area; 22 - Bending area; 23 - Second fan-out area;

[0040] 24 - Anti-static area; 25 - Third fan-out area; 26 - Driver IC area; Detailed implementation manners

[0041] The following further describes in detail the specific implementation manners of the present application in conjunction with the accompanying drawings and embodiments. The following embodiments are used to illustrate the present application, but are not used to limit the scope of the present application. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0042] In the current structural layout of the display panel, from the outside to the inside are the non-display area and the display area (Active Area, AA) in sequence. The display area is the area in the panel where effective display can be performed, that is, the area where the light-emitting units are arranged in the entire panel, and the non-display area is the border around the display area, and drive circuits can be arranged in this part of the area.

[0043] In a plane parallel to the display panel, the display panel includes a display area and a non-display area located around the display area. The display area includes a plurality of data lines, and each data line is independently connected to a driving integrated circuit (IC), that is, all the data lines are connected to the driving IC in parallel, and the driving IC controls these data lines to provide data information for the light-emitting pixels in the display area for display. In the structure of the display panel, the data lines (Data Line) usually lead out from the lower part of the display area, that is, the first fan-out area is located at the lower border position of the display panel, and all the data lines led out from the lower part of the display panel are included inside the first fan-out area.

[0044] Based on the bendable structure of the bend area in the flexible display technology, such as Figure 1 shown, before bending the bend area 22, the non-display area 2 mainly includes areas such as the first fan-out area 21, the bend area 22, the second fan-out area 23, the anti-static area 24, the third fan-out area 25, and the driving IC area 26. As Figure 2 shown, after bending the bend area 22, without considering the module process margin and the bending radius, only a part of the first fan-out area 21 remains at the lower border of the display panel. Therefore, for a flexible display panel, reducing the height a of the part of the first fan-out area 21 also reduces the size of the lower border of the display panel and improves the screen-to-body ratio of the display panel.

[0045] As Figure 3 shown, an embodiment of the present application provides a display panel, including: a display area 1 and a non-display area 2 located around the display area 1. The non-display area 2 includes a first fan-out area 21. The display panel includes three or more metal layers. Among them, the non-display area 2 includes a plurality of fan-out leads 20, and each fan-out lead 20 is on one of the three or more metal layers in the first fan-out area 21, and two adjacent fan-out leads 20 are on different metal layers in the first fan-out area 21.

[0046] The higher the resolution of the display panel, the greater the number of its data lines. For example, assuming the resolution of the display panel is 1080*1920, the number of its data lines is 1080, that is, 1080 data lines need to be connected in parallel from the first fan-out area 21 to the bend area 22. Based on the user's requirement for the high resolution of the display panel, the data lines of the existing display panels are in the thousands. Since the number of data lines is in the thousands, Figure 3 not all the fan-out leads 20 are shown in the first fan-out area 21, and only some of the fan-out leads 20 are shown, that is, Figure 3 the number of the shown fan-out leads 20 does not represent the actual number of the fan-out leads 20.

[0047] In the display panel according to the embodiment of the present application, by disposing the fan-out leads 20 on three or more metal layers, and two adjacent fan-out leads 20 being disposed on different metal layers in the first fan-out region 21, the number of fan-out leads 20 on each metal layer is reduced, and the spacing between adjacent fan-out leads 20 can be made as small as possible, thereby effectively compressing the height of the first fan-out region 21, that is, compressing the size of the lower border of the display panel and improving the screen-to-body ratio of the display panel.

[0048] In an exemplary embodiment, the display panel includes a substrate, a first insulating layer disposed on the substrate, an active layer disposed on the first insulating layer, a second insulating layer covering the active layer, a first gate metal layer disposed on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer disposed on the third insulating layer, a fourth insulating layer covering the second gate metal layer, and a first source / drain metal layer disposed on the fourth insulating layer.

[0049] The three or more metal layers include: a first gate metal layer, a second gate metal layer, and a first source / drain metal layer.

[0050] Since the thickness of the fourth insulating layer between the second gate metal layer and the first source / drain metal layer is relatively large, for example, in a display panel, the thickness of the fourth insulating layer is 5000 angstroms, and the thickness of the third insulating layer is 1000 angstroms, the spacing between the fan-out leads 20 on the first source / drain metal layer and the fan-out leads 20 on the first gate metal layer or the second gate metal layer can be arbitrarily small. Even the orthographic projection of the fan-out leads 20 on the first source / drain metal layer on the substrate and the orthographic projection of the fan-out leads 20 on the first gate metal layer or the second gate metal layer on the substrate may include an overlapping region, without the risk of current breakdown or short circuit.

[0051] In an exemplary embodiment, the routing position of each fan-out lead 20 in the first fan-out region 21 may be any of the following cases:

[0052] The (3N + 1)-th and (3N + 3)-th fan-out leads 20 are respectively located on one of the first metal layer and the second metal layer, and the (3N + 2)-th fan-out lead 20 is located on the third metal layer, where N is a natural number greater than or equal to 0, as Figure 4 shown; or,

[0053] The (4N + 1)-th and (4N + 3)-th fan-out leads 20 are respectively located on one of the first metal layer and the second metal layer, and the (4N + 2)-th and (4N + 4)-th fan-out leads 20 are both located on the third metal layer, where N is a natural number greater than or equal to 0.

[0054] The embodiments of the present application do not list all possible routing positions of each fan-out lead 20 in the first fan-out region 21. The display panel of the embodiments of the present application emphasizes that each fan-out lead is on one of three or more metal layers in the first fan-out region, and two adjacent fan-out leads are on different metal layers in the first fan-out region. As for the routing position of each fan-out lead 20 in the first fan-out region 21, the present application does not limit it.

[0055] In an exemplary embodiment, the non-display area 2 further includes a second fan-out region 23. Each fan-out lead 20 is located at any of the following positions in the second fan-out region 23:

[0056] On one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer;

[0057] On one of the following two metal layers: the first gate metal layer and the first source-drain metal layer;

[0058] On one of the following two metal layers: the second gate metal layer and the first source-drain metal layer.

[0059] In an exemplary embodiment, the positions of the metal layers of the fan-out lead 20 in the first fan-out region 21 and the second fan-out region 23 are different.

[0060] In an exemplary embodiment, when the fan-out lead 20 is on the first gate metal layer or the second gate metal layer in the first fan-out region 21, the fan-out lead 20 is on the first source-drain metal layer in the second fan-out region 23; when the fan-out lead 20 is on the first source-drain metal layer in the first fan-out region 21, the fan-out lead 20 is on the first gate metal layer or the second gate metal layer in the second fan-out region 23.

[0061] Since the resistivity of the first gate metal layer and the second gate metal layer is approximately the same, and the resistivity of the first source-drain metal layer is much smaller than that of the first gate metal layer or the second gate metal layer, if the positions of the metal layers of the fan-out leads 20 in each fan-out region are the same, the resistivity difference between different fan-out leads 20 is relatively large, resulting in a regional difference in brightness display unevenness after the display panel is lit, affecting the display effect of the display panel. The display panel of the embodiments of the present application compensates for the resistivity difference between the metal layers by setting the fan-out lead 20 on different metal layers in the first fan-out region 21 and the second fan-out region 23, improving the display effect of the display panel.

[0062] In an exemplary embodiment, the non-display area 2 further includes a third fan-out region 25. Each fan-out lead 20 is located at any of the following positions in the third fan-out region 25:

[0063] On one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source / drain metal layer;

[0064] On one of the following two metal layers: the first gate metal layer and the first source / drain metal layer;

[0065] On one of the following two metal layers: the second gate metal layer and the first source / drain metal layer;

[0066] On one of the following two metal layers: the first gate metal layer and the second gate metal layer.

[0067] In an exemplary embodiment, the positions of the fan-out leads 20 in the metal layers of the second fan-out region 23 and the third fan-out region 25 may be the same or different.

[0068] Since the fan-out leads 20 are disposed on different metal layers in the first fan-out region 21 and the second fan-out region 23, it is equivalent to having preliminarily compensated for the resistivity differences between the respective metal layers. At this time, according to the result of the preliminary compensation (i.e., the impedance difference values of the respective fan-out leads 20), it can be determined whether it is necessary to continue compensating for the resistivity differences between the respective metal layers in the third fan-out region 25. If, after the preliminary compensation in the second fan-out region 23, the impedance difference values of the respective fan-out leads 20 are less than a preset impedance difference threshold, then there is no need to continue compensating for the resistivity differences between the respective metal layers in the third fan-out region 25. At this time, the position of the fan-out leads 20 in the metal layer of the third fan-out region 25 may be different from that of the second fan-out region 23. For example, the fan-out leads 20 in the third fan-out region 25 may be disposed on the first gate metal layer and / or the second gate metal layer. If, after the preliminary compensation in the second fan-out region 23, the impedance difference values of two or more fan-out leads 20 are still greater than or equal to the preset impedance difference threshold, then it is necessary to continue compensating for the resistivity differences between the respective metal layers in the third fan-out region 25. At this time, the position of the fan-out leads 20 in the metal layer of the third fan-out region 25 may be the same as that of the second fan-out region 23 to achieve the effect of continuing to compensate for the resistivity differences between the respective metal layers.

[0069] Exemplarily, such as Figure 4 and Figure 5As shown, the first fan-out lead 20 from the right is on the second metal layer in the first fan-out region 21, and on the third metal layer in the second fan-out region 23 and the third fan-out region 25; the second fan-out lead 20 from the right is on the third metal layer in the first fan-out region 21, and on the first metal layer in the second fan-out region 23 and the third fan-out region 25; the third fan-out lead 20 from the right is on the first metal layer in the first fan-out region 21, and on the third metal layer in the second fan-out region 23 and the third fan-out region 25; the fourth fan-out lead 20 from the right is on the second metal layer in the first fan-out region 21, and on the third metal layer in the second fan-out region 23 and the third fan-out region 25; the fifth fan-out lead 20 from the right is on the third metal layer in the first fan-out region 21, and on the first metal layer in the second fan-out region 23 and the third fan-out region 25; the sixth fan-out lead 20 from the right is on the first metal layer in the first fan-out region 21, and on the third metal layer in the second fan-out region 23 and the third fan-out region 25...

[0070] In another exemplary embodiment, the display panel further includes a fifth insulating layer covering the first source-drain metal layer and a second source-drain metal layer disposed on the fifth insulating layer; the three or more metal layers further include: the second source-drain metal layer.

[0071] In one exemplary embodiment, the non-display area 2 further includes a second fan-out region 23, wherein the positions of the fan-out leads 20 on the metal layers in the first fan-out region 21 and the second fan-out region 23 are different.

[0072] In one exemplary embodiment, when the fan-out lead 20 is on the first gate metal layer or the second gate metal layer in the first fan-out region 21, the fan-out lead 20 is on the first source-drain metal layer or the second source-drain metal layer in the second fan-out region 23; when the fan-out lead 20 is on the first source-drain metal layer or the second source-drain metal layer in the first fan-out region 21, the fan-out lead 20 is on the first gate metal layer or the second gate metal layer in the second fan-out region 23.

[0073] In one exemplary embodiment, the non-display area 2 further includes a third fan-out region 25, wherein the positions of the fan-out leads 20 on the metal layers in the second fan-out region 23 and the third fan-out region 25 may be the same or different.

[0074] The technical solution of this embodiment will be further described below through the preparation process of the display panel of this embodiment. Among them, the "lithography process" mentioned in this embodiment includes processes such as depositing a film layer, coating a photoresist, mask exposure, development, etching, and stripping the photoresist. The "lithography process" mentioned in this embodiment includes processes such as coating a film layer, mask exposure, and development, which are mature preparation processes in related technologies. Deposition can be any one or more selected from sputtering, evaporation, and chemical vapor deposition. Coating can be any one or more selected from spraying and spin coating. Etching can be any one or more selected from dry etching and wet etching. A "thin film" refers to a thin film made of a certain material on a substrate using a deposition or coating process. If the "thin film" does not require a lithography process during the entire manufacturing process, the "thin film" can also be referred to as a "layer". When the "thin film" still requires a lithography process during the entire manufacturing process, it is called a "thin film" before the lithography process and a "layer" after the lithography process. The "layer" after the lithography process contains at least one "pattern". What is referred to as "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same lithography process. "The orthographic projection of A includes the orthographic projection of B" means that the orthographic projection of B falls within the orthographic projection range of A, or the orthographic projection of A covers the orthographic projection of B.

[0075] (1) Deposit a first insulating thin film and an active layer thin film on the substrate 10 in sequence, and pattern the active layer thin film through a lithography process to form a first insulating layer 11 covering the entire substrate 10, and an active layer 12 pattern disposed on the first insulating layer 11, as Figure 6 shown. In an exemplary embodiment, the first insulating layer 11 is referred to as a buffer layer, which is used to improve the water and oxygen resistance of the substrate 10.

[0076] (2) Deposit a second insulating thin film and a first metal thin film in sequence, and pattern the first metal thin film through a lithography process to form a second insulating layer 13 covering the active layer 12 pattern, and a first gate metal layer 14 pattern disposed on the second insulating layer 13. The first gate metal layer 14 includes at least a first gate electrode and a first capacitor electrode, a plurality of gate lines (not shown), and a plurality of gate leads (not shown), as Figure 7 shown. In an exemplary embodiment, the second insulating layer 13 is referred to as a first gate insulation (GI1) layer. After this lithography process, a first layer lead segment pattern located on the first gate metal layer 14 is respectively formed in the first fan-out region 21, the second fan-out region 23, and the third fan-out region 25, as Figure 8 shown. Since the number of fan-out leads 20 is in the thousands, Figure 8 not all the fan-out leads 20 are shown in

[0077] (3) Deposit a third insulating film and a second metal film in sequence, pattern the second metal film through a patterning process to form a third insulating layer 15 covering the first gate metal layer 14 and a pattern of a second gate metal layer 16 disposed on the third insulating layer 15. The second gate metal layer 16 includes at least a second capacitor electrode and a second gate lead (not shown). The position of the second capacitor electrode corresponds to the position of the first capacitor electrode, as Figure 9 shown. In an exemplary embodiment, the third insulating layer 15 is also referred to as a second gate insulation (GI2) layer. After this patterning process, a second layer lead segment pattern is respectively formed on the second gate metal layer 16 in the first fan-out region 21, the second fan-out region 23, and the third fan-out region 25, as Figure 10 shown.

[0078] (4) Deposit a fourth insulating film, pattern the fourth insulating film through a patterning process to form a pattern of a fourth insulating layer 17 covering the second gate metal layer 16. A plurality of first vias are formed in the fourth insulating layer 17. The positions of the plurality of first vias respectively correspond to the two ends of the first active layer. The fourth insulating layer 17, the third insulating layer 15, and the second insulating layer 13 in the plurality of first vias are etched away to respectively expose the surface of the first active layer. In an exemplary embodiment, the fourth insulating layer 17 is also referred to as a first interlayer dielectric (ILD) layer, as Figure 11 shown.

[0079] (5) Deposit a third metal film, pattern the third metal film through a patterning process to form a pattern of a first source / drain metal layer 18 on the fourth insulating layer 17. The first source / drain metal layer 18 includes at least a first source electrode, a first drain electrode, a low voltage (VSS) line (not shown), a plurality of data lines (not shown), and a plurality of data lead patterns (not shown). The first source electrode and the first drain electrode are respectively connected to the active layer 12 through the first vias, as Figure 12 shown. In an exemplary embodiment, according to actual needs, the first source / drain metal layer 18 may further include any one or more of a power supply line (VDD), a compensation line, and an auxiliary second electrode. After this patterning process, a third layer lead segment pattern is respectively formed on the first source / drain metal layer 18 in the first fan-out region 21, the second fan-out region 23, and the third fan-out region 25, as Figure 13 shown.

[0080] At least two layers of lead segment patterns are connected through vias on the insulating layer to form fan-out leads, and two adjacent fan-out leads are on different metal layers in the first fan-out region 21. The lead segments include a first layer lead segment, a second layer lead segment, and a third layer lead segment. The insulating layers include the third insulating layer 15 and the fourth insulating layer 17.

[0081] Due to the relatively large thickness of the fourth insulating layer 17, for example, in a display panel, the thickness of the fourth insulating layer 17 is 5000 angstroms, and the thickness of the third insulating layer 15 is 1000 angstroms. The spacing between the fan-out leads 20 located on the first source-drain metal layer 18 and the fan-out leads 20 located on the first gate metal layer 14 or the second gate metal layer 16 can be arbitrarily small. Or, as Figure 4 or Figure 5 shown, the orthographic projection of the fan-out lead 20 located on the first source-drain metal layer 18 on the substrate 10 and the orthographic projection of the fan-out lead 20 located on the first gate metal layer 14 or the second gate metal layer 16 on the substrate 10 may include an overlapping area without the risk of current breakdown or short circuit.

[0082] Thus far, the driving structure layer pattern is prepared on the substrate 10. The active layer, the first gate electrode, the first source electrode, and the first drain electrode form a thin-film transistor. The first capacitor electrode and the second capacitor electrode form a storage capacitor. Multiple gate leads and data leads form the driving leads of the Gate Driver on Array (GOA).

[0083] (6) Prepare a planarization layer, a first electrode layer, a pixel definition layer, an organic light-emitting layer, a second electrode layer, and a packaging layer pattern on the substrate on which the aforementioned pattern is formed.

[0084] Through the above process, the preparation of the display panel shown in this embodiment Figure 3 is completed. It can be seen from the above preparation process that for the display panel provided in this embodiment, by arranging each fan-out lead 20 in the first fan-out area 21 on one of three or more metal layers, and arranging two adjacent fan-out leads 20 in the first fan-out area 21 on different metal layers, the number of fan-out leads 20 on each metal layer is reduced, and the spacing between adjacent fan-out leads 20 can be made as small as possible, thereby effectively compressing the height of the first fan-out area 21, that is, compressing the size of the lower border of the display panel and improving the screen-to-body ratio of the display panel.

[0085] An embodiment of the present application further provides a method for preparing a display panel. The display panel includes a display area and a non-display area located around the display area. The non-display area includes a first fan-out area. As Figure 14 shown, the method for preparing the display panel includes:

[0086] S1. Form a first insulating layer and an active layer on the substrate;

[0087] S2. Form a second insulating layer and a first gate metal layer on the active layer. The first gate metal layer includes a first gate metal layer pattern corresponding to the display area and a first layer lead segment corresponding to the non-display area;

[0088] S3. Form a third insulating layer and a second gate metal layer on the first gate metal layer. The second gate metal layer includes a second gate metal layer pattern corresponding to the display area and a second lead segment corresponding to the non-display area.

[0089] S4. Form a fourth insulating layer and a first source / drain metal layer on the second gate metal layer. The first source / drain metal layer includes a first source / drain metal layer pattern corresponding to the display area and a third lead segment corresponding to the non-display area; at least two layers of lead segments are connected through vias on the insulating layer to form fan-out leads, and two adjacent fan-out leads are on different metal layers in the first fan-out area. The lead segments include a first lead segment, a second lead segment, and a third lead segment, and the insulating layers include a third insulating layer and a fourth insulating layer.

[0090] In an exemplary embodiment, the non-display area further includes a second fan-out area, and the positions of the fan-out leads on the metal layers in the first fan-out area and the second fan-out area are different.

[0091] In an exemplary embodiment, when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out lead is on the first source / drain metal layer in the second fan-out area; when the fan-out lead is on the first source / drain metal layer in the first fan-out area, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out area.

[0092] In an exemplary embodiment, the non-display area further includes a third fan-out area, and the positions of the fan-out leads on the metal layers in the second fan-out area and the third fan-out area may be the same or different.

[0093] In an exemplary embodiment, the method for manufacturing the display panel further includes:

[0094] Form a fifth insulating layer and a second source / drain metal layer on the third metal layer. The second source / drain metal layer includes a second source / drain metal layer pattern corresponding to the display area and a fourth lead segment corresponding to the non-display area; the lead segments further include a fourth lead segment, and the insulating layers further include a fifth insulating layer.

[0095] In an exemplary embodiment, when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the second fan-out area; when the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the first fan-out area, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out area.

[0096] The embodiment of the present application further provides a display device, including the display panel provided in the foregoing embodiment. The display device may be: a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or any product or component with a display function.

[0097] In the description of the embodiments of the present application, it should be understood that the orientation or positional relationship indicated by the terms "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present application.

[0098] In the description of the embodiments of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific situations.

[0099] Although the disclosed embodiments of the present application are as above, the content described is only the embodiments adopted for the convenience of understanding the present application, and is not used to limit the present application. Any person skilled in the art within the scope of the present application can make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in the present application. However, the scope of patent protection of the present application shall still be subject to the scope defined by the appended claims.

Claims

1. A display panel, characterized in that, comprising: a display area and a non-display area located around the display area, the non-display area including a first fan-out area, a second fan-out area, and a third fan-out area, the display panel including three or more metal layers, and the three or more metal layers including: a first gate metal layer, a second gate metal layer, and a first source-drain metal layer, wherein: the non-display area includes a plurality of fan-out leads, each fan-out lead being located on one of the three or more metal layers in the first fan-out area, and adjacent two fan-out leads being located on different metal layers in the first fan-out area; each of the fan-out leads is located at any one of the following positions in the second fan-out area: located on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; located on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; located on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer; each of the fan-out leads is located at any one of the following positions in the third fan-out area: located on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; located on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; located on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer; located on one of the following two metal layers: the first gate metal layer and the second gate metal layer.

2. The display panel according to claim 1, characterized in that, the display panel includes a substrate, a first insulating layer provided on the substrate, an active layer provided on the first insulating layer, a second insulating layer covering the active layer, a first gate metal layer provided on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer provided on the third insulating layer, a fourth insulating layer covering the second gate metal layer, and a first source-drain metal layer provided on the fourth insulating layer.

3. The display panel according to claim 1, characterized in that, the positions of the metal layers of the fan-out leads in the first fan-out area and the second fan-out area are different, wherein: when the fan-out lead is located on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out lead is located on the first source-drain metal layer in the second fan-out area; when the fan-out lead is located on the first source-drain metal layer in the first fan-out area, the fan-out lead is located on the first gate metal layer or the second gate metal layer in the second fan-out area.

4. The display panel according to claim 1, characterized in that, the positions of the metal layers of the fan-out leads in the second fan-out area and the third fan-out area are the same.

5. The display panel according to claim 1, characterized in that, the display panel further includes a fifth insulating layer covering the first source-drain metal layer and a second source-drain metal layer provided on the fifth insulating layer; the three or more metal layers further include: a second source-drain metal layer.

6. The display panel according to claim 5, wherein: the positions of the fan-out leads on the metal layers in the first fan-out region and the second fan-out region are different, where: when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out region, the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the second fan-out region; when the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the first fan-out region, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out region.

7. A display panel, wherein: it includes: a display region and a non-display region located around the display region, the non-display region includes a first fan-out region and a second fan-out region, the display panel includes more than three metal layers, and the more than three metal layers include: a first gate metal layer, a second gate metal layer, a first source / drain metal layer, and a second source / drain metal layer, where: the non-display region includes a plurality of fan-out leads, each fan-out lead is on one of the more than three metal layers in the first fan-out region, and two adjacent fan-out leads are on different metal layers in the first fan-out region; the positions of the fan-out leads on the metal layers in the first fan-out region and the second fan-out region are different, where: when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out region, the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the second fan-out region; when the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the first fan-out region, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out region.

8. The display panel according to claim 7, wherein: the display panel includes a substrate, a first insulating layer provided on the substrate, an active layer provided on the first insulating layer, a second insulating layer covering the active layer, a first gate metal layer provided on the second insulating layer, a third insulating layer covering the first gate metal layer, a second gate metal layer provided on the third insulating layer, a fourth insulating layer covering the second gate metal layer, a first source / drain metal layer provided on the fourth insulating layer, a fifth insulating layer covering the first source / drain metal layer, and a second source / drain metal layer provided on the fifth insulating layer.

9. The display panel according to claim 7, wherein: the positions of the fan-out leads on the metal layers in the second fan-out region and the third fan-out region are the same.

10. A display device, wherein: it includes the display panel according to any one of claims 1 to 9.

11. A method for manufacturing a display panel, wherein: the display panel includes a display region and a non-display region located around the display region, the non-display region includes a first fan-out region, a second fan-out region, and a third fan-out region, and the manufacturing method includes: forming a first insulating layer and an active layer on a substrate; A second insulating layer and a first gate metal layer are formed on the active layer, and the first gate metal layer includes a first gate metal layer pattern corresponding to the display area and a first layer lead segment corresponding to the non-display area; A third insulating layer and a second gate metal layer are formed on the first gate metal layer, and the second gate metal layer includes a second gate metal layer pattern corresponding to the display area and a second layer lead segment corresponding to the non-display area; A fourth insulating layer and a first source-drain metal layer are formed on the second gate metal layer, and the first source-drain metal layer includes a first source-drain metal layer pattern corresponding to the display area and a third layer lead segment corresponding to the non-display area; at least two layers of lead segments are connected through vias on the insulating layer to form fan-out leads, and two adjacent fan-out leads are on different metal layers in the first fan-out area. The lead segments include a first layer lead segment, a second layer lead segment, and a third layer lead segment, and the insulating layers include a third insulating layer and a fourth insulating layer; Each of the fan-out leads is located at any one of the following positions in the second fan-out area: on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer; Each of the fan-out leads is located at any one of the following positions in the third fan-out area: on one of the following three metal layers: the first gate metal layer, the second gate metal layer, and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the second gate metal layer and the first source-drain metal layer; on one of the following two metal layers: the first gate metal layer and the second gate metal layer; 12. The manufacturing method according to claim 11, wherein, the manufacturing method further includes: A fifth insulating layer and a second source-drain metal layer are formed on the first source-drain metal layer, and the second source-drain metal layer includes a second source-drain metal layer pattern corresponding to the display area and a fourth layer lead segment corresponding to the non-display area; the lead segments further include a fourth layer lead segment, and the insulating layers further include a fifth insulating layer.

13. A manufacturing method of a display panel, wherein, the display panel includes a display area and a non-display area located around the display area, the non-display area includes a first fan-out area and a second fan-out area, and the manufacturing method includes: A first insulating layer and an active layer are formed on a substrate; A second insulating layer and a first gate metal layer are formed on the active layer, and the first gate metal layer includes a first gate metal layer pattern corresponding to the display area and a first layer lead segment corresponding to the non-display area; A third insulating layer and a second gate metal layer are formed on the first gate metal layer, and the second gate metal layer includes a second gate metal layer pattern corresponding to the display area and a second layer lead segment corresponding to the non-display area; A fourth insulating layer and a first source / drain metal layer are formed on the second gate metal layer. The first source / drain metal layer includes a first source / drain metal layer pattern corresponding to the display area and a third layer lead segment corresponding to the non-display area. At least two layers of lead segments are connected through vias on the insulating layer to form fan-out leads, and two adjacent fan-out leads are on different metal layers in the first fan-out area. The lead segments include a first layer lead segment, a second layer lead segment, and a third layer lead segment, and the insulating layer includes a third insulating layer and a fourth insulating layer. A fifth insulating layer and a second source / drain metal layer are formed on the first source / drain metal layer. The second source / drain metal layer includes a second source / drain metal layer pattern corresponding to the display area and a fourth layer lead segment corresponding to the non-display area. The lead segments further include a fourth layer lead segment, and the insulating layer further includes a fifth insulating layer. The positions of the metal layers of the fan-out leads are different in the first fan-out area and the second fan-out area, where: when the fan-out lead is on the first gate metal layer or the second gate metal layer in the first fan-out area, the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the second fan-out area; when the fan-out lead is on the first source / drain metal layer or the second source / drain metal layer in the first fan-out area, the fan-out lead is on the first gate metal layer or the second gate metal layer in the second fan-out area.

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