Microsemiconductor stacked structures and their electronic devices

Abstract

This application is titled "Microsemiconductor Stacked Structure and Electronic Device Thereof". The present invention provides a microsemiconductor stacked structure comprising at least two stacked array units, wherein one stacked array unit is superimposed on the other stacked array unit. The one stacked array unit is stacked along a direction perpendicular to the other stacked array unit; each stacked array unit includes a substrate, a conductive layer disposed on the substrate, and a plurality of microsemiconductor devices disposed on the substrate and electrically connected to the conductive layer.

Description

Technical Field

[0001] This invention relates to an electronic device, and more particularly to an electronic device composed of a micro-semiconductor stacked structure array. Background Technology

[0002] Semiconductor arrays are typically arranged along a plane. To meet the demand for smaller components, continuous improvements in process capabilities have been the goal of semiconductor manufacturers to achieve smaller linewidths. However, due to industry considerations of balancing costs and equipment investment, the progress towards the minimum linewidth has slowed down.

[0003] Taking micro-light-emitting diode display technology as an example, such as Figure 1 Three micro-light-emitting diodes (LEDs) for red, green, and blue light are designated as three sub-pixels 110a, 120a, and 130a, respectively. These are arranged adjacently in a plane to form a pixel 100a. An array of multiple 100a pixels constitutes a display 200a. Taking three identical LEDs as an example, each LED has a length L and a width W. The unit area of ​​pixel 100a is limited by the total width 3W of the combined sub-pixels. The combined pixel width P is slightly larger than 3W, and the pixel area P*P is slightly larger than 3W*3W. With the pursuit of high resolution (more pixels in a limited area), pixel length and width have shrunk to the micrometer level. Even so, cost and technological bottlenecks remain, urgently requiring the industry to propose a new solution. Summary of the Invention

[0004] In view of this, the present invention proposes a microsemiconductor stack structure and its electronic device, which can reduce the minimum area of ​​the microsemiconductor stack structure as a unit and increase the density of the microsemiconductor stack structure array within the limited area of ​​the electronic device.

[0005] In view of this, the present invention proposes a micro-semiconductor stacking structure and its electronic device, which achieves both low cost and high resolution within a limited area of ​​the electronic device.

[0006] A microsemiconductor stack structure includes at least two stacked structures, with one stacked structure superimposed on the other. One stacked structure is stacked perpendicularly to the other stacked structure. Each stacked structure includes a substrate, a conductive layer disposed on the substrate, and at least one microsemiconductor device disposed on the substrate and electrically connected to the conductive layer. Each stacked structure defines a target region, and the microsemiconductor device of each stacked structure is disposed within the target region. These target regions between pairs of stacked structures are aligned perpendicularly to each other. In at least one of the at least two stacked structures, the conductive layer is an active circuit.

[0007] A microsemiconductor stacked structure includes three stacked structures, two of which are superimposed on a bottommost stacked structure; wherein the two stacked structures are stacked vertically to the bottommost stacked structure; each stacked structure includes a substrate, a conductive layer disposed on the substrate, and at least one microlight-emitting diode (LED) chip disposed on the substrate and electrically connected to the conductive layer. Each stacked structure defines a pixel, and at least one microlight-emitting diode chip in each stacked structure is disposed within the pixel; these target regions between pairs of stacked structures are aligned vertically with each other; in at least one of the three stacked structures, the conductive layer is an active circuit.

[0008] In some embodiments, a microsemiconductor stack structure further has at least one step; the at least one step is formed by the sequentially decreasing dimensions of the substrates along a direction toward the upper stack structure or away from the lower stack structure.

[0009] In some embodiments, a microsemiconductor stack structure is provided, wherein the conductive layers of the stacked structure are connected by electrical connection components.

[0010] In some embodiments, a microsemiconductor stack structure has at least one step having an electrical connection component; the conductive layers of the two stacked structures are connected by the electrical connection component.

[0011] In some embodiments, a microsemiconductor stack structure is provided, wherein the size of the microsemiconductor device ranges from 1 to 50 μm. In some embodiments, a microsemiconductor stack structure is provided, wherein the size of the microlight-emitting diode chip ranges from 1 to 50 μm.

[0012] In some embodiments, a microsemiconductor stack structure is provided, wherein the substrate of the stacked structure is transparent; or, the substrate of the bottommost stacked structure is opaque.

[0013] In some embodiments, a microsemiconductor stack structure is provided, wherein the substrate is a rigid substrate, a flexible substrate, or a dielectric layer formed by a semiconductor coating process.

[0014] In some embodiments, a microsemiconductor stack structure has a conductive layer in the bottommost layer of the stack structure that is an active circuit and includes a TFT or MOS switch.

[0015] In some embodiments, a microsemiconductor stack structure is provided, wherein the microsemiconductor devices in each stacked structure are microlight-emitting diode chips, micron-scale photosensitive chips, or combinations thereof.

[0016] In some embodiments, a microsemiconductor stack structure, along a direction toward the upper stack structure or away from the lower stack structure, comprises three stacked microsemiconductor devices, namely red, green, and blue microlight-emitting diode (LED) wafers, with the light-emitting sides of these LED wafers being close to the upper stack structure or away from the lower stack structure.

[0017] In some embodiments, a microsemiconductor stack structure is provided, wherein two stacked structures are bonded together by an adhesive.

[0018] In some embodiments, a microsemiconductor stack structure is provided, with an adhesive material planarizing the underlying stack structure.

[0019] A microsemiconductor stacked structure includes at least two stacked array units, one of which is superimposed on the other. One stacked array unit is stacked perpendicular to the other. Each stacked array unit includes a substrate, a conductive layer, and a plurality of microsemiconductor devices arranged in an array on the substrate. Each stacked unit includes a matrix circuit, and the microsemiconductor devices are electrically connected to the matrix circuit. Each stacked array unit defines a plurality of target regions arranged in an array. In each stacked array unit, at least one of the microsemiconductor devices corresponds to and is located within one of the target regions. Between pairs of stacked array units, the target regions of the upper stacked array unit individually correspond to and are aligned with the target regions of the lower stacked array unit along the vertical direction. In at least one of the three stacked array units, the matrix circuit of the conductive layer is an active matrix circuit.

[0020] A micro-semiconductor stacked structure includes three stacked array units, wherein two stacked array units are superimposed on the bottommost stacked array unit; wherein: the two stacked array units are superimposed along the vertical direction of the bottommost stacked array unit, each stacked array unit includes a substrate, a conductive layer, and a plurality of micro-light-emitting diode (LED) wafers arranged in an array on the substrate; these conductive layers include matrix circuits, and the micro-LED wafers are electrically connected to the matrix circuits. Each stacked array unit defines a plurality of pixels arranged in an array, and in each stacked array unit, at least one of the micro-LED wafers corresponds to and is located within one of the pixels; between pairs of stacked array units, the pixels of the upper stacked array unit individually correspond to and are vertically aligned with the pixels of the lower stacked array unit; in at least one of the three stacked array units, the matrix circuit of the conductive layer is an active matrix circuit.

[0021] In some embodiments, a microsemiconductor stack structure further has at least one step; wherein: along a direction toward the upper stacked structure array unit or away from the lower stacked structure array unit, at least one step is formed by the dimensions of these substrates decreasing sequentially.

[0022] In some embodiments, in a microsemiconductor stacked structure, between pairs of stacked array units, the conductive layer of an upper stacked array unit is connected to the conductive layer of a lower stacked array unit by at least one electrical connection component.

[0023] In some embodiments, a microsemiconductor stack structure has at least one step having an electrical connection component; between pairs of stacked array units, the conductive layer of the upper stacked array unit is connected to the conductive layer of the lower stacked array unit by the electrical connection component.

[0024] A microsemiconductor stacking structure, wherein the size of the microsemiconductor device ranges from 1 to 50 μm.

[0025] In some embodiments, a microsemiconductor stack structure is provided, wherein the size of each microlight-emitting diode chip ranges from 1 to 50 μm.

[0026] In some embodiments, a microsemiconductor stack structure is provided, wherein the substrate of the stacked array units is transparent; or, the substrate of the bottommost stacked array unit is opaque.

[0027] In some embodiments, a microsemiconductor stack structure is provided, wherein the substrate of the stacked array units is a rigid substrate or a flexible substrate.

[0028] In some embodiments, a microsemiconductor stack structure is provided, wherein two stacked array units are bonded together by an adhesive.

[0029] In some embodiments, a microsemiconductor stack structure is provided, with an adhesive material planarizing the underlying stack structure.

[0030] In some embodiments, a microsemiconductor stack structure is provided, wherein the substrate of the array of stacked structures is a dielectric layer formed by a semiconductor coating process.

[0031] In some embodiments, in a microsemiconductor stacked structure, the conductive layer of the lowest stacked array unit is an active matrix circuit with TFT or MOS switches.

[0032] In some embodiments, a microsemiconductor stacked structure is provided, wherein the microsemiconductor device of each stacked array unit is a microlight-emitting diode chip, a micron-scale photosensitive chip, or a combination thereof.

[0033] In some embodiments, a micro-semiconductor stacked structure, along a direction toward the upper stacked structure array unit or away from the lower stacked structure array unit, has red, green, and blue micro-light-emitting diode chips arranged in units, and the light-emitting side of these micro-light-emitting diode chips is close to the upper stacked structure array unit or away from the lower stacked structure array unit.

[0034] In some embodiments, an electronic device includes a plurality of microsemiconductor stacked structures arranged in an array, and an external electrical control structure electrically connected to at least one conductive layer of the stacked structure.

[0035] In some embodiments, an electronic device includes a microsemiconductor stack structure and an external electrical control structure electrically connected to at least one conductive layer of the stack structure.

[0036] In some embodiments, an electronic device includes a microsemiconductor stack structure and at least one external electronic control structure electrically connected to the conductive layer of at least one stacked array unit. Attached Figure Description

[0037] Figure 1 A top-view schematic diagram of a known electronic device;

[0038] Figure 2 This is a top view schematic diagram of the first embodiment of the electronic device of the present invention, which is composed of multiple micro-semiconductor stacked structure arrays;

[0039] Figure 3A , Figure 3B These are a fabrication schematic diagram and a structural schematic diagram of the micro-semiconductor stacked structure according to the first embodiment of the present invention;

[0040] Figure 4A , Figure 4B These are schematic diagrams of the fabrication and structure of the microsemiconductor stacked structure according to the second embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of the fabrication and structure of the micro-semiconductor stacked structure according to the third embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of the fabrication and structure of the micro-semiconductor stacked structure according to the fourth embodiment of the present invention;

[0043] Figure 7 This is a schematic diagram of the micro-semiconductor stack structure according to the fifth embodiment of the present invention;

[0044] Figure 8 This is a schematic diagram of the micro-semiconductor stack structure according to the sixth embodiment of the present invention;

[0045] Figure 9 This is a schematic diagram of the structure of the electronic device according to the sixth embodiment of the present invention;

[0046] Figure 10A This is a schematic diagram illustrating the fabrication of the micro-semiconductor stacked structure according to the seventh embodiment of the present invention;

[0047] Figure 10BThis is a schematic diagram of the structure of an electronic device composed of a micro-semiconductor stack structure according to the seventh embodiment of the present invention;

[0048] Figure 11 This is a schematic diagram of the structure of an electronic device composed of a micro-semiconductor stack structure according to the eighth embodiment of the present invention;

[0049] Figure 12 This is a schematic diagram of the structure of an electronic device composed of a micro-semiconductor stack structure according to the ninth embodiment of the present invention;

[0050] Figure 13 This is a schematic diagram of the structure of an electronic device composed of a micro-semiconductor stack structure according to the tenth embodiment of the present invention; and

[0051] Figure 14 This is a schematic diagram of the structure of an electronic device composed of a micro-semiconductor stack structure according to the eleventh embodiment of the present invention. Detailed Implementation

[0052] The following description, with reference to the accompanying drawings, illustrates a microsemiconductor stack structure and its electronic device according to a preferred embodiment of the present invention, wherein the same elements will be described using the same reference numerals.

[0053] This invention discloses a microsemiconductor stacked structure, comprising at least two stacked structures: one stacked structure is superimposed on the other stacked structure; one stacked structure is superimposed along the perpendicular direction of the other stacked structure. Each stacked structure includes a substrate, a conductive layer disposed on the substrate, and at least one microsemiconductor device disposed on the substrate and electrically connected to the conductive layer. Each stacked structure defines a target region, and at least one microsemiconductor device of each stacked structure is disposed within the target region; the target regions between any two stacked structures are aligned with each other along the aforementioned perpendicular direction; and in at least one of the at least two stacked structures, the conductive layer is an active circuit. The above-described microsemiconductor stacked structure can be illustrated by the following embodiments:

[0054] [First Embodiment]

[0055] This invention discloses a micro-semiconductor stacked structure comprising three stacked structures, wherein two stacked structures are superimposed on the lowest stacked structure; wherein the two stacked structures are superimposed along the vertical direction of the lowest stacked structure; each stacked structure includes a substrate, a conductive layer disposed on the substrate, and a micro-light-emitting diode (LED) chip disposed on the substrate and electrically connected to the conductive layer. Each stacked structure defines a pixel, and the micro-LED chip in each stacked structure is disposed within a pixel; the target areas between any two stacked structures are aligned with each other along the aforementioned vertical direction; in at least one of the three stacked structures, the conductive layer is an active circuit. For detailed description, please refer to the accompanying documentation. Figure 2 and Figure 3A ,3B The present invention discloses a micro-semiconductor stacked structure 10 and its electronic device 20 according to a first embodiment of the present invention. In this embodiment, the electronic device 20 is a color display unit.

[0056] like Figure 3B The microsemiconductor stacked structure 10 has a first stacked structure 12, a second stacked structure 14, and a third stacked structure 16. A vertical direction Z is defined based on one of the three stacked structures, and the other two stacked structures are sequentially stacked onto the aforementioned stacked structure along the vertical direction Z. In this embodiment, the first stacked structure 12 defines a first direction X and a second direction Y forming a plane, and a vertical direction Z orthogonal to the aforementioned plane. The second and third stacked structures 14 and 16 are sequentially stacked onto the first stacked structure 12 along the vertical direction Z based on the first stacked structure 12, while the third stacked structure 16 is stacked on the second stacked structure 14.

[0057] The first stacked structure 12 includes a first substrate 122, a first conductive layer 124 disposed on the first substrate 122, and a first micro-semiconductor device 126 disposed on the first substrate 122 and electrically connected to the first conductive layer 124; the second stacked structure 14 includes a second substrate 142, a second conductive layer 144 disposed on the second substrate 142, and a second micro-semiconductor device 146 disposed on the second substrate 142 and electrically connected to the second conductive layer 144; the third stacked structure 16 includes a third substrate 162, a third conductive layer 164 disposed on the third substrate 162, and a third micro-semiconductor device 166 disposed on the third substrate 162 and electrically connected to the third conductive layer 164. In the micro-semiconductor stacked structure 10 of this embodiment, the first substrate 122, the second substrate 142, and the third substrate 162 are rigid transparent substrates, such as glass, quartz, sapphire, or equivalents thereof, and the thickness of the rigid transparent substrate ranges from 10 to 500 micrometers. In the first conductive layer 124, the second conductive layer 144, and the third conductive layer 164, at least one conductive layer is an active circuit containing a TFT or MOS switch. In the microsemiconductor stacked structure 10 of this embodiment, the first conductive layer 124 is an active circuit equipped with a TFT or MOS switch. The first microsemiconductor device 126, the second microsemiconductor device 146, and the third microsemiconductor device 166 are microlight-emitting diode chips with different emission wavelengths, namely red, green, and blue monochromatic microlight-emitting diode chips, with a size range between 1-50 μm, and are not limited to vertical or flip-chip microlight-emitting diode chips. The light-emitting side of the microlight-emitting diode chip is close to the upper stacked structure or far away from the lower stacked structure.

[0058] Each stacked structure 12, 14, and 16 defines a pixel, and the micro-semiconductor devices 126, 146, and 166 in each stacked structure 12, 14, and 16 are located within the pixel (i.e., the micro-light-emitting diode chip is located in the target area); these pixels between each pair of stacked structures 12, 14, and 16 are aligned with each other along the vertical direction Z (i.e., the target areas need to be aligned with each other).

[0059] In this embodiment, the dimensions of the first, second, and third substrates 122, 142, and 162 gradually decrease, such that the first substrate 122 defines a first stepped region 1222 and the second substrate 142 defines a second stepped region 1422. Furthermore, after the first, second, and third stacked structures 12, 14, and 16 are stacked, the first stepped region 1222 and the second stepped region 1422 can be formed without being obscured, as shown in the figure. Figure 3B The microsemiconductor stacked structure 10 shown includes first and second step portions 102 and 104. In this embodiment, the first conductive layer 124 extends to the first step portion region 1222 of the first substrate 122; the second conductive layer 144 extends to the second step portion region 1422 of the second substrate 142. The aforementioned first and second step portions 102 and 104 can be used to provide electrical connection components between the two stacked structures, which are joined by leads, mating metal bumps, or drilled holes filled with conductive material. In this embodiment, leads are used as electrical connection components 18. Whether the first and second conductive layers 144 and 164 extend individually to the first and second step portions 1222 and 1422 is not the focus of this invention. The only concern is whether the electrical connection component 18 can electrically connect the conductive layers in any two stacked structures. The concern is whether the electrical connection component 18 is connected by leads, mating metal bumps, or filled holes. The only concern is whether the electrical connection component 18 electrically connects the first, second, and third conductive layers 124, 144, and 164.

[0060] Among them, such as Figure 3B In the first, second, and third stacked structures 12, 14, and 16 of the microsemiconductor stacked structure 10, the stacked structures can be connected to each other in pairs. In this embodiment, the stacked structures are bonded together by an adhesive 19. The present invention does not limit the adhesive 19 to be solid or liquid, as long as it is applied between the stacked structures in pairs and can bond them together. In this embodiment, the adhesive 19 can planarize the lower stacked structure, but the present invention is not limited thereto.

[0061] In detail, the fabrication method of the micro-semiconductor stacked structure 10 of the present invention is as follows: Figure 3AFirst, the first, second, and third micro-semiconductor devices 126, 146, and 166 are respectively placed on three layers of rigid transparent substrates 122, 142, and 162, each pre-determined with first, second, and third conductive layers 124, 144, and 164, to form the first, second, and third stacked structures 12, 14, and 16. The sizes of each substrate 122, 142, and 162 are based on the actual application size. In other words, in the unrestricted array transfer method, the same-color micro-light-emitting diode array (such as an array composed of red micro-light-emitting diode chips) is transferred to the target substrate (large substrate) (not shown in the figure). Then, the target substrate (large substrate) is cut along the micro-light-emitting diode chips of that color (such as along each red micro-light-emitting diode chip), forming individual micro-light-emitting diode chips placed on corresponding substrates 122, 142, and 162 (such as red micro-light-emitting diode chip 126 placed on the first substrate 122). It is worth noting that a single substrate 122, 142, and 162 only carries a single-color micro-light-emitting diode chip, and the relationship between the material of the substrate 122, 142, and 162 and the emission wavelength of the carried micro-light-emitting diode chip is not limited.

[0062] Subsequently, each micro-LED chip can be tested through the conductive layers 124, 144, and 164 on its corresponding substrates 122, 142, and 162. Micro-LED chips of different colors can be further screened as needed, such as according to color, wavelength, and brightness. It is worth noting that the micro-semiconductor stack structure 10 of this invention can screen out defective products in this step, rather than... Figure 1 Common micro-LED display technology requires that three sub-pixels 110a, 120a, and 130a be combined into one pixel 100a before screening. Then, one of each of the sorted first, second, and third stacked structures 12, 14, and 16 is selected and stacked to form the micro-semiconductor stacked structure 10 of this embodiment. The stacked structures 12, 14, and 16 can be bonded together depending on the materials used, or, as in this embodiment, they can be bonded together with an adhesive 19 that can planarize the lower stacked structures.

[0063] When cutting the target substrate (large substrate) into substrates 122, 142, and 162, the cutting size can be determined according to the requirements of each color and gradually reduced accordingly. Taking this embodiment as an example, the size of the first substrate 122 with red micro-LED chips is larger than the size of the second substrate 142 with green micro-LED chips, and the size of the second substrate 142 with green micro-LED chips is larger than the size of the third substrate 162 with blue micro-LED chips, so as to facilitate the formation of the first and second step portions 102 and 104. After forming the first and second step portions 102 and 104, electrical connection components 18 are constructed on the first and second step portions 102 and 104 by means of leads, metal bumps, or vias, so as to provide signal links between other stacked structures and stacked structures with TFT or MOS switches (such as between the first and second stacked structures 12 and 14, between the second and third stacked structures 14 and 16, or between the first and third stacked structures 12 and 16).

[0064] Before the target substrate (large substrate) is cut into substrates 122, 142, and 162, multiple conductive layers 124, 144, and 164 are pre-set on the target substrate (large substrate). After the target substrate (large substrate) is cut, each substrate is provided with a conductive layer (e.g., each first substrate 122 is provided with a first conductive layer 124). The conductive layer is not limited to active or passive circuits; however, at least one of the conductive layers is an active circuit. It is worth noting that in this embodiment, the first conductive layer 124 is an active circuit and is provided with a TFT or MOS switch.

[0065] By further connecting the electrical connection component 18 to an external electrical control structure (not shown in the figure), the electronic device 20, exemplified in this embodiment using a color display unit, can be achieved. Figure 1 Compared to commonly used micro-LED display technologies, the pixel area P*P of commonly used micro-LED display technologies is slightly larger than 3W*3W; in such cases... Figure 1 The limited area contains 4 pixels. In this embodiment, the micro-semiconductor stacked structure 10 is composed of first, second, and third stacked structures 12, 14, and 16 with three-color (R, G, B) micro-light-emitting diodes. Again, taking three micro-light-emitting diode devices of the same size as an example, the pixel width P' in this embodiment is slightly larger than L, and the pixel area P'*P' is slightly larger than L*L, which is obviously smaller than the pixel area P*P of commonly used micro-light-emitting diode display technologies, which is slightly larger than 3W*3W. Therefore, this invention can effectively reduce the pixel area. The electronic device 20 in this embodiment is composed of an array of multiple micro-semiconductor stacked structures 10, forming a color display unit, such as... Figure 2 As shown, in close to Figure 1 Under the condition of a limited area, the unit area of ​​each micro-semiconductor stack structure 10 of the present invention is reduced, thereby increasing the pixel density distributed within its electronic device 20. Specifically, in Figure 1 In commonly used micro-light-emitting diode (LED) display technologies, four pixels are used within a predetermined limited area, while Figure 2 The electronic device 20 shown may provide up to 9 pixels, which obviously improves the resolution.

[0066] It is worth noting that this embodiment can also provide a redundancy mechanism to meet application requirements, such that each pixel contains two micro-LED chips of the same color; wherein, in each stacked structure, the two micro-LED chips of the same color correspond to the same pixel and are driven by the aforementioned conductive layer. Here, the probability of both micro-LED chips failing simultaneously is extremely low, thereby improving the process yield of the present invention. Furthermore, this redundancy mechanism should be applicable to various embodiments of the present invention.

[0067] It is worth noting that, along the direction toward the upper stacked structure or away from the lower stacked structure, the micro-semiconductor devices 126, 146, and 166 of the first, second, and third stacked structures 12, 14, and 16 should be red (R), green (G), and blue (B) micro-light-emitting diode chips, respectively, and the light-emitting side of these micro-light-emitting diode chips is close to the upper stacked structure or away from the lower stacked structure.

[0068] from Figure 2 As can be seen, the electronic device 20 in this embodiment is a color display unit, which can maintain and... Figure 1 Commonly used micro-light-emitting diode display technologies have high resolution within the same limited area; wherein, the electronic device 20 itself can be a color display module that can be spliced ​​together for joint display, or a color display that can be displayed separately, or an equivalent device thereof, none of which are discussed in this invention, except that the electronic device 2 is composed of an array of micro-semiconductor stacked structures 10.

[0069] [Second Embodiment]

[0070] See also Figure 2 and Figure 4A , Figure 4B This invention discloses a microsemiconductor stacked structure 10a according to a second embodiment of the present invention, and an electronic device 20a composed of an array of multiple microsemiconductor stacked structures 10a. In this embodiment, both the microsemiconductor stacked structure 10a and the electronic device 20a are similar to the microsemiconductor stacked structure 10a and the color display unit of the first embodiment; only the differences from the first embodiment are disclosed below: such as Figure 4AThe micro-semiconductor stacked structure 10a has a first stacked structure 12a, a second stacked structure 14a, and a third stacked structure 16a; the first substrate 122a of the first stacked structure 12a, the second substrate 142a of the second stacked structure 14a, and the third substrate 162a of the third stacked structure 16a are all flexible transparent substrates, such as Polyimide, PEN, PET, or equivalents thereof, and the thickness of the flexible transparent substrate ranges from 5 to 100 micrometers.

[0071] Will Figure 4A Select one from each of the first, second, and third layered structures 12a, 14a, and 16a after classification according to requirements, and layer them to form... Figure 4B The micro-semiconductor stacked structure 10a. In this embodiment, the dimensions of the first, second, and third substrates 122a, 142a, and 162a are also sequentially reduced, such that the first substrate 122a defines a first step region 1222a and the second substrate 142a defines a second step region 1422a. Since the substrates 122a, 142a, and 162a in this embodiment are all flexible transparent substrates, after the first, second, and third stacked structures 12a, 14a, and 16a are stacked, not only are the first and second step regions 1222a and 1422a not hidden, but they also form a structure as shown in the figure. Figure 4B The first and second stage portions 102a and 104a of the micro-semiconductor stacked structure 10a shown, and the third stacked structure 16a also further form at least one third stage portion 106a along the surface morphology of the second stacked structure 14a.

[0072] The stacked structures are bonded together using adhesive material 19a. Adhesive material 19a further possesses planarization capabilities, allowing the lower stacked structure to be planarized before bonding with the upper stacked structure. The planarization effect can be found in [reference needed]. Figure 3B As shown; or as Figure 4B Since the adhesive material 19a in this embodiment does not have planarization capability, each layer will be completely bonded according to the surface morphology of the underlying layer's stacked structure.

[0073] In this embodiment, a hole-filling component 18a is used as an electrical connection component to electrically connect the conductive layers between two stacked structures.

[0074] [Third Embodiment]

[0075] See also Figure 2 and Figure 5 This invention discloses a microsemiconductor stacked structure 10b and its electronic device 20b according to a third embodiment. In this embodiment, the microsemiconductor stacked structure 10b is a combination of the materials, processes, and structures of the microsemiconductor stacked structure 10 of the first embodiment and the microsemiconductor stacked structure 10a of the third embodiment; only the differences from the first and third embodiments are disclosed below: such as Figure 5The microsemiconductor stacked structure 10b has a first stacked structure 12b, a second stacked structure 14b, and a third stacked structure 16b. The first stacked structure 12b is selected from the first substrate 122 in the microsemiconductor stacked structure 10 of the first embodiment, and the second stacked structure 14b and the third stacked structure 16b are both selected from the second substrate 142a and the third substrate 162a in the microsemiconductor stacked structure 10a of the third embodiment. The first substrate 122b of the rigid transparent substrate is, for example, glass, quartz, sapphire, or equivalent materials thereof, and the thickness of the rigid transparent substrate ranges from 10 to 500 micrometers. The second substrate 142b and the third substrate 162b of the flexible transparent substrate are, for example, polyimide, PEN, PET, or equivalent materials thereof, and the thickness of the flexible transparent substrate ranges from 5 to 100 micrometers. In this embodiment, leads are used as electrical connection components to electrically connect the conductive layers between each pair of stacked structures.

[0076] Furthermore, the first substrate 122b can also be a non-transparent substrate, such as a silicon wafer or other substrate that is opaque to visible light. The second and third substrates 142 and 162b, other than the first substrate 122b, are transparent materials that allow visible light to pass through. Here, the choice of each layered structure using both rigid and flexible transparent substrates is not limited to this embodiment. For example, two of the layered structures may use rigid transparent substrates as substrates, and the other layer may use a flexible transparent substrate; or the first substrate 122b may be a rigid opaque substrate, and the other two layered structures may use rigid transparent substrates; or at least one layered structure may include both rigid and flexible transparent substrates as substrates. This embodiment is intended to illustrate that the substrates of each layered structure can be implemented in different forms, provided that they do not obstruct the light emission of the micro-LEDs.

[0077] [Fourth Embodiment]

[0078] See also Figure 2 and Figure 6 The present invention discloses a microsemiconductor stacked structure 10c and its electronic device 20c according to a fourth embodiment. For example... Figure 6 The micro-semiconductor stacked structure 10c has a first stacked structure 12c, a second stacked structure 14c, and a third stacked structure 16c; wherein, in the vertical direction Z with the first stacked structure 12c as a reference, the second and third stacked structures 14c and 16c are stacked sequentially on the first stacked structure 12c.

[0079] The first stacked structure 12c includes a first substrate 122c, a first conductive layer 124c disposed on the first substrate 122c, and a first micro-semiconductor device 126c disposed on the first substrate 122c and electrically connected to the first conductive layer 124c. The first substrate 122c is a rigid transparent or opaque substrate, such as transparent glass, quartz, sapphire, or an opaque substrate such as a silicon wafer; the first conductive layer 124c is an active circuit with a TFT or MOS switch; the first, second, and third micro-semiconductor devices 126c, 146c, and 166c can be red, green, and blue micro-light-emitting diode chips, respectively. The second stacked structure 14c includes a second substrate 142c, a second conductive layer 144c disposed on the second substrate 142c, and a second micro-semiconductor device 146c disposed on the second substrate 142c and electrically connected to the second conductive layer 144c. The third stacked structure 16c has a third substrate 162c, a third conductive layer 164c disposed on the third substrate 162c, and a third micro semiconductor device 166c disposed on the third substrate 162c and electrically connected to the third conductive layer 164c.

[0080] Slightly different from the aforementioned embodiments is the process and sequence of the stacked structure in this embodiment: In the aforementioned embodiments, each micro-semiconductor device and conductive layer are respectively disposed on a substrate to form a stacked structure, and each stacked structure is sequentially stacked to form a micro-semiconductor stacked structure; while in this embodiment, the steps of each stacked structure are broken down, and each step is performed sequentially to form a micro-semiconductor stacked structure. The implementation steps of this embodiment are as follows: After the first micro-semiconductor device 126c is transferred to the first substrate 122c, a second substrate 142c as a dielectric layer and a second conductive layer 144c as a metal circuit are fabricated by performing a semiconductor coating process (such as spin-on-glass), and then the second micro-semiconductor device 146c is transferred to the second substrate 142c and electrically connected to the second conductive layer 144c. After repeatedly performing the previous procedure, after the second micro semiconductor device 146c is transferred to the second substrate 142c, a third substrate 162c as a dielectric layer and a third conductive layer 164c as a metal circuit are fabricated by performing a semiconductor coating process. Then, the third micro semiconductor device 166c is transferred to the third substrate 162c and electrically connected to the third conductive layer 164c.

[0081] In this embodiment, during the semiconductor coating process, via filling is also performed using semiconductor technology to serve as electrical connection components 18c. Therefore, the via filling performed using semiconductor technology in this embodiment can provide signal links between other stacked structures and stacked structures with TFTs or MOS switches (such as between the first and second stacked structures 12c and 14c, between the second and third stacked structures 14c and 16c, or between the first and third stacked structures 12c and 16c). However, implementing electrical connection components with via filling is not only applicable to this embodiment, and the electrical connection components in this embodiment are not limited to via filling.

[0082] In this embodiment, the second and third substrates 142c and 162c, which are implemented as dielectric layers using liquid polyimide, can have the ability to planarize the underlying stacked structure and can also simultaneously bond the underlying stacked structure.

[0083] In detail, after the first micro-semiconductor device 126c is transferred onto the first substrate 122c, the first conductive layer 124c is an active circuit with a TFT or MOS switch. The subsequent process sequence is as follows: (1) A dielectric layer is fabricated as the second substrate 142c to isolate the first micro-semiconductor device 126c. The layers are connected by vias. The dielectric layer material can be liquid polyimide, SiO2, SiN, SiON, etc.; (2) The distribution circuit of the second micro-semiconductor device 146c is fabricated on the dielectric layer. (2) The path serves as the second conductive layer 144c; (3) The second micro semiconductor device 146c is transferred so that the assembly of the second substrate 142c, the second conductive layer 144c, and the second micro semiconductor device 146c is equivalent to the second stacked structure 14c; and (4) Steps (1)-(3) are repeated in this manner so that the assembly of the third substrate 162c, the third conductive layer 164c, and the third micro semiconductor device 166c is equivalent to the third stacked structure 16c, thereby forming a micro semiconductor stacked structure 10c.

[0084] [Fifth Embodiment]

[0085] See also Figure 7This invention discloses a fifth embodiment. A microsemiconductor stacked structure 10d has a first stacked structure 12d and a second stacked structure 14d stacked in a vertical direction Z based on the first stacked structure 12d. The first stacked structure 12d has a first substrate 122d, a first conductive layer 124d disposed on the first substrate 122d, and a first microsemiconductor device 126d disposed on the first substrate 122d and electrically connected to the first conductive layer 124d. The second stacked structure 14d has a second substrate 142d, a second conductive layer 144d disposed on the second substrate 142d, and a second microsemiconductor device 146d disposed on the second substrate 142d and electrically connected to the second conductive layer 144d. In this embodiment, the first substrate 122d is a flexible transparent substrate, or a rigid transparent or non-transparent substrate; the first conductive layer 124d is an active circuit with a TFT or MOS switch; the second substrate 142d is a flexible or rigid transparent substrate; the first micro-semiconductor device 126d and the second micro-semiconductor device 146d can be selected from micrometer-scale photosensitive devices capable of detecting different wavelengths, such as infrared micro-sensing chips and ultraviolet micro-sensing chips. Therefore, the electronic device composed of the micro-semiconductor stacked structure 10d array in this embodiment is simply a sensing device.

[0086] Other structures can be found in the third embodiment, such as electrical connection components constructed by means of leads, metal bumps, or vias (in this embodiment, vias are selected as the electrical connection component 18d) to provide signal connection between the first and second stacked structures 12d and 14d. Furthermore, the electronic device constructed in this embodiment is a sensing device; therefore, the infrared microsensing chip and the ultraviolet microsensing chip in each stacked structure 12d and 14d of the microsemiconductor stacked structure 10d are still located in the target areas of each stacked structure 12d and 14d, and the target areas also need to be aligned with each other.

[0087] Each layered structure can be a substrate of various shapes, but the premise is that it does not obstruct the light sensing of the infrared micro-sensing chip and the ultraviolet micro-sensing chip.

[0088] This embodiment is intended to illustrate that the microsemiconductor stacked structure of the present invention is not limited to the light-emitting structure composed of micro light-emitting diode chips (disclosed in the first to fifth embodiments), but can also be a sensing structure composed of photosensitive chips (disclosed in this embodiment), or its equivalents; wherein, the so-called equivalents also include a microsemiconductor stacked structure composed of micro light-emitting diode chips and photosensitive chips (or pressure-sensitive chips or other sensing chips) stacked together, so the selection of microsemiconductor devices is not the focus of this invention. However, the structure formed by placing microsemiconductor devices separately on corresponding substrates to form a stacked structure, and stacking multiple stacked structures, should fall within the equivalent scope of the microsemiconductor stacked structure of the present invention.

[0089] [Sixth Embodiment]

[0090] This invention also discloses a micro-semiconductor stacked structure, comprising at least two stacked array units, one of which is superimposed on the other; one of the stacked array units is stacked along the vertical direction of the other stacked array unit; each stacked array unit includes a substrate, a conductive layer disposed on the substrate, and a plurality of micro-semiconductor devices disposed on the substrate and arranged in an array and electrically connected to the conductive layer; each conductive layer includes a matrix circuit, and the micro-semiconductor devices are electrically connected to the matrix circuit. Each stacked array unit defines a plurality of target regions arranged in an array; in each stacked array unit, at least one of the micro-semiconductor devices corresponds to and is located within one of the target regions; between pairs of stacked array units, the target regions of the upper stacked array unit individually correspond to and are aligned with the target regions of the lower stacked array unit along the vertical direction; in at least one of the three stacked array units, the matrix circuit of the conductive layer is an active matrix circuit.

[0091] The definitions of each element in the microsemiconductor stacked structure in this embodiment are largely the same as in the previous embodiments. The difference is that in this embodiment, an array of microsemiconductor devices is placed on a single substrate with a matrix circuit, and these are stacked as units to form the microsemiconductor stacked structure. Therefore, the first to fifth embodiments described a single microsemiconductor stacked structure with a single target area (e.g., a single pixel), while this embodiment describes a single semiconductor stacked structure with multiple target areas (e.g., multiple pixels). The first to fifth embodiments described a substrate with a conductive layer, and a single microsemiconductor device placed on the substrate and electrically connected to the conductive layer, forming a stacked structure. Multiple stacked structures are then superimposed to form the microsemiconductor stacked structure. In contrast, the stacked structure array unit in this embodiment describes a substrate with a conductive layer forming a matrix circuit, and multiple microsemiconductor devices arranged in an array to electrically connect to the conductive layer, forming a stacked structure array unit. Multiple stacked structure array units are then superimposed to form the microsemiconductor stacked structure.

[0092] The microsemiconductor stacked structure of this embodiment can be further illustrated using a color display unit: A microsemiconductor stacked structure includes three stacked array units, wherein two stacked array units are superimposed on the lowest stacked array unit; wherein the two stacked array units are superimposed along the vertical direction of the lowest stacked array unit, each stacked array unit includes a substrate, a conductive layer disposed on the substrate, and a plurality of microlight-emitting diode (LED) wafers arranged in an array disposed on the substrate; each conductive layer includes a matrix circuit, and the microsemiconductor wafers are electrically connected to the matrix circuit. Each stacked array unit defines a plurality of pixels arranged in an array; in each stacked array unit, at least one of the microlight-emitting diode wafers corresponds to and is located within one of the pixels; between pairs of stacked array units, the pixels of the upper stacked array unit individually correspond to and are vertically aligned with the pixels of the lower stacked array unit; in at least one of the three stacked array units, the matrix circuit of the conductive layer is an active matrix circuit.

[0093] See also Figure 8 The present invention discloses a microsemiconductor stacked structure 10e according to a sixth embodiment. The microsemiconductor stacked structure 10e is formed by stacking three stacked structure array units 120e, 140e, and 160e, namely a first, a second, and a third. Each of the first, second, and third stacked structure array units 120e, 140e, and 160e has a substrate 122e, 142e, and 162e, a conductive layer 1240e, 1440e, and 1640e disposed on the substrate 122e, 142e, and 162e, and a plurality of microsemiconductor devices 126e, 146, and 166e disposed in an array on the substrate 122e, 142e, and 162e and electrically connected to the conductive layer 1240e, 1440e, and 1640e. The plurality of microsemiconductor devices 126e, 146, and 166e are preferably wafer-level devices. Furthermore, in this embodiment, the dimensions of the substrates 122e, 142e, and 162e may not be selected in a sequentially decreasing manner as in the aforementioned embodiments. Therefore, as shown in the previous embodiments... Figure 9 The stacked array units 120e, 140e, and 160e are stacked and then the electrical connection components 19e are formed by coating the sides of the stacked array units 120e, 140e, and 160e with conductive adhesive to achieve electrical connection between pairs of stacked array units; the electrical connection components 19e can also be connected to an external electrical control structure (not shown in the figure) to further constitute the electronic device of this embodiment.

[0094] In detail, the first stacked structure array 120e has a first substrate 122e, a conductive layer 1440e disposed on the first substrate 122e, and a plurality of red micro light-emitting diode chips (i.e. micro semiconductor devices 126e) disposed on the first substrate 122e and arranged in an array and electrically connected to the conductive layer 1240e; the reference numeral 1260e represents the red micro light-emitting diode chip array 1260e, and the conductive layer 1240e is an active matrix circuit with TFT or MOS switches, and these red micro light-emitting diode chips are electrically connected to the matrix circuit. Similarly, the second stacked array unit 140e has a second substrate 142e, a conductive layer 1440e disposed on the second substrate 142e, and a plurality of green micro light-emitting diode chips (i.e., micro semiconductor devices 146e) disposed on the second substrate 142e and arranged in an array and electrically connected to the conductive layer 1440e; the reference numeral 1460e represents the green micro light-emitting diode chip array 1460e, the conductive layer 1440e is a passive matrix circuit, and these green micro light-emitting diode chips are electrically connected to the matrix circuit. The third stacked array unit 160e has a third substrate 162e, a conductive layer 1440e disposed on the third substrate 162e, and a plurality of blue micro light-emitting diode device chips (i.e., micro semiconductor devices 166e) disposed on the third substrate 162e and electrically connected to the conductive layer 1640e; the reference numeral 1660e represents the blue micro light-emitting diode chip array 1660e, the conductive layer 1640e is a passive matrix circuit, and these blue micro light-emitting diode chips are electrically connected to the matrix circuit.

[0095] Each stacked array unit 120e, 140e, 160e defines a plurality of pixels arranged in an array; in each stacked array unit 120e, 140e, 160e, at least one of these micro light-emitting diode chips (i.e. micro semiconductor devices 126e, 146e, 166e) corresponds to and is located within one of these pixels; between pairs of stacked array units, the pixels of the upper stacked array unit individually correspond to and are aligned with the pixels of the lower stacked array unit along the vertical direction.

[0096] In this embodiment, the micro-semiconductor devices are arrayed on the substrate before being sieved according to their electrical properties. Compared to the first embodiment, the cost of sieving defective products in this embodiment is higher than that in the first embodiment. However, since this embodiment involves a one-time array arrangement of micro-semiconductor devices, its overall process cost is still lower than that of the first embodiment. Furthermore, it is worth noting that a redundancy mechanism as described in the first embodiment can also be used, allowing each pixel to contain two micro-light-emitting diode (LED) chips of the same color. In each stacked structure, the two LED chips of the same color correspond to the same pixel and are driven by the matrix circuit of the conductive layer. Here, the probability of two LED chips failing simultaneously is extremely low, thereby reducing the aforementioned cost of sieving defective products and improving the process yield of this invention.

[0097] This embodiment is intended to illustrate that the microsemiconductor stacking structure of the present invention can be formed by first forming an array of microsemiconductor devices on a substrate with matrix circuits, and then stacking the array units in an array-type stacked structure, which can further improve process efficiency; this embodiment can also maintain the beneficial effects of the present invention in reducing the limited area of ​​the microsemiconductor stacking structure and increasing the limited area density of electronic devices.

[0098] Furthermore, although red, green, and blue micro-light-emitting diode chips are used as micro-semiconductor devices in this embodiment, the number of layers of micro-semiconductor devices and stacked array units is not limited to this embodiment.

[0099] [Seventh to Eleventh Embodiments]

[0100] The aforementioned sixth embodiment, which uses a stacked array unit as the unit layer, can also be applied to the aforementioned first to fifth embodiments.

[0101] As in the seventh embodiment Figure 10A , Figure 10B The first embodiment employs a stacked array of microsemiconductor units: microsemiconductor stacked structure 10f.

[0102] Based on the first embodiment, a similar implementation method as the seventh embodiment, using a stacked structure array unit as the unit layer, is carried out. The first stacked structure array unit 120f has a first substrate 122f, a conductive layer 1440f disposed on the first substrate 122f, and a plurality of red micro light-emitting diode chips (i.e., micro semiconductor devices 126f) disposed on the first substrate 122f and arranged in an array and electrically connected to the conductive layer 1240f; the reference numeral 1260f represents the red micro light-emitting diode chip array 1260f, and the conductive layer 1240f is an active matrix circuit with TFT or MOS switches. These red micro light-emitting diode chips (i.e., micro semiconductor devices 126f) are electrically connected to the matrix circuit. Similarly, the second stacked array unit 140f has a second substrate 142f, a conductive layer 1440f disposed on the second substrate 142f, and a plurality of green micro light-emitting diode chips (i.e. micro semiconductor devices 146f) disposed on the second substrate 142f and arranged in an array and electrically connected to the conductive layer 1440f; the reference numeral 1460f represents the green micro light-emitting diode chip array 1460f, the conductive layer 1440f is a passive matrix circuit, and these green micro light-emitting diode chips (i.e. micro semiconductor devices 146f) are electrically connected to the matrix circuit. The third stacked array unit 160f has a third substrate 162f, a conductive layer 1440f disposed on the third substrate 162f, and a plurality of blue micro-light-emitting diode chips (i.e. micro-semiconductor devices 166f) disposed on the third substrate 162f and electrically connected to the conductive layer 1640f; the reference numeral 1660f represents the blue micro-light-emitting diode chip array 1660f, the conductive layer 1640f is a passive matrix circuit, and these blue micro-light-emitting diode chips (i.e. micro-semiconductor devices 166f) are electrically connected to the matrix circuit.

[0103] Slightly different from the sixth embodiment, in this embodiment, as... Figure 10A The dimensions of the first, second, and third substrates 122f, 142f, and 162f gradually decrease, such that the first substrate 122f defines a first stepped region 1222f and the second substrate 142f defines a second stepped region 1422f. After the first, second, and third stacked array units 120f, 140f, and 160f are stacked, the first stepped region 1222f and the second stepped region 1422f can be formed without being obscured, as shown in the figure. Figure 10BThe microsemiconductor stacked structure 10f shown includes first and second stage portions 102f and 104f. The first and second stage portions 102f and 104f can be provided in this embodiment as electrical connection components 18f implemented with leads to electrically connect any two conductive layers of the stacked structure array unit. Further, the external electrical control structure 300f is connected to the conductive layer 1440f of the first stacked structure array unit 120f, achieving the electronic device 200f exemplified in this embodiment as a color display unit. In this embodiment, the external electrical control structure 300f can be implemented all at once after the aforementioned stacked structure array units 120f, 140f, and 160f are stacked. The external electrical control structure 300f has a connection board and a circuit board containing a control IC; the external electrical control structure 300f shown in this embodiment is merely a simplified illustration. Alternatively, the external electrical control structure 300f can be electrically connected only to the electrical connection components 18f of a specific layer to drive all conductive layers of the microsemiconductor stacked structure 10f.

[0104] As in the eighth embodiment Figure 11 The slight difference from the seventh embodiment is that the electrical connection component 18g of the microsemiconductor stack structure 10g is connected to the external electrical control structure 300g. In this embodiment, the electrical connection component 18g is implemented using via filling. The external electrical control structure 300g includes first electrical control components 312g, 314g, and 316g that connect the substrates of each stacked array unit 120g, 140g, and 160g, and a second electrical control component 322g with a control IC 324g that connects the aforementioned first electrical control components 312g, 314g, and 316g. This embodiment is intended to provide other embodiments of the external electrical control structure; however, how the external electrical control structure is implemented is not the focus. It can be configured layer by layer or one layer at a time, or each of the first electrical control components 312g, 314g, and 316g can be connected to a second electrical control component 322g with a control IC 324g. The key is that the external electrical control structure can electrically connect at least one electrical connection component to drive all conductive layers of the microsemiconductor stack structure.

[0105] As in the ninth embodiment Figure 12 Based on the third embodiment, a similar implementation method to the seventh embodiment, using a stacked array of units as the unit layer, is performed: a micro-semiconductor stacked structure 10h. The substrates of each stacked array of units 120h, 140h, and 160h are made of a flexible transparent substrate, and due to the flexibility of the substrate, first, second, and third steps 102h, 104h, and 106h are formed according to the surface morphology of each stacked array of units. In this embodiment, the electrical connection between any two stacked array of units is achieved by using vias as electrical connection components 18h provided in the aforementioned steps.

[0106] As in the tenth embodiment Figure 13Based on the fourth embodiment, a similar implementation method to the seventh embodiment, using stacked array units as unit layers, is described: a micro-semiconductor stacked structure 10i. The first stacked array unit 120i uses a rigid transparent substrate, while the second and third stacked array units 140i and 160i use flexible transparent substrates. Due to the flexibility of the substrates, various steps are formed according to the surface morphology of each stacked array unit. In this embodiment, the electrical connection between two stacked array units is achieved by using vias as electrical connection components 18i provided in the aforementioned steps.

[0107] As in the eleventh embodiment Figure 14 Based on the fifth embodiment: a micro-semiconductor stacked structure 10j. Similar to the fifth embodiment, in this embodiment, after the substrate of the first stacked structure array unit 120j is prepared, each stacked structure array unit 120j, 140j, and 160j is sequentially completed using semiconductor processes; in this embodiment, the electrical connection between two stacked structure array units is achieved by using vias formed in the semiconductor process as electrical connection components 18j.

[0108] The materials, process steps, and their corresponding beneficial effects considered or applied in the first to fifth embodiments can also be equivalently observed and manifested in the sixth to eleventh embodiments.

[0109] [Beneficial Effects]

[0110] The microsemiconductor stacked structure and electronic device of the present invention have at least the following beneficial effects:

[0111] 1. With respect to the micro-semiconductor stacking structure of the present invention, multiple micro-semiconductor devices are stacked vertically while maintaining the electrical functions of the micro-semiconductor devices, which can effectively and significantly reduce the pixel area.

[0112] 2. For the electronic device of the present invention, the number of micro-semiconductor devices existing within a finite area is the finite area divided by the unit area. Therefore, the number of micro-semiconductor devices (such as the number of micro-light-emitting diode chips) that can exist within a finite area is: (finite area / unit area) * number of layers. That is, the pixel density that can be produced within a finite area will be... Figure 1 It is several times more advanced than commonly used micro-light-emitting diode display technology.

[0113] 3. For micro-semiconductor stacked structures and their electronic devices, maintaining and... Figure 1 Common micro-light-emitting diode display technologies can improve pixel density under the same limited area conditions. For example, a 3.5" virtual reality or augmented reality display with a resolution of 2000 pixel density (ppi) can be constructed using micro-light-emitting diode chips. Therefore, this invention can achieve both low cost and high resolution within the limited area of ​​an electronic device.

[0114] 4. For micro-semiconductor stacked structures, the stacking order of each layer in this invention can be determined according to the properties of the micro-semiconductor device, and only the target areas (such as pixels) of each layer need to be aligned.

[0115] 5. All embodiments in this example are applicable to the redundancy mechanism, that is, in each stacked structure / stacked structure unit, a single target area has at least one micro semiconductor device (such as two micro light-emitting diode chips of the same color in a single pixel), which reduces the probability of failure of a single target area, thereby improving the process yield of the present invention.

[0116] 6. This invention can be flexibly applied to existing processes. For the microsemiconductor stacked structures of the first to fifth embodiments, each layer of the present invention can be implemented as in the first to third embodiments, and then the desired layer structure can be selected to form the microsemiconductor stacked structure. Alternatively, as in the fourth embodiment, the present invention can be implemented by using semiconductor processes to lay out the substrate and conductive layer, and then setting up microsemiconductor devices, repeatedly implementing semiconductor processes to sequentially form each layer structure to constitute the microsemiconductor stacked structure. Similarly, in embodiments using a stacked structure array unit as the unit layer, the substrate and conductive layer can also be laid out using semiconductor processes, and then microsemiconductor devices can be set up, layer by layer, to form the microsemiconductor stacked structure.

[0117] The above description is illustrative only and not restrictive. Any equivalent modifications or alterations made without departing from the spirit and scope of this invention should be included within the scope of the appended claims.

Claims

1. A micro-semiconductor stacked structure, comprising: At least two stacked structures, with one stacked structure superimposed on another stacked structure; as well as At least one step, wherein the at least one step is formed by sequentially tapering along a direction toward or away from the lower laminate based on the size of the substrate, and the at least one step includes a cavity filler. in: One of the stacked structures is stacked along the vertical direction of the other stacked structure; Each of the stacked structures includes the substrate, a conductive layer disposed on the substrate, one or more microsemiconductor devices disposed on the substrate and electrically connected to the conductive layer, and one or more additional microsemiconductor devices disposed on the conductive layer and corresponding to the one or more microsemiconductor devices, wherein the microsemiconductor devices and the additional microsemiconductor devices corresponding to the microsemiconductor devices are within a single pixel and have the same color; Each of the stacked structures defines a target region, and at least one of the microsemiconductor devices of each of the stacked structures is disposed within the target region; The target regions between the two stacked structures are aligned with each other along the vertical direction; In at least one of the at least two stacked structures, the conductive layer is an active circuit; and The conductive layers of the two-by-two stacked structures are electrically connected through the vias.

2. The microsemiconductor stacked structure as described in claim 1, wherein: The size range of the microsemiconductor devices is 1-50 μm.

3. The microsemiconductor stacked structure as described in claim 1, wherein: The substrate of the laminated structure is transparent; or, the substrate of the bottommost laminated structure is opaque.

4. The microsemiconductor stacked structure as described in claim 1, wherein: The bottommost layer of the stacked structure contains an active circuit, equipped with TFT or MOS switches.

5. The microsemiconductor stacked structure as described in claim 1, wherein: Each of the aforementioned stacked microsemiconductor devices is a micro-light-emitting diode chip, a micron-scale photosensitive chip, or a combination thereof.

6. The microsemiconductor stacked structure as described in claim 1, wherein: The two layers are joined together by adhesive.

7. An electronic device comprising: Multiple microsemiconductor stacked structures as described in claim 1 are arranged in an array; as well as At least one external electrical control structure is electrically connected to at least one conductive layer of a stacked structure.

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