Display panel

Abstract

A display panel is disclosed. The display panel includes a first substrate including an opening region, a display region, and a non-display region; a plurality of display elements arranged in the display region; a second substrate facing the first substrate, the plurality of display elements being located between the first substrate and the second substrate; a sealing member arranged between the first substrate and the second substrate; a first wire located between the opening region and the display region, the first wire being positioned in the non-display region; a second wire positioned in the non-display region; and at least one insulating layer arranged between the first wire and the second wire.

Description

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2019-0053901, filed on May 8, 2019, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] One or more embodiments relate to a display panel. Background Technology

[0003] Recently, the applications of display devices have become more diversified. Furthermore, as display devices have become thinner and lighter, their range of uses has gradually expanded. With the area occupied by the display area of ​​the display device increasing, functions that can be combined with or related to the display device are being added. Summary of the Invention

[0004] As a means of adding various functions while increasing the area occupied by the display area, display panels with various suitable structures, such as those in which an opening region is formed in a portion of the display area, are being developed. Because the shapes of display panels are diverse, the quality of the display panel can deteriorate if heat is transferred to the display elements through the edges of the display panel during or after the manufacturing process. This disclosure provides a display panel for solving the problems including those described above. The above aspects are provided only as examples, and the scope of this disclosure is not limited thereto.

[0005] Additional aspects will be set forth in part in the description which follows, and will be apparent in part from the description, or may be learned by practice of the disclosed embodiments.

[0006] According to one or more embodiments, a display panel includes: a first substrate including an opening region, a display region, and a non-display region; a plurality of display elements disposed in the display region; a second substrate facing the first substrate, the plurality of display elements being located between the first substrate and the second substrate; a sealing member disposed between the first substrate and the second substrate and positioned in the non-display region; a first conductor located between the opening region and the display region, the first conductor being positioned in the non-display region; a second conductor being positioned in the non-display region; and at least one insulating layer disposed between the first conductor and the second conductor.

[0007] The first and second conductors may be made of different metals, and the thermal conductivity of the first conductor may be less than that of the second conductor.

[0008] The first wire may be placed between the first base and the first part of the sealing member, and the second wire may be placed between the first base and the second part of the sealing member.

[0009] The ends of the first conductor and the second conductor can overlap each other.

[0010] The ends of the first conductor and the second conductor can be connected to each other through a contact hole defined in at least one insulating layer.

[0011] The first and second conductors can be separated from each other.

[0012] The first part of the sealing member can completely surround the opening area, and the second part of the sealing member can be separated from the first part and can completely surround the display area.

[0013] Each of the plurality of display elements may include a pixel electrode, an intermediate layer and a counter electrode stacked sequentially, and a second wire may be electrically connected to the counter electrode.

[0014] The first conductor may include multiple sub-conductors.

[0015] The first conductor may also include a bridging connector that connects the multiple sub-conductors.

[0016] According to one or more embodiments, the display panel includes: a first substrate and a second substrate facing each other, a plurality of display elements located between the first substrate and the second substrate; a sealing member located between the first substrate and the second substrate; at least one insulating layer disposed between the first substrate and the sealing member; a first conductor disposed below a first portion of the sealing member; and a second conductor disposed below a second portion of the sealing member, wherein the first conductor and the second conductor comprise different materials.

[0017] The display panel may further include: thin-film transistors and storage capacitors, the thin-film transistors and the storage capacitors being electrically connected to corresponding display elements among the plurality of display elements, wherein the first wire may include the same material as the pixel electrodes of the plurality of display elements, the gate electrodes of the thin-film transistors and / or the electrodes of the storage capacitors, and the thermal conductivity of the first wire may be less than that of the second wire.

[0018] One of the first and second conductors may be positioned below the at least one insulating layer, and the other of the first and second conductors may be positioned above the at least one insulating layer.

[0019] The ends of the first conductor and the second conductor can overlap each other.

[0020] The ends of the first conductor and the second conductor can be connected to each other through contact holes defined in the at least one insulating layer.

[0021] The second conductor may include a power line that supplies voltage to the plurality of display elements.

[0022] The first conductor may include multiple sub-wires and bridging wires connecting the multiple sub-wires.

[0023] Both the first substrate and the second substrate may include a display area and an opening area, and the first wire may be positioned between the display area and the opening area.

[0024] The first and second conductors can be partially overlapped.

[0025] The first and second conductors can be separated from each other.

[0026] The above and other aspects, features and advantages of certain disclosed embodiments will become more apparent from the following description, drawings and claims. Attached Figure Description

[0027] The above and other aspects, features, and advantages of certain embodiments disclosed will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 This is a perspective view of a display device according to an embodiment;

[0029] Figures 2A to 2C This is a cross-sectional view of a display device according to an embodiment;

[0030] Figure 3 This is a plan view of the display panel according to an embodiment;

[0031] Figure 4 This is an equivalent circuit diagram of one of the pixels in the display panel according to an embodiment;

[0032] Figure 5 This is a cross-sectional view of the display panel according to an embodiment, showing the display area and the second non-display area;

[0033] Figure 6 This is a plan view of the first and second conductors of the display panel according to an embodiment;

[0034] Figure 7 This is a cross-sectional view of the display panel according to an embodiment;

[0035] Figures 8A to 8C This is a cross-sectional view of the display panel according to an embodiment;

[0036] Figures 9A to 9C This is a cross-sectional view of the display panel according to an embodiment;

[0037] Figure 10 This is a cross-sectional view of the display panel according to an embodiment;

[0038] Figure 11 This is a plan view of a portion of the display panel according to an embodiment;

[0039] Figure 12 This is a plan view of a portion of the display panel according to an embodiment;

[0040] Figure 13 This is a plan view of a portion of the display panel according to an embodiment; and

[0041] Figure 14 This is a plan view of the display panel according to an embodiment. Detailed Implementation

[0042] Referring now to embodiments, examples of which are shown in the accompanying drawings, wherein the same reference numerals always refer to the same elements. In this respect, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only by reference to the accompanying drawings to explain various aspects of this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of…” modify the entire list of elements when following a list of elements, rather than a single element within that list. Furthermore, the word “may” is used when describing embodiments of the inventive concept to mean “one or more embodiments of the inventive concept.”

[0043] The disclosure will be described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the disclosure are illustrated. When described with reference to the accompanying drawings, the same reference numerals in the drawings denote the same or corresponding elements, and their repeated descriptions will not be provided.

[0044] It will be understood that although the terms “first,” “second,” etc., may be used here to describe various suitable components, these components should not be limited by these terms. These components are only used to distinguish one component from another.

[0045] As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “one,” and “the” are also intended to include the plural forms.

[0046] It will also be understood that the terms “comprising / including” and / or variations thereof, as used herein, indicate the presence of the stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0047] It will be understood that when a layer, region, or component is referred to as being "formed on" another layer, region, or component, that layer, region, or component may be formed directly or indirectly on said other layer, region, or component. That is, for example, intermediate layers, regions, and / or components may exist.

[0048] For ease of explanation, the dimensions of the elements in the accompanying drawings may be exaggerated. In other words, since the dimensions and thicknesses of the components in the accompanying drawings are arbitrarily shown for ease of explanation, the following embodiments are not limited thereto.

[0049] When an embodiment can be implemented differently, the specific process sequence can be performed differently than the described sequence. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of the described sequence.

[0050] It will be understood that when a layer, region, or component is referred to as being "connected" to another layer, region, or component, that layer, region, or component may be "directly connected" to said other layer, region, or component, or may be "indirectly connected" to said other layer, region, or component (with other layers (one or more), regions (one or more), and / or components (one or more) situated between them). For example, it will be understood that when a layer, region, or component is referred to as being "electrically connected" to another layer, region, or component, that layer, region, or component may be "directly electrically connected" to said other layer, region, or component, or may be "indirectly electrically connected" to said other layer, region, or component (with other layers (one or more), regions (one or more), and / or components (one or more) situated between them).

[0051] Figure 1 This is a perspective view of the display device 1 according to an embodiment.

[0052] Reference Figure 1 The display device 1 includes a display area DA and a non-display area NDA. The display device 1 can display a set or predetermined image by using light emitted from pixels arranged in the display area DA. The display device 1 may include an opening area OA. The opening area OA may be located at the edge of the display area DA and partially surrounded by the display area DA. The display device 1 includes a hole 1H located in the opening area OA. The hole 1H may be an edge hole passing through the display device 1 and located at the edge (center) of the display area DA.

[0053] The non-display area NDA is a region in which no pixels are disposed and may surround the display area DA. A portion of the non-display area NDA may be located between the display area DA and the opening area OA. In the following, in one or more embodiments and for ease of description, the region of the non-display area NDA between the display area DA and the opening area OA is referred to as the first non-display area NDA1, and the remaining region of the non-display area NDA is collectively referred to as the second non-display area NDA2.

[0054] Although the display device 1 according to the embodiment is described as an organic light-emitting display device by way of example, the display device according to this disclosure is not limited thereto. In another embodiment, the display device can be various types or kinds of display devices, such as inorganic light-emitting displays, quantum dot light-emitting displays, and / or liquid crystal displays. In an embodiment, each pixel of the display device 1 may include an emitting layer. The emitting layer may include organic materials, inorganic materials, quantum dots, organic materials and quantum dots, or inorganic materials and quantum dots. In the case where the display device 1 is a liquid crystal display, each pixel may include liquid crystal molecules.

[0055] Figures 2A to 2C This is a cross-sectional view of the display device 1 according to the embodiment, and each can be compared with the view along the […]. Figure 1 The sectional view corresponding to line II-II'.

[0056] Reference Figures 2A to 2C The display device 1 may include a display panel 10, an input sensing component 20, and an optical functional component 30. The display panel 10 can display images using pixels arranged in the display area DA.

[0057] The input sensing component 20 obtains coordinate information corresponding to an external input (e.g., a touch event). The input sensing component 20 may include sensing electrodes (or touch electrodes) and traces connected to the sensing electrodes. The input sensing component 20 may be arranged on the display panel 10. Optionally, in one or more embodiments, the input sensing component 20 may be arranged on the optical functional component 30.

[0058] The process of forming the input sensing component 20 can be performed consecutively after the process of forming the display panel 10. In this case, such as Figure 2A and Figure 2C As shown, an adhesive layer may not be required between the display panel 10 and the input sensing member 20. In another embodiment, the process for forming the input sensing member 20 may be performed separately from the process for forming the display panel 10. In this case, as... Figure 2B As shown, an adhesive layer such as optically clear adhesive (OCA) can be arranged between the input sensing component 20 and the display panel 10.

[0059] The optical functional component 30 can reduce the reflectivity of light (external light) incident from the outside toward the display panel 10 and / or improve the color purity of light emitted from the display panel 10.

[0060] In an embodiment, the optical functional component 30 may include a retarder and a polarizer. The retarder may include a film-type retarder or a liquid crystal-type retarder. The retarder may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may include a film-type polarizer or a liquid crystal-type polarizer. A film-type polarizer may include a stretchable synthetic resin film, and a liquid crystal-type polarizer may include liquid crystals arranged in a set or predetermined pattern. Each of the retarder and polarizer may also include a protective film. The retarder and polarizer themselves, or the protective film, may be defined as a substrate layer of the optical functional component 30.

[0061] In another embodiment, the optical functional component 30 may include a black matrix and color filters. The color filters can be arranged to take into account the colors of light emitted from the pixels of the display panel 10, respectively. Each of the color filters may include red, green, and / or blue pigments and / or dyes. Optionally, in addition to pigments and / or dyes, each color filter may also include quantum dots. Optionally, some color filters may not include pigments or dyes and may include scattering particles such as titanium dioxide.

[0062] In another embodiment, the optical functional component 30 may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light reflected by the first reflective layer and the second reflective layer, respectively, can produce destructive interference, and thus reduce the reflectivity of external light.

[0063] Optical functional components (or layers) 30 can be disposed on the input sensing component 20. The process for forming the optical functional component 30 can be performed separately from the process for forming the input sensing component 20. In this case, as... Figure 2A and Figure 2B As shown, an adhesive layer such as an optically clear adhesive (OCA) can be disposed between the optical functional component 30 and the input sensing component 20. In another embodiment, the process of forming the optical functional component 30 can be performed sequentially after the process of forming the input sensing component 20. In this case, as... Figure 2C As shown, an adhesive layer may not be required between the optical functional component 30 and the input sensing component 20.

[0064] Despite Figures 2A to 2CThe diagram shows an optical functional component 30 arranged on an input sensing component 20, but in another embodiment, the optical functional component 30 may be disposed below the input sensing component 20.

[0065] The display panel 10, the input sensing member 20, and the optical functional member 30 may each include an opening corresponding to the opening region OA. The holes 10H of the display panel 10, the holes 20H of the input sensing member 20, and the holes 30H of the optical functional member 30 may be stacked on top of each other in the opening region OA and may form the hole 1H (or edge hole) of the display device 1.

[0066] The opening region OA may include a component region in which a component CMP for adding various suitable functions to the display device 1 is positioned. The component CMP may include electronic components. The component CMP may include electronic components that use light or sound. For example, the electronic components may be sensors such as infrared sensors that emit and / or receive light, cameras that receive light and capture images, sensors that output and sense light and / or sound to measure distance and / or identify fingerprints, lamps that output light, and / or speakers that output sound. Electronic components using light may use light in various suitable wavelength bands, such as visible light, infrared light, and / or ultraviolet light. In embodiments, the opening region OA may be a transmissive area through which light and / or sound propagating from the component CMP to the outside or from the outside toward the electronic components can pass.

[0067] Where the display device 1 provides specific information, such as in a smartwatch or a dashboard for a car, the component CMP can be a member such as a pointer indicating set or predetermined information (e.g., vehicle speed, fuel level, time, etc.). Optionally, the component CMP may include elements such as lights and / or accessories that enhance the aesthetics of the display device 1.

[0068] In one or more embodiments, the window may be arranged on the optical functional member 30, and the adhesive layer may be placed between the window and the optical functional member 30.

[0069] Figure 3 This is a plan view of the display panel 10 according to an embodiment.

[0070] Reference Figure 3 The display panel 10 may include a display area DA, an opening area OA, a first non-display area NDA1, and a second non-display area NDA2. The opening area OA may be located on one side of the display panel 10 and partially surrounded by the display area DA. The first pixel P1 and the second pixel P2 may be spaced apart from each other, and the opening area OA is located between the first pixel P1 and the second pixel P2. The first pixel P1 and the second pixel P2 are located among a plurality of pixels P arranged in the display area DA.

[0071] The display panel 10 may include a hole 10H positioned in the opening region OA and passing through the display panel 10. The hole 10H may be formed while the portion of an element of the display panel 10 corresponding to the opening region OA is removed. The display panel 10 may include a first edge 10E1 and a recessed edge 10C connected to the first edge 10E1. The boundary of the hole 10H of the display panel 10 may be defined by the recessed edge 10C. Although in Figure 3 The illustration shows a display panel 10 including a first edge 10E1, a second edge 10E2, a third edge 10E3, and a fourth edge 10E4. The third edge 10E3 and the fourth edge 10E4 are longer than the first edge 10E1 and the second edge 10E2 and connect the first edge 10E1 and the second edge 10E2. However, the embodiment is not limited to this. In another embodiment, the display panel 10 may include five or more edges and includes corners positioned between adjacent edges. Figure 3 The corner shown is different; this corner can be rounded.

[0072] The display panel 10 may include a first substrate 100, a second substrate 300, and a sealing member 350. The sealing member 350 may be arranged between the first substrate 100 and the second substrate 300, which are stacked on top of each other.

[0073] A sealing member 350 may extend along the edge of the display area DA to surround the display area DA. A first portion 350A of the sealing member 350 may be positioned between the opening area OA and the display area DA (e.g., positioned in the first non-display area NDA1) and may extend along the recessed edge 10C of the display panel 10. A second portion 350B of the sealing member 350 may be positioned in the second non-display area NDA2 and may extend along the remaining edges of the display panel 10 excluding the recessed edge 10C. The first non-display area NDA1 and the second non-display area NDA2 may be connected to each other, and the first portion 350A and the second portion 350B of the sealing member 350 may be integrally joined.

[0074] Figure 3 This can be a diagram of a first substrate 100 and / or a second substrate 300 of a display panel 10. For example, the first substrate 100 and / or the second substrate 300 may include an opening region OA, a display region DA, a first non-display region NDA1, and a second non-display region NDA2. The portions of the first substrate 100 and the second substrate 300 corresponding to the opening region OA are removed, respectively. Both the first substrate 100 and the second substrate 300 may include an edge or side surface constituting the recessed edge 10C.

[0075] The first substrate 100 may include a pad unit PAD positioned within a second non-display area NDA2. The pad unit PAD is not covered by the second substrate 300. The pad unit PAD can be connected to a line via wiring (e.g., see below). Figure 4 The described data lines, drive voltage lines, etc., pass through the display area DA. A driver integrated circuit (IC) including a data driver can be disposed on the pad unit PAD, or one end of a flexible printed circuit board in which the data driver is disposed can be positioned on the pad unit PAD. The driver IC can be electrically connected to the pad unit PAD via an anisotropic conductive film disposed between the driver IC and the pad unit PAD. The flexible printed circuit board can be electrically connected to the pad unit PAD via various conductive components.

[0076] Figure 4 This is an equivalent circuit diagram of one of the pixels P in the display panel 10 according to an embodiment.

[0077] like Figure 4 As shown, each pixel P may include a pixel circuit PC and a display element connected to the pixel circuit PC, such as an organic light-emitting diode (OLED). The pixel circuit PC may include a first thin-film transistor T1, a second thin-film transistor T2, and a storage capacitor Cst. Each pixel P may emit, for example, red, green, blue, or white light through the OLED.

[0078] The second thin-film transistor T2 may include a switching thin-film transistor, which can be connected to the scan line SL and the data line DL, and transmits the data voltage input from the data line DL to the first thin-film transistor T1 based on the switching voltage input from the scan line SL. A storage capacitor Cst can be connected to the second thin-film transistor T2 and the drive voltage line PL, and can store a voltage corresponding to the difference between the voltage transmitted from the second thin-film transistor T2 and the first power voltage ELVDD supplied through the drive voltage line PL.

[0079] The first thin-film transistor T1 is a driving thin-film transistor and can be connected to the driving voltage line PL and the storage capacitor Cst. It can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can emit light with a set or predetermined brightness by utilizing the driving current. The counter electrode (e.g., cathode) of the OLED can receive a second power voltage ELVSS.

[0080] Despite Figure 4The diagram shows a pixel circuit PC comprising two thin-film transistors and one storage capacitor, but this disclosure is not limited thereto. The number of thin-film transistors and the number of storage capacitors can be modified in various ways depending on the design of the pixel circuit PC. For example, in addition to the two thin-film transistors described above, the pixel circuit PC may also include four, five, or more thin-film transistors.

[0081] Figure 5 This is a cross-sectional view of the display panel 10 according to an embodiment, and shows the display area DA and the second non-display area NDA2. Figure 5 It can correspond to along Figure 3 The cross section taken by line V-V'.

[0082] First, refer to Figure 5 The display area DA is located on the first substrate 100, and the display layer 200 may include pixels P. Each pixel P may include pixel circuitry PC and an organic light-emitting diode (OLED) connected thereto. The pixel circuitry PC may include a thin-film transistor (TFT) and a storage capacitor Cst.

[0083] A buffer layer 201 may be disposed between the first substrate 100 and the thin-film transistor (TFT). The buffer layer 201 may block foreign substances or moisture from penetrating the first substrate 100. The buffer layer 201 may include an inorganic insulating material (e.g., silicon oxide, silicon nitride, and / or silicon oxynitride), and may comprise a single layer or multiple layers containing the aforementioned materials.

[0084] A thin-film transistor (TFT) may include a semiconductor layer Act and a gate electrode GE. The semiconductor layer Act may include, for example, polycrystalline silicon. The semiconductor layer Act may include a channel region C, a source region S, and a drain region D, with the channel region C stacked on top of the gate electrode GE, and the source region S and drain region D including impurities at a higher concentration than those in the channel region C. The source region S and drain region D may be the source electrode and drain electrode of the thin-film transistor TFT, respectively. In another embodiment, the semiconductor layer Act may include amorphous silicon, oxide semiconductor, or organic semiconductor.

[0085] The gate electrode GE may include a low-resistance metallic material. The gate electrode GE may include a conductive material comprising Mo, Al, Cu, and Ti, and may comprise a single layer or multiple layers comprising the aforementioned materials. In an embodiment, the gate electrode GE may include a metal layer comprising Mo.

[0086] The gate insulating layer 203 may be disposed between the semiconductor layer Act and the gate electrode GE. The gate insulating layer 203 may include an inorganic insulating material (e.g., silicon oxide, silicon nitride, and / or silicon oxynitride), and may comprise a single layer or multiple layers containing the aforementioned materials.

[0087] The storage capacitor Cst may include a first electrode CE1 and a second electrode CE2. A first interlayer insulating layer 205 may be disposed between the first electrode CE1 and the second electrode CE2. The first interlayer insulating layer 205 may include an inorganic insulating material (e.g., silicon oxide, silicon nitride, and / or silicon oxynitride), and may include a single layer or multiple layers containing the aforementioned materials. The second electrode CE2 may include a conductive material containing Mo, Al, Cu, and Ti, and may include a single layer or multiple layers containing the aforementioned materials. In an embodiment, the second electrode CE2 may include a metal layer containing Mo.

[0088] Despite Figure 5 The illustration shows a storage capacitor Cst stacked with a thin-film transistor (TFT), and a first electrode CE1 also serving as the gate electrode GE of the TFT; however, the embodiment is not limited to this. In another embodiment, the storage capacitor Cst may not be stacked with the TFT. The first electrode CE1 may be a separate element independent of the gate electrode GE of the TFT.

[0089] The storage capacitor Cst may be covered by a second interlayer insulating layer 207. The second interlayer insulating layer 207 may include an inorganic insulating material (e.g., silicon oxide, silicon nitride, and / or silicon oxynitride) and may comprise a single layer or multiple layers containing the aforementioned materials.

[0090] The data line DL and the drive voltage line PL can be disposed on the second interlayer insulation layer 207 and covered by the planarization insulation layer 209. The planarization insulation layer 209 may include an organic insulating material. For example, the planarization insulation layer 209 may include polyimide.

[0091] The data line DL and the drive voltage line PL may include a conductive material comprising Mo, Al, Cu, and / or Ti, and may comprise a single layer or multiple layers comprising the aforementioned materials. In an embodiment, the data line DL and the drive voltage line PL may include a Ti / Al / Ti multilayer wherein titanium layers, aluminum layers, and titanium layers are sequentially stacked.

[0092] The pixel electrode 210 can be positioned on the planarization insulating layer 209. The pixel electrode 210 can be electrically connected to the pixel circuit PC through a contact hole passing through the planarization insulating layer 209.

[0093] The pixel electrode 210 may include a reflective layer comprising at least one of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, and Cr. The pixel electrode 210 may also include a layer of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In2O3) contained on and / or beneath the reflective layer.

[0094] Pixel defining layer 211 is positioned on pixel electrode 210 and includes an opening exposing a central portion of pixel electrode 210. Pixel defining layer 211 can prevent or suppress arcing or the like between the end of pixel electrode 210 and counter electrode 230 by insulating the end of pixel electrode 210 from counter electrode 230 and / or increasing the distance between the end of pixel electrode 210 and counter electrode 230. Pixel defining layer 211 may include organic materials, such as polyimide and / or hexamethyldisiloxane (HMDSO).

[0095] Intermediate layer 220 includes an emitter layer. Intermediate layer 220 may include a first functional layer disposed below the emitter layer and / or a second functional layer disposed on the emitter layer. Intermediate layer 220 may include a low molecular weight material or a polymer material. The first functional layer may include a hole injection layer (HIL) and / or a hole transport layer (HTL). The second functional layer may include an electron transport layer (ETL) and an electron injection layer (EIL). At least one of the layers constituting intermediate layer 220 may be formed integrally in the display area DA. For example, the emitter layer of intermediate layer 220 is positioned to be stacked with each pixel electrode 210. Conversely, the first functional layer and / or the second functional layer may be formed integrally to correspond to a plurality of pixels P.

[0096] Counter electrode 230 is disposed on intermediate layer 220. Counter electrode 230 may be formed integrally to cover multiple pixels P. Counter electrode 230 may include, but is not limited to, a transparent conductive layer comprising indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In2O3). In another embodiment, counter electrode 230 may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, and / or alloys thereof.

[0097] The capping layer CPL can be positioned on the counter electrode 230. The capping layer CPL may include LiF, inorganic insulating material, and / or organic insulating material. In embodiments, the capping layer CPL may be omitted.

[0098] Reference Figure 5 The second non-display area NDA2 is sealed with a sealing member 350 between the first substrate 100 and the second substrate 300. The first inner surface of the first substrate 100 may face the second inner surface of the second substrate 300, and the sealing member 350 may be positioned between the first inner surface and the second inner surface. The first substrate 100 includes a first outer surface opposite to the first inner surface and a first side surface 100E1 connecting the first inner surface and the first outer surface. The first side surface 100E1 of the first substrate 100 may correspond to an edge, for example, the fourth edge 10E4 of the display panel 10. Figure 3Similarly, the second substrate 300 includes a second outer surface opposite to the second inner surface and a second side surface 300E1 connecting the second inner surface and the second outer surface. The second side surface 300E1 corresponds to a side surface of the second substrate 300. The first side surface 100E1 of the first substrate 100 and the second side surface 300E1 of the second substrate 300 can define reference to... Figure 3 The fourth edge 10E4 of the described display panel 10.

[0099] The sealing member 350 may include, for example, a glass frit. A glass frit is a member comprising a glass material, which is a raw material for glass and may have the property of being hardened upon exposure to a laser beam. The glass frit comprises a composition including, as a major component, V₂O₅ (about 15 wt% to about 40 wt%), TeO₂ (about 10 wt% to about 30 wt%), P₂O₅ (about 1 wt% to about 15 wt%), BaO (about 1 wt% to about 15 wt%), ZnO (about 1 wt% to about 20 wt%), ZrO₂ (about 5 wt% to about 30 wt%), WO₃ (about 5 wt% to about 20 wt%), and BaO (about 1 wt% to about 15 wt%), and contains at least one of Fe₂O₃, CuO, MnO, Al₂O₃, Na₂O, and Nb₂O₅ as an additive. In another embodiment, the sealing member 350 may comprise a material such as epoxy resin.

[0100] The wire can be positioned below the sealing member 350, for example, between the first base 100 and the sealing member 350. Regarding this, in Figure 5 The diagram shows the second conductor 160 arranged in the second non-display area NDA2 below the second portion 350B of the sealing member 350.

[0101] The second conductor 160 may include a power line that applies power to a pixel P disposed in the display area DA. For example... Figure 5 As shown, the second conductor 160 can be disposed on the same layer as the layer (second interlayer insulating layer 207) on which data lines DL or drive voltage lines PL are disposed, and can be electrically connected to the counter electrode 230 through the dielectric of the connecting electrode layer 260. The counter electrode 230 can extend beyond the dummy pixel DPX and connect to the connecting electrode layer 260, and the connecting electrode layer 260 can extend toward the sealing member 350 and connect to the second conductor 160. The second conductor 160 can reference... Figure 4 The second electrical voltage ELVSS described is provided to the counter electrode 230.

[0102] The second conductor 160 is a metal wire, which may include the same material as the data line DL or the drive voltage line PL, and fully ensures the mechanical strength of the display panel 10.

[0103] The second portion 350B of the sealing member 350 may be stacked with the second wire 160 to cover a portion of the second wire 160. The end portion 160E of the second wire 160 may be positioned within the sealing member 350, for example, between the outer surface 350Bb and the inner surface 350Ba of the second portion 350B of the sealing member 350. In embodiments, the sealing member 350 (e.g., the second portion 350B) may have a width of about 200 μm to about 800 μm and a thickness of about 2 μm to about 10 μm.

[0104] The outer surface 350Bb of the second portion 350B of the sealing member 350 may not be positioned on the same vertical line as the first side surface 100E1 of the first base 100 and the second side surface 300E1 of the second base 300. That is, the outer surface 350Bb of the second portion 350B of the sealing member 350 may be positioned on a surface different from the first side surface 100E1 of the first base 100 and the second side surface 300E1 of the second base 300. Optionally, the outer surface 350Bb of the second portion 350B of the sealing member 350 may be continuously connected to the first side surface 100E1 of the first base 100 and the second side surface 300E1 of the second base 300 to form a single surface.

[0105] The display panels 10 can be formed by forming multiple display panels 10 on a mother substrate and then cutting the mother substrate into individual display panels 10. In this case, the process for forming the recessed edge 10C of the display panel 10 may include a laser ablation process. In an embodiment, after cutting each display panel 10 from the mother substrate, the portion of each display panel 10 corresponding to the opening region OA can be removed. The portion of the display panel 10 corresponding to the opening region OA can be mainly removed by a laser ablation process and the portion of the display panel 10 corresponding to the opening region OA can be further refined by a polishing process to form the recessed edge 10C. In cases where more than two different processes are performed as described above, the wear of the tools used during the polishing process can be reduced or minimized.

[0106] As described above, the process for forming the recessed edge 10C of the display panel 10 can be different from the process for forming the straight edge of the display panel 10. In this case, the side surface of each of the first substrate 100 and the second substrate 300 corresponding to the straight edge of the display panel 10 (e.g., the first edge 10E1 to the fourth edge 10E4) can have a shape different from the shape of the side surface of each of the first substrate 100 and the second substrate 300 corresponding to the recessed edge 10C of the display panel 10. For example, as Figure 5 and Figure 7As shown, the straight edge (e.g., the fourth edge 10E4) of the display panel 10 may have a shape that is different from the shape of the side surface of the first substrate 100 corresponding to the recessed edge 10C and the side surface of the second substrate 300 corresponding to the recessed edge 10C.

[0107] The organic light-emitting diode (OLED) of the display panel 10 may be damaged due to the heat generated during the laser ablation process. Conversely, according to an embodiment, because the first conductor 150 (refer to...) Figure 6 The first non-display area NDA1 is provided, thus preventing or minimizing the aforementioned problems. For example, if the first conductor 150 is provided in the first non-display area NDA1, and the first conductor 150 comprises a material different from that of the second conductor 160 and is disposed on a layer different from the layer on which the second conductor 160 is disposed in the second non-display area NDA2, the mechanical strength of the display panel 10 can be sufficiently ensured, and at the same time, damage to the organic light-emitting diode OLED caused by heat generated when using a laser beam can be prevented or suppressed. Compared to the case where a metal layer comprising the same material as the second conductor 160 is disposed not only in the second non-display area NDA2 but also in the first non-display area NDA1, the display panel 10 comprising the first conductor 150 in the first non-display area NDA1 and the second conductor 160 in the second non-display area NDA2 can reduce the maximum temperature of the organic light-emitting diode OLED caused by the laser beam by approximately 25% (approximately 30%). ℃ (or more). The above effect can be significantly achieved when the width of the first non-display area NDA1 is smaller than the width of the second non-display area NDA2.

[0108] Figure 6 This is a plan view of the first conductor 150 and the second conductor 160 of the display panel 10 according to an embodiment. Figure 7 This is a cross-sectional view of the display panel 10 according to an embodiment, and corresponds to the view along... Figure 6 The cross-section of the display panel 10 is taken by line VII-VII'.

[0109] Reference Figure 6 The first conductor 150 can be disposed in the first non-display area NDA1, and the second conductor 160 can be disposed in the second non-display area NDA2. The third conductor 170 can be disposed in the second non-display area NDA2. The third conductor 170 can transmit the first power voltage ELVDD (see...) Figure 4 The third conductor 170 can be electrically connected to the drive voltage line PL of each pixel P (see...). Figure 4 ).

[0110] The first conductor 150 extends along the recessed edge 10C of the display panel 10 to partially surround the opening region OA in the first non-display area NDA1. The second conductor 160 may extend along... Figure 6 The first edge (left), second edge (right), and third edge (top) of the display area DA extend, and the portion of the second conductor 160 corresponding to the third edge can be separated from the opening area OA between the separating portions of the second conductor 160.

[0111] The first conductor 150 and the second conductor 160 may be positioned on different layers, and at least one insulating layer may be placed between the first conductor 150 and the second conductor 160. (See reference...) Figure 5 As described, the second conductor 160 can be arranged on the second interlayer insulation layer 207. (Refer to...) Figure 7 The first conductor 150 can be positioned on the gate insulating layer 203.

[0112] The first conductor 150 may comprise a material different from that of the second conductor 160. The thermal conductivity (in W / (m·K)) of the first conductor 150 may differ from that of the second conductor 160. For example, the thermal conductivity of the first conductor 150 may be less than that of the second conductor 160. The first conductor 150 may comprise a metal wire and includes components related to the reference conductor. Figure 5 The pixel circuit PC described uses the same material as the gate electrode GE and / or the first electrode CE1 of the storage capacitor Cst. The second conductor 160 may include materials similar to those described in the reference. Figure 5 The material of the data line DL and / or the drive voltage line PL is the same.

[0113] The end 150E of the first conductor 150 can be positioned in the sealing member 350, for example, between the outer surface 350Ab and the inner surface 350Aa of the first portion 350A of the sealing member 350. Figure 7 The side surface (third side surface) 100E2 of the first substrate 100 and the side surface (fourth side surface) 300E2 of the second substrate 300 shown can define reference. Figure 3 The recessed edge 10C of the described display panel 10. When viewed in a direction perpendicular to or orthogonal to the main surface of the first substrate 100, the third side surface 100E2 of the first substrate 100 and the fourth side surface 300E2 of the second substrate 300 can be continuously connected to the first side surface 100E1 of the first substrate 100 and the second side surface 300E1 of the second substrate 300, respectively.

[0114] The third side surface 100E2 of the first substrate 100 and the fourth side surface 300E2 of the second substrate 300, which are both corresponding to the recessed edge 10C of the display panel 10, may include, for example, Figure 7The inclined surface shown. An inclined surface can be formed through a polishing process. Conversely, Figure 5 The diagram shows a first side surface 100E1 of a first substrate 100 and a second side surface 300E1 of a second substrate 300, both corresponding to the straight edges of the display panel 10. Although in Figure 5 and Figure 7 The diagram shows that the side surfaces of the first substrate 100 and the second substrate 300 have different shapes depending on the edge of the display panel 10, but the embodiment is not limited to this. In another embodiment, the first side surface 100E1 of the first substrate 100 and the second side surface 300E1 of the second substrate 300, which are both corresponding to the straight edge of the display panel 10, may have the same shape as the third side surface 100E2 of the first substrate 100 and the fourth side surface 300E2 of the second substrate 300, which are both corresponding to the recessed edge 10C of the display panel 10.

[0115] Figure 8A This is a cross-sectional view of the display panel 10 according to an embodiment, and corresponds to the view along... Figure 6 The cross-section of the display panel 10 taken by line VIII-VIII'. Figure 8B and Figure 8C This is a cross-sectional view of the display panel 10 according to the embodiment, and also corresponds to the view along the […]. Figure 6 The cross-section of the display panel 10 is taken by line VIII-VIII'.

[0116] Reference Figure 8A The first conductor 150 can be stacked with the second conductor 160. The stacking width OW between the ends of the first conductor 150 and the ends of the second conductor 160 can be approximately 10 μm or greater. Although in Figure 8A The diagram shows that the first conductor 150 is not electrically connected to the second conductor 160, and at least one insulating layer (e.g., a first interlayer insulation layer 205 and a second interlayer insulation layer 207) is located between the first conductor 150 and the second conductor 160, but the embodiment is not limited thereto.

[0117] In another embodiment, the first conductor 150 can be electrically connected to the second conductor 160 through a contact hole in at least one insulating layer therebetween. For example, as Figure 8B and Figure 8C As shown, the second conductor 160 can be electrically connected to the first conductor 150 via contact holes 205h and 207h defined in the first interlayer insulation layer 205 and the second interlayer insulation layer 207. The contact holes 205h and 207h defined in the first interlayer insulation layer 205 and the second interlayer insulation layer 207, respectively, can be configured as one hole in the overlapping area of ​​the first conductor 150 and the second conductor 160 (e.g., having a width of OW). Figure 8B ) or multiple holes (see Figure 8C).

[0118] Figure 9A This is a cross-sectional view of the display panel 10 according to the embodiment and corresponds to the view along... Figure 6 The cross-section of the display panel 10 taken by line VIII-VIII'. Figure 9B and Figure 9C This is a cross-sectional view of the display panel 10 according to the embodiment, and also corresponds to the view along the […]. Figure 6 The cross-section of the display panel 10 is taken by line VIII-VIII'.

[0119] Reference Figures 9A to 9C The first conductor 150' and the second conductor 160 are positioned on different layers. The first conductor 150' may be disposed on the first interlayer insulation layer 205, and the second conductor 160 may be disposed on the second interlayer insulation layer 207. The first conductor 150' may include reference to... Figure 5 The second electrode CE2 of the described storage capacitor Cst is made of the same material.

[0120] A portion of the first conductor 150' and a portion of the second conductor 160 may overlap each other. As described above, the overlap width OW of the first conductor 150' and the second conductor 160 may be approximately 10 μm or greater. Figure 9A As shown, the first conductor 150' can be electrically insulated from the second conductor 160 through the second interlayer insulation layer 207. Optionally, as... Figure 9B and Figure 9C As shown, the first conductor 150' can be electrically connected to the second conductor 160 through a contact hole 207h in the second interlayer insulation layer 207. The contact hole 207h defined in the second interlayer insulation layer 207 can be configured as a hole in the overlapping area of ​​the first conductor 150' and the second conductor 160 (e.g., having a width of OW). Figure 9B ) or multiple holes (see Figure 9C ).

[0121] Figure 10 This is a cross-sectional view of the display panel 10 according to an embodiment.

[0122] Reference Figure 10 The insulating layer may not be disposed between the first conductor 150" and the second conductor 160. The second conductor 160 may be disposed on the second interlayer insulating layer 207, and the first conductor 150" may be directly positioned on the second conductor 160. The first conductor 150" may include, as referenced Figure 5 The pixel electrode 210 and / or the connecting electrode layer 260 are made of the same material.

[0123] A portion of the first conductor 150" may directly contact and overlap with a portion of the second conductor 160. As described above, the overlap width OW of the first conductor 150" and the second conductor 160 may be about 10 μm or greater. A portion of the first conductor 150" may overlap and directly contact a portion of the second conductor 160, thereby electrically connecting to the second conductor 160.

[0124] Figures 11 to 13 This is a plan view of a portion of the display panel 10 according to an embodiment.

[0125] With reference Figure 6 The first wire 150 described is different. Figure 11 The first conductor 1150 shown may include multiple sub-wires. For example, the first conductor 1150 may include a first sub-wire 1150L1 and a second sub-wire 1150L2. To protect the display panel 10 from external electrostatic discharge, the first sub-wire 1150L1 may be electrically connected to the second sub-wire 1150L2 via a bridging wire 1150B.

[0126] The first conductor 1150 may include a ratio Figure 11 The diagram shows two sub-lines with a greater number of sub-lines. For example, as... Figure 12 As shown, the first conductor 1150 may include a first sub-line 1150L1, a second sub-line 1150L2, and a third sub-line 1150L3. The first sub-line 1150L1, the second sub-line 1150L2, and the third sub-line 1150L3 may be electrically connected to each other via a bridging connector 1150B. In another embodiment, the first conductor 1150 may include four or more sub-lines.

[0127] Figure 11 and Figure 12 The structure can be applied to the reference Figures 8A to 10 An embodiment of the first conductor described below is referred to. Figure 13 The embodiments of the first conductor described and / or those derived therefrom.

[0128] exist Figures 6 to 12 The diagram shows a first conductor partially surrounding an opening region OA. Here, the opening region OA can have a shape where its width gradually increases outwards. For example, as shown... Figure 12 As shown, the width Wa at the first point, which is the inner side, can be smaller than the width Wb at the second point, which is the outer side. However, the embodiment is not limited to this. In another embodiment, refer to... Figure 13 The opening region OA can have a shape in which its width gradually increases and then decreases outwards, and then gradually increases outwards again. For example, as... Figure 13As shown, the width Wa' at the first point, which is the innermost point, can be greater than the width Wb' at the second point, which is the outermost point.

[0129] Figure 14 This is a plan view of the display panel 10' according to an embodiment.

[0130] Reference Figure 14 The display panel 10' includes a display area DA, an opening area OA, a first non-display area NDA1, and a second non-display area NDA2. (Refer to...) Figure 3 In the described display panel 10, the hole 10H passing through the display panel 10 is an edge hole located in the edge of the display panel 10, and the first non-display area NDA1 and the second non-display area NDA2 are connected to each other. Conversely, as Figure 14 As shown, the hole 10H' in the opening region OA of the display panel 10' is arranged inside the display region DA, so the first non-display region NDA1 and the second non-display region NDA2 can be separated from each other. The first non-display region NDA1 can be positioned between the opening region OA and the display region DA and can completely surround the opening region OA. The second non-display region NDA2 can completely surround the display region DA. For example, the first pixel P1 and the second pixel P2, which are arranged along the x-direction among the plurality of pixels P arranged in the display region DA, can be separated from each other (spaced apart), with the opening region OA or hole 10H' located between the first pixel P1 and the second pixel P2, and the third pixel P3 and the fourth pixel P4, which are arranged along the y-direction among the plurality of pixels P, can be separated from each other, with the opening region OA or hole 10H' located between the third pixel P3 and the fourth pixel P4. It can be understood that the hole 10H' is an island-shaped (type) surrounded by the plurality of pixels P (i.e., having an island shape), for example, an island hole.

[0131] The sealing member 350 may include a first portion 350A and a second portion 350B, wherein the first portion 350A is disposed in a first non-display area NDA1, and the second portion 350B is disposed in a second non-display area NDA2. The first portion 350A and the second portion 350B may be separate from each other. Since the second conductor 2160 is disposed below the second portion 350B of the sealing member 350 and has similar characteristics to the second conductor 160 described above, except that the second conductor 2160 extends continuously along the left, upper, and right sides of the display area DA, the differences are mainly described below.

[0132] The first conductor 2150 is arranged below the first portion 350A of the sealing member 350 and may include multiple sub-conductors. For example, refer to Figure 14The enlarged view shows that the first conductor 2150 may include a first sub-line 2150L1 and a second sub-line 2150L2, and the first sub-line 2150L1 and the second sub-line 2150L2 may be connected to each other via a bridging connector 2150B.

[0133] For reference Figure 5 and Figure 7 As described, the first conductor 2150 may be disposed on a layer different from the layer on which the second conductor 2160 is disposed. The first conductor 2150 may comprise a material different from the material of the second conductor 2160. For example, the first conductor 2150 may comprise a material having a thermal conductivity lower than that of the material of the second conductor 2160.

[0134] The first wire 2150 and the second wire 2160 are spatially separated from each other. In one embodiment, the first wire 2150 may not be electrically connected to the second wire 2160. In another embodiment, the first wire 2150 may be electrically connected to the second wire 2160. For example, similar to that shown in reference... Figure 5 In the case described, where the second conductor 160 is electrically connected to the counter electrode 230 in the second non-display area NDA2, the first conductor 2150 can be electrically connected to the counter electrode 230 in the first non-display area NDA1. Therefore, the first conductor 2150 can have the same voltage level as the second conductor 2160.

[0135] According to the embodiments, the mechanical strength of the display panel can be sufficiently ensured, and at the same time, damage to the display elements due to heat generated during or after the manufacturing process of the display panel can be prevented or suppressed.

[0136] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the claims and their equivalents.

Claims

1. A display panel, the display panel comprising: The first substrate includes an opening area, a display area, and a non-display area; Multiple display elements are arranged in the display area; A second substrate is positioned facing the first substrate, and the plurality of display elements are located between the first substrate and the second substrate; A sealing member is placed between the first substrate and the second substrate and positioned in the non-display area; A first conductor is located between the opening area and the display area, and the first conductor is positioned in the non-display area; The second conductor is positioned in the non-display area; as well as At least one insulating layer is disposed between the first conductor and the second conductor. The first wire and the second wire are made of different metals, and the thermal conductivity of the first wire is less than that of the second wire.

2. The display panel according to claim 1, wherein, The first wire is positioned between the first substrate and a first portion of the sealing member, and the second wire is positioned between the first substrate and a second portion of the sealing member.

3. The display panel according to claim 2, wherein, The ends of the first wire and the second wire overlap each other.

4. The display panel according to claim 3, wherein, The ends of the first conductor and the second conductor are connected to each other through contact holes defined in the at least one insulating layer.

5. The display panel according to claim 2, wherein, The first wire and the second wire are spaced apart from each other.

6. The display panel according to claim 5, wherein, The first portion of the sealing member completely surrounds the opening area, and the second portion of the sealing member is spaced apart from the first portion and completely surrounds the display area.

7. The display panel according to claim 1, wherein, Each of the plurality of display elements includes a pixel electrode, an intermediate layer, and a counter electrode stacked sequentially, and The second wire is electrically connected to the counter electrode.

8. The display panel according to claim 1, wherein, The first conductor includes multiple sub-wires.

9. The display panel according to claim 8, wherein, The first conductor also includes a bridging connector that connects the multiple sub-wires.

10. A display panel, the display panel comprising: A first substrate and a second substrate face each other, with a plurality of display elements located between the first substrate and the second substrate; A sealing member is located between the first substrate and the second substrate; At least one insulating layer is disposed between the first substrate and the sealing member; The first wire is located below the first portion of the sealing member; as well as The second conductor is located below the second portion of the sealing member. The first wire and the second wire are made of different materials, and the thermal conductivity of the first wire is less than that of the second wire.

11. The display panel according to claim 10, further comprising: Thin-film transistors and storage capacitors, wherein the thin-film transistors and the storage capacitors are electrically connected to corresponding display elements among the plurality of display elements. The first conductor is made of the same material as the pixel electrodes of the plurality of display elements, the gate electrodes of the thin-film transistors, and / or the electrodes of the storage capacitors.

12. The display panel according to claim 10, wherein, One of the first wire and the second wire is positioned below the at least one insulating layer, and the other of the first wire and the second wire is positioned above the at least one insulating layer.

13. The display panel according to claim 12, wherein, The ends of the first wire and the second wire overlap each other.

14. The display panel according to claim 13, wherein, The ends of the first conductor and the second conductor are connected to each other through contact holes defined in the at least one insulating layer.

15. The display panel according to claim 10, wherein, The second conductor includes a power line that supplies voltage to the plurality of display elements.

16. The display panel according to claim 10, wherein, The first conductor includes multiple sub-wires and a bridging wire connecting the multiple sub-wires.

17. The display panel according to claim 10, wherein, Both the first substrate and the second substrate include a display area and an opening area, and The first conductor is positioned between the display area and the opening area.

18. The display panel according to claim 17, wherein, The first conductor and the second conductor are partially overlapped.

19. The display panel according to claim 17, wherein, The first wire and the second wire are separate from each other.

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