Display device

Abstract

The present disclosure relates to a display device including a substrate including a display area and a peripheral area outside the display area; a plurality of display elements arranged in the display area; and a pad provided in the peripheral area and having a multi-layer structure, wherein the multi-layer structure of the pad includes a metal layer; a conductive protective layer on a top surface of the metal layer; and a metal thin film on a top surface of the conductive protective layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0070068, filed on June 13, 2019, and all benefits derived therefrom, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments relate to a display device. Background Technology

[0004] A display device is a device that receives information related to an image and displays the image. In a display device, pads can be arranged at the edges of the display device to receive information for images, etc., and the pads can be electrically connected to display elements. The pads can be electrically connected to pads on a printed circuit board or bumps on an integrated circuit. Summary of the Invention

[0005] During the manufacturing process of a display device, a portion of each pad of the display device may be exposed to electrically connect to pads on a printed circuit board or bumps on an integrated circuit. Exposed pads may be corroded, and the resistance of corroded pads may decrease.

[0006] One or more embodiments relate to a display device including pads manufactured with a reduced number of processes without compromising its electrical characteristics. However, it should be understood that the embodiments described herein are to be considered in a descriptive sense only and not as limiting of this disclosure.

[0007] According to an embodiment, a display device includes: a substrate including a display area and a peripheral area outside the display area; a plurality of display elements disposed in the display area; pads in the peripheral area and having a multilayer structure, wherein the multilayer structure of the pads includes: a metal layer; a conductive protective layer disposed on the top surface of the metal layer; and a metal thin film on the top surface of the conductive protective layer.

[0008] In some embodiments, the conductive protective layer may include a transparent conductive oxide.

[0009] In an embodiment, the side surfaces of the multilayer structure may have a positive conical inclined surface.

[0010] In the embodiments, each of the metal layer and the metal thin film may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo and Cu.

[0011] In this embodiment, the thickness of the metal layer can be greater than the thickness of the conductive protective layer, and the thickness of the metal layer can be greater than the thickness of the metal film.

[0012] In this embodiment, the thickness of the metal film can be approximately 300 angstroms. Or smaller.

[0013] In an embodiment, the metal thin film may include: a metal sublayer comprising a metal element; and a metal oxide sublayer, which is an oxide of the metal element on the metal sublayer and comprises the metal element of the metal sublayer.

[0014] In an embodiment, the display device may further include an insulating layer covering the edge of a multilayer structure of pads, wherein a hole may be defined through the insulating layer to overlap with the multilayer structure of the pads.

[0015] In an embodiment, the insulating layer may further include an inorganic insulating layer and an organic insulating layer; and the aperture of the insulating layer may include: a first aperture defined to penetrate the inorganic insulating layer to overlap with the multilayer structure of the pad; and a second aperture defined to penetrate the organic insulating layer to overlap with the multilayer structure of the pad and the first aperture.

[0016] In one embodiment, a third hole may be defined that passes through a metal film in a multilayer structure to overlap with a hole in an insulating layer.

[0017] In an embodiment, the metal thin film may include: a metal sublayer comprising a metal element; and a metal oxide sublayer, on the top surface of the metal sublayer and comprising an oxide of the metal element of the metal sublayer.

[0018] In an embodiment, the multilayer structure of the pads may further include a bottom metal layer on the bottom surface of the metal layer.

[0019] According to an embodiment, a display device includes: a substrate including a display area and a peripheral area outside the display area; a display element disposed in the display area; a pixel circuit including a thin-film transistor and a storage capacitor, wherein the thin-film transistor and the storage capacitor are electrically connected to the display element; and a pad located in the peripheral area and having a positively tapered side surface, wherein the pad has a multilayer structure, and the multilayer structure of the pad includes: a conductive layer including a transparent conductive oxide; and a metal thin film on the top surface of the conductive layer.

[0020] In the embodiments, the metal thin film may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo and Cu.

[0021] In an embodiment, the metal thin film may include: a metal sublayer comprising a metal element; and a metal oxide sublayer on the top surface of the metal sublayer and comprising an oxide of the metal element of the metal sublayer.

[0022] In an embodiment, the display device may further include an insulating layer covering the edge of the pads, and may define a hole through the insulating layer to overlap with the multilayer structure of the pads.

[0023] In an embodiment, a hole may be defined through a metal thin film that passes through a multilayer structure to correspond to a hole in the insulating layer.

[0024] In an embodiment, at least one of the electrodes of the thin-film transistor and the storage capacitor may include the same number of sublayers as the multilayer structure of the pads.

[0025] In an embodiment, the multilayer structure of the pad may include a metal layer on the bottom surface of the conductive layer and having a thickness equal to or greater than about 1 / 2 the thickness of the pad.

[0026] In an embodiment, the display device may further include a bottom conductive layer on the bottom surface of the conductive layer, wherein the metal layer may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo and Cu, and the bottom conductive layer may include a metal element different from the metal element of the metal layer. Attached Figure Description

[0027] The above and other features of embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 This is a plan view of the display device according to an embodiment;

[0029] Figure 2 This is an equivalent circuit diagram of one pixel in a display device according to an embodiment;

[0030] Figure 3 This is a cross-sectional view of one of the pads in the display device according to an embodiment;

[0031] Figure 4A This is a cross-sectional view of one of the pads in the display device according to an alternative embodiment;

[0032] Figure 4B yes Figure 4A An enlarged view of the circled part "IV";

[0033] Figure 5 This is a cross-sectional view of one of the pads in a display device according to another alternative embodiment;

[0034] Figure 6A This is a cross-sectional view of one of the pads in a display device according to another alternative embodiment;

[0035] Figure 6B yes Figure 6A An enlarged view of the circled part "VI";

[0036] Figures 7A to 7G This is a cross-sectional view of the manufacturing process of the display device according to an embodiment;

[0037] Figures 8A to 8C This is a cross-sectional view of the etching process for stacked metal layers;

[0038] Figure 9A and Figure 9B This is a cross-sectional view showing the third hole formed in the metal film of the pad;

[0039] Figure 10 and Figure 11 This is a view of a scanning electron microscope (“SEM”) image of the pads according to an embodiment;

[0040] Figure 12 This is a view of the SEM image of the pads in the comparison example;

[0041] Figure 13 and Figure 14 This is a cross-sectional view of the display device according to an embodiment;

[0042] Figure 15 and Figure 16 This is a cross-sectional view of the display device according to an embodiment; and

[0043] Figures 17 to 19 This is a view of an electronic device that uses a display device according to an embodiment. Detailed Implementation

[0044] This disclosure will now be described more fully below with reference to the accompanying drawings, in which various embodiments are illustrated. However, this disclosure can be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of this disclosure to those skilled in the art. Throughout the specification, the same reference numerals refer to the same elements.

[0045] In the following description, the present disclosure will be given more fully with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are illustrated. When describing with reference to the drawings, the same reference numerals in the drawings denote the same or corresponding elements, and repeated descriptions thereof will be omitted.

[0046] It will be understood that although the terms “first,” “second,” etc., may be used in this document to describe various components, these components should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings herein, the “first element,” “first component,” “first region,” “first layer,” or “first part” discussed below may be referred to as a second element, second component, second region, second layer, or second part.

[0047] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one,” unless the context clearly indicates otherwise. “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. As used herein, the phrase “at least one” modifying a listed item includes any and all combinations of one or more listed items. For example, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all a, b, and c, or variations thereof.

[0048] As will be further understood, the terms “comprises” and / or “comprising” or “includes” and / or “including” as used in this specification indicate the presence of the stated features, areas, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, areas, integers, steps, operations, elements, components and / or groups thereof.

[0049] It will be further understood that the terms “comprises” and / or “comprising” as used herein indicate the presence of the stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0050] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on that other layer or substrate, or there may be intermediate layers. Conversely, when an element is referred to as being "directly on" another element, there are no intermediate elements.

[0051] Given the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), the terms “about” or “approximately” as used herein include stated values ​​and indicate an acceptable deviation from a particular value as determined by one of ordinary skill in the art.

[0052] For ease of illustration, the sizes of the elements in the accompanying drawings may be enlarged. In other words, because the size and thickness of the components are arbitrarily shown in the drawings for ease of illustration, the following embodiments are not limited thereto.

[0053] Exemplary embodiments are described herein with reference to cross-sectional illustrations as idealized embodiments. Therefore, variations in the illustrated shapes are contemplated due to, for example, manufacturing techniques and / or margins. Consequently, the embodiments described herein should not be construed as limited to regions of the specific shapes shown herein, but rather include shape deviations caused, for example, by manufacturing processes. For example, regions illustrated or depicted as flat may typically have rough and / or non-linear characteristics. Furthermore, acute angles shown may be rounded. Therefore, the regions shown in the figures are schematic in nature and these shapes are not intended to illustrate precise shapes of the regions, nor are they intended to limit the scope of the claims.

[0054] When an embodiment can be implemented differently, a particular process sequence can be performed differently from the stated sequence. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of the stated sequence.

[0055] It will be understood that when a layer, region, or component is referred to as being "connected to" another layer, region, or component, it can be "directly connected" to another layer, region, or component, or it can be "indirectly connected" to another layer, region, or component, with other layers, regions, or components inserted between them. For example, it will be understood that when a layer, region, or component is referred to as being "connected to or electrically connected" to another layer, region, or component, it can be "directly electrically connected" to another layer, region, or component, or it can be "indirectly or electrically connected" to another layer, region, or component, with other layers, regions, or components inserted between them.

[0056] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that terms such as those defined in common dictionaries shall be interpreted as having the same meaning as their meaning in the context of the relevant field and in this disclosure, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0057] In this paper, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0058] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0059] Figure 1 This is a plan view of the display device according to an embodiment, and Figure 2 This is an equivalent circuit diagram of one pixel in a display device according to an embodiment.

[0060] refer to Figure 1 An embodiment of the display device includes a substrate 100, which includes a display area DA and a peripheral area PA. In such an embodiment, display elements are arranged in the display area DA, and the peripheral area PA is a non-display area disposed outside the display area DA. The substrate 100 may comprise a glass material or a polymer resin. The substrate 100 comprising a polymer resin may be flexible. In one embodiment, for example, a display device comprising a flexible substrate 100 may be curved, bendable, rollable, or foldable, and thus the shape of the display device can be changed.

[0061] Each pixel P may include a display element capable of emitting light of a predetermined color, such as... Figure 2 The image shows an organic light-emitting diode (OLED). An OLED can emit, for example, red, green, or blue light, or it can emit red, green, blue, or white light. Each OLED can be electrically connected to a pixel circuitry (PC).

[0062] In an embodiment, such as Figure 2 As shown, the pixel circuit PC may include a first thin-film transistor T1, a second thin-film transistor T2, and a storage capacitor Cst. The second thin-film transistor T2 may be a switching thin-film transistor and is connected to the scan line SL and the data line DL. The second thin-film transistor T2, in response to a switching voltage input through the scan line SL, transmits a data voltage input through the data line DL to the first thin-film transistor T1. The storage capacitor Cst may be connected to the second thin-film transistor T2 and the drive voltage line PL and may store a voltage corresponding to the difference between the voltage transmitted from the second thin-film transistor T2 and the first power supply voltage ELVDD provided through the drive voltage line PL.

[0063] The first thin-film transistor T1 can be a driving thin-film transistor connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage stored in the storage capacitor Cst. The OLED can emit light with a predetermined brightness corresponding to the driving current. The opposite electrode (e.g., the cathode) of the OLED can receive a second power supply voltage ELVSS.

[0064] In an embodiment, such as Figure 2 As shown, the pixel circuit PC includes two thin-film transistors T1 and T2 and a storage capacitor Cst, but is not limited thereto. In alternative embodiments, the number of thin-film transistors and the number of storage capacitors can be varied depending on the design of the pixel circuit PC.

[0065] Return to reference Figure 1 Multiple pads 400 are arranged in the peripheral region PA of the substrate 100. Although for ease of illustration and description... Figure 1 An embodiment including three pads 400 is shown, but a greater number of pads 400 may be adjacent to and spaced apart from each other. Each pad 400 is an element electrically connected to a printed circuit board or integrated circuit device and may include conductive material.

[0066] Figure 3 This is a cross-sectional view of one of the pads in the display device according to an embodiment. More specifically, Figure 3 Corresponding to along Figure 1 The cross-sectional view of the pad intercepted by line A-A'.

[0067] refer to Figure 3 In this embodiment, the insulating layer IL may be disposed on the substrate 100, and the pads 400 may be located on the insulating layer IL. The insulating layer IL may include at least one of an inorganic insulating layer and an organic insulating layer.

[0068] The pad 400 may have a multilayer structure. The pad 400 may include sequentially stacked metal layers, a conductive protective layer, and a metal film. Alternatively, the pad 400 may include sequentially stacked conductive protective layers (conductive layers) and a metal film. Alternatively, the pad 400 may include sequentially stacked bottom metal layers (bottom conductive layers), conductive protective layers (conductive layers), and a metal film. In embodiments, such as Figure 3 As shown, the pad 400 includes a structure in which a bottom metal layer 404, a metal layer 403, a conductive protective layer 402, and a metal thin film (metal layer) 401 are stacked in sequence.

[0069] Metal layer 403 may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu, thereby having a predetermined conductivity. In one embodiment, for example, metal layer 403 may include Cu. In another embodiment, metal layer 403 may include a single Cu layer or be defined by a single Cu layer.

[0070] In one embodiment, metal layer 403 is a layer that occupies approximately half or more of the volume of pad 400. In such an embodiment, as... Figure 3 As shown, the thickness of metal layer 403 is approximately half or greater than the thickness of pad 400. In one embodiment, for example, the thickness of metal layer 403 may be approximately 8 to approximately 10 times the sum (or total thickness) of the thicknesses of other sublayers contained within pad 400, such as the sum of the thicknesses of metal film 401, conductive protective layer 402, and bottom metal layer 404. The thickness of metal layer 403 may be several thousand angstroms. Or larger. In this embodiment, the thickness of the metal layer 403 can be approximately... to approximately Within the range.

[0071] The bottom metal layer 404 may be disposed below or on the bottom surface of the metal layer 403. The bottom metal layer 404 may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu, thereby possessing predetermined conductivity and adhesion. In one embodiment, for example, the bottom metal layer 404 may include a metal element different from that of the metal layer 403. In another embodiment, the bottom metal layer 404 may include or be defined by a Ti layer.

[0072] The thickness of the bottom metal layer 404 is less than the thickness of the metal layer 403. The thickness of the bottom metal layer 404 can be approximately several hundred. This results in improved adhesion. In one embodiment, for example, the thickness of the bottom metal layer 404 can be approximately... to approximately Within the range, or within approximately to approximately Within the range.

[0073] The conductive protective layer 402 may include a conductive material that can protect the metal layer 403, such as a transparent conductive oxide (“TCO”). The TCO may include indium tin oxide (“ITO”), indium zinc oxide (“IZO”), zinc oxide (ZnO), indium oxide (In₂O₃), indium gallium oxide (“IGO”), and zinc aluminum oxide (“AZO” or Al-doped ZnO). In embodiments, the conductive protective layer 402 may include a single ITO layer or be defined by a single ITO layer.

[0074] The thickness of the conductive protective layer 402 is less than the thickness of the metal layer 403. The thickness of the conductive protective layer 402 can be approximately several hundred millimeters. In one embodiment, for example, the thickness of the conductive protective layer 402 can be approximately to approximately Within the range, or within approximately to approximately Within the range. The thickness of the conductive protective layer 402 can be substantially the same as the thickness of the bottom metal layer 404. Alternatively, the thickness of the conductive protective layer 402 can be different from the thickness of the bottom metal layer 404. In one embodiment, for example, the difference between the thickness of the conductive protective layer 402 and the thickness of the bottom metal layer 404 can be approximately Or smaller.

[0075] A metal thin film 401 may be disposed on the conductive protective layer 402 and may comprise a metallic material. In one embodiment, for example, the metal thin film 401 may comprise at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. The metal thin film 401 may increase the etching rate of the conductive protective layer 402 containing TCO. The metal thin film 401 may contribute to the shape of the side surfaces of the conductive protective layer 402 and / or the side surfaces of the pads 400. The function or other characteristics of the metal thin film 401 during the etching process will be described in more detail later.

[0076] The metal thin film 401 may comprise the same material as the metal layer 403. In one embodiment, for example, the metal thin film 401 and the metal layer 403 may comprise the same material as each other, such as Cu. Alternatively, the metal thin film 401 may comprise a different material than the metal layer 403. In one embodiment, for example, the metal layer 403 may comprise Cu, and the metal thin film 401 may comprise Mo or Ti.

[0077] The metal thin film 401 has a thickness less than that of the metal layer 403. In one embodiment, for example, the metal thin film 401 may have a thickness of about 1 / 10 of the thickness of the metal layer 403. The thickness of the metal thin film 401 can be about several... Up to several hundred Within a range or in about tens of to about several hundred Within the range. In the embodiment, the metal thin film 401 may have Or even a smaller thickness. In this embodiment, the metal film 401 can be approximately [thickness missing]. to approximately Within the scope, in approximately to approximately Within the scope, or within the approximate to approximately Within the range.

[0078] The side surfaces of the pads 400 with a multi-layer structure can have, for example... Figure 3 The diagram shows a forward-tapered inclined surface. An insulating layer is disposed on pad 400. In an embodiment, as shown... Figure 3 As shown, the inorganic insulating layer PVX and the organic insulating layer OL are arranged on pad 400.

[0079] The inorganic insulating layer PVX may comprise inorganic insulating materials such as silicon oxide, silicon oxynitride, and / or silicon nitride. The inorganic insulating layer PVX may cover the edge of the pad 400, and a first hole PVX-H exposing a portion of the top surface of the pad 400 is defined or formed through the inorganic insulating layer PVX.

[0080] Organic insulating layer OL may include organic insulating materials. Organic insulating materials may include, for example, general polymers such as polymethyl methacrylate (“PMMA”) or polystyrene (“PS”), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylyl polymers, vinyl alcohol polymers, or combinations thereof (e.g., mixtures).

[0081] An organic insulating layer OL may cover the edge of pad 400, and a second via OL-H, exposing a portion of the top surface of pad 400, is defined or formed through the organic insulating layer OL. In an embodiment, the size of the second via OL-H (e.g., its width in a plan view) may be smaller than the size of the first via PVX-H (e.g., its width in a plan view). In an embodiment, as... Figure 3 The width W2 of the second hole OL-H shown is smaller than the width W1 of the first hole PVX-H. In an alternative embodiment, the size of the second hole OL-H can be substantially the same as the size of the first hole PVX-H. In another alternative embodiment, the size of the second hole OL-H can be larger than the size of the first hole PVX-H.

[0082] In such Figure 3In the embodiments shown, the metal thin film 401 may have a single-layer structure, but the embodiments of this disclosure are not limited thereto. In alternative embodiments, the metal thin film 401 may have, for example, a single-layer structure. Figure 4A and Figure 4B The multi-layered structure shown.

[0083] Figure 4A This is a cross-sectional view of one of the pads in the display device according to an alternative embodiment, and Figure 4B yes Figure 4A An enlarged view of the circled part "IV". This is understandable. Figure 4A It is along Figure 1 The cross-sectional view of the pad intercepted by line A-A'.

[0084] refer to Figure 4A and Figure 4B The metal film 401 of the pad 400 includes a first sublayer (metal oxide sublayer) 401a that defines the uppermost surface of the metal film 401. The first sublayer 401a may include a metal oxide layer that includes the same metal element as the second sublayer 401b.

[0085] In such an embodiment, as referenced above... Figure 3 As described, the pad 400 has a multilayer structure. In one embodiment, for example, the pad 400 may include a conductive protective layer 402 disposed on a metal layer 403 and a metal film 401. The pad 400 may further include a bottom metal layer 404 disposed beneath the metal layer 403.

[0086] During the manufacturing process of a display device, a thin metal film 401 disposed on top of a pad 400 having a multilayer structure may be exposed to an oxygen-containing atmosphere. In such an embodiment, the thin metal film 401 may include a first sublayer 401a comprising a metal oxide. The first sublayer 401a may be a metal oxide layer comprising the same metal element as the metal element disposed below it in a second sublayer (metal sublayer) 401b. In an embodiment, the second sublayer 401b may include a metal layer comprising Cu (e.g., a Cu layer), and the first sublayer 401a may include a copper oxide layer. In an alternative embodiment, the second sublayer 401b may include a metal layer comprising molybdenum or titanium (e.g., a Mo layer, or, for example, a Ti layer), and the first sublayer 401a may include molybdenum oxide or titanium oxide.

[0087] Because the metal film 401 includes a first sublayer 401a containing metal oxide, but the metal oxide corresponds to a portion of the metal film 401 with a very thin thickness as described above, the effect of the metal oxide on the conductivity of the pad 400 is negligible.

[0088] Because the characteristics of the multi-layer conductive protective layer 402, metal layer 403, and bottom metal layer 404 of the pad 400 are similar to those in the above references. Figure 3 The described features are essentially the same, so any repeated detailed descriptions will be omitted.

[0089] Figure 5 This is a cross-sectional view of one of the pads in a display device according to another alternative embodiment. More specifically, Figure 5 Corresponding to along Figure 1 The cross-sectional view of the pad intercepted by line A-A'.

[0090] refer to Figure 5 In this embodiment, the pad 400 has a multilayer structure, and a third hole 401H is defined as a metal film 401 passing through the pad 400. The top surface of the conductive protective layer 402 can be exposed through the third hole 401H of the metal film 401.

[0091] In an embodiment, such as Figure 4A and Figure 4B As shown, pad 400 includes portions not covered by the inorganic insulating layer PVX and the organic insulating layer OL. These portions can be removed during the manufacturing process of the display device by exposure to a material such as an etchant. The third hole 401H of the metal film 401 can be formed by such a process.

[0092] The third hole 401H can be located in the central portion of the metal thin film 401. The size of the third hole 401H can be substantially the same as the size of the second hole OL-H. In an embodiment, as shown... Figure 5 As shown, the width of the third hole 401H is substantially the same as the width of the second hole OL-H.

[0093] Because the characteristics of the multi-layer conductive protective layer 402, metal layer 403, and bottom metal layer 404 of the pad 400 are similar to those in the above references. Figure 3 The described features are essentially the same, so any repeated detailed descriptions will be omitted.

[0094] Figure 6A This is a cross-sectional view of one of the pads in a display device according to another alternative embodiment, and Figure 6B yes Figure 6A An enlarged image of the circled "VI". More notably, Figure 6A Corresponding to along Figure 1 The cross-sectional view of the pad intercepted by line A-A'.

[0095] refer to Figure 6A and Figure 6BIn this embodiment, the pad 400 may have a multilayer structure, and the metal film 401 may include the components described above. Figure 4A and Figure 4B The first sublayer 401a and the second sublayer 401b are described. The first sublayer 401a may include the same metal element as the metal element of the second sublayer 401b. The first sublayer 401a may include a metal oxide layer, and the second sublayer 401b may include a metal layer.

[0096] In such an embodiment, the third aperture 401H may be defined to pass through the metal film 401, which includes sublayers (e.g., a first sublayer 401a and a second sublayer 401b). The third aperture 401H may be located in the central portion of the metal film 401 and may be defined to pass through the first sublayer 401a and the second sublayer 401b. In one embodiment, for example, the third aperture 401H may pass from the top surface of the first sublayer 401a to the bottom surface of the first sublayer 401a, and further from the top surface of the second sublayer 401b to the bottom surface of the second sublayer 401b. Alternatively, depending on the process (type of etchant, etchant exposure time, etc.), the third aperture 401H may pass from the top surface of the first sublayer 401a to the bottom surface of the first sublayer 401a, but the third aperture 401H may not pass through the second sublayer 401b.

[0097] The third hole 401H can be referenced as above. Figure 5 The third hole 401H is formed during the manufacturing process of the described display device. The size (or width) of the third hole 401H can be substantially the same as the size (or width) of the second hole OL-H in the organic insulating layer OL.

[0098] The above is for reference only. Figures 1 to 6B The described embodiment of pad 400 can be formed and arranged in the display area DA (see Figure 1 Pixel P in ) is formed simultaneously during the process of forming pixel circuit PC (see Figure 2 In the process of forming thin-film transistors T1 / T2 (in Figures 13 to 16 Also known as TFT) and / or storage capacitor Cst (see Figure 2 , Figures 13 to 16 It is formed during the process of )

[0099] Figures 7A to 7F This is a cross-sectional view of the manufacturing process of the display device according to an embodiment. Figure 7G It is one of them Figure 7F The cross-sectional view of the display device after the electronic structure 920 is electrically connected to the pad 400, and Figures 8A to 8C This is a cross-sectional view of the etching process of the stacked metal layer 1400.

[0100] refer to Figure 7A A conductive layer 210 is provided or formed in the display area DA of the substrate 100. The conductive layer 210 can be provided below the thin-film transistors of the pixel circuit to overlap with them. The conductive layer 210 may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. The substrate 100 may include a glass material or a polymer resin. The conductive layer 210 may receive the same voltage as a first power supply voltage, an initialization voltage, or a voltage applied to the thin-film transistor (e.g., its gate electrode 222, source electrode, or drain electrode, which will be described later).

[0101] A buffer layer 110 is provided or formed on the conductive layer 210. The buffer layer 110 is formed in, for example, the display area DA and the peripheral area PA to completely cover the substrate 100. The buffer layer 110 may include an inorganic insulating material such as silicon oxide, silicon nitride and / or silicon oxynitride and may have a single-layer structure or a multi-layer structure.

[0102] A semiconductor layer 221 is provided or formed on the buffer layer 110. The semiconductor layer 221 may include polycrystalline silicon. Alternatively, the semiconductor layer 221 may include an oxide semiconductor. Alternatively, the semiconductor layer 221 may include amorphous silicon or an organic semiconductor. In embodiments, the oxide semiconductor may include indium gallium zinc oxide (“IGZO”), zinc tin oxide (“ZTO”), and / or zinc indium oxide (“ZIO”).

[0103] A gate electrode 222 is provided or formed on the semiconductor layer 221. The gate electrode 222 may include a low-resistance metal material. The gate electrode 222 may include a conductive material comprising Mo, Al, Cu, and Ti, and may have a single-layer structure or a multi-layer structure comprising the above materials.

[0104] During the same mask process as that used to form the gate electrode 222, a gate insulating layer 223 disposed between the semiconductor layer 221 and the gate electrode 222 may be provided or formed simultaneously with the gate electrode 222. The gate insulating layer 223 and the gate electrode 222 formed during the same mask process may have substantially the same pattern, such as the same planar shape.

[0105] The lower electrode 310 of the storage capacitor may be provided or formed simultaneously during the process of forming the gate electrode 222. The lower electrode 310 may include the same material as the gate electrode 222. A bottom insulating layer 312 may be provided or formed below the lower electrode 310. The bottom insulating layer 312 may include the same material as the gate insulating layer 223 and may include the same pattern as the lower electrode 310.

[0106] In an embodiment, such as Figure 7A As shown, the gate electrode 222 and the gate insulating layer 223 can be formed simultaneously during the same mask process, and the lower electrode 310 and the bottom insulating layer 312 can be formed simultaneously during the same mask process, but the embodiments are not limited thereto. In an alternative embodiment, the gate insulating layer 223 and the bottom insulating layer 312 can be formed as a single integral. In one embodiment, for example, the gate insulating layer 223 can be formed to completely cover the substrate 100.

[0107] The gate insulating layer 223 may include inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride. The gate insulating layer 223 may have a single-layer structure or a multi-layer structure comprising the above-mentioned materials.

[0108] An interlayer insulating layer 130 is provided or formed on the gate insulating layer 223 and the lower electrode 310. The interlayer insulating layer 130 may comprise an inorganic insulating material such as silicon oxide, silicon nitride, and silicon oxynitride. Alternatively, the interlayer insulating layer 130 may comprise an organic insulating material, such as: general-purpose polymers, polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylyl polymers, vinyl alcohol polymers, or combinations thereof (e.g., mixtures). Alternatively, the interlayer insulating layer 130 may comprise both inorganic and organic insulating materials.

[0109] After forming the interlayer insulating layer 130, contact holes can be formed by etching some portions of the interlayer insulating layer 130. In one embodiment, for example, as Figure 7A As shown, the first contact hole Cnt1, the second contact hole Cnt2, and the third contact hole Cnt3 can be formed as follows: the first contact hole Cnt1 and the second contact hole Cnt2 expose the source region and the drain region of the semiconductor layer 221, respectively, and the third contact hole Cnt3 exposes the conductive layer 210. The first contact hole Cnt1 and the second contact hole Cnt2 can be formed to pass through the interlayer insulating layer 130. The third contact hole Cnt3 can be formed to pass through the interlayer insulating layer 130 and the buffer layer 110. The buffer layer 110 and the interlayer insulating layer 130 can correspond to the above reference. Figures 3 to 6B The described insulating layer IL.

[0110] refer to Figure 7B A stacked metal layer 1400 is provided or formed on the interlayer insulating layer 130. The stacked metal layer 1400 can be formed by, for example, sputtering. The stacked metal layer 1400 may include a metal thin film 1401, a conductive protective layer 1402, a metal layer 1403, and a bottom metal layer 1404, which are sequentially stacked in a downward direction from top to bottom.

[0111] The metal thin film 1401 may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. The metal thin film 1401 may have a thickness smaller than the thickness of at least one of the conductive protective layer 1402, the metal layer 1403, and the bottom metal layer 1404. In one embodiment, for example, the metal thin film 1401 may have a thickness smaller than the thickness of each of the conductive protective layer 1402, the metal layer 1403, and the bottom metal layer 1404. The thickness of the metal thin film 1401 may be approximately several... to about several hundred Within a range, or in about several tens to about several hundred Within the range. In the embodiment, the metal thin film 1401 may have Or even a smaller thickness. In an embodiment, the metal film 1401 can be approximately... to approximately Within the scope, in approximately to approximately Within the scope, or within the approximate to approximately Within the range.

[0112] The conductive protective layer 1402 may include a TCO (Total Coefficient of Conductivity). The conductive protective layer 1402 can effectively prevent damage to the metal layer 1403 disposed beneath it. The thickness of the conductive protective layer 1402 can be approximately... to approximately Within the range, or within approximately to approximately Within the range.

[0113] Metal layer 1403 may include at least one selected from Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. Metal layer 1403 may include a material with excellent electrical conductivity, such as a conductive material comprising Cu, Mo, Al, and / or Ti. Metal layer 1403 may have a thickness greater than that of other layers. The thickness of metal layer 1403 may be several thousand [units unspecified]. Or larger. In an embodiment, the thickness of the metal layer 1403 can be approximately... to approximately Within the range.

[0114] The bottom metal layer 1404 may include at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. In one embodiment, for example, the bottom metal layer 1404 may include Ti to have high conductivity and adhesion.

[0115] Subsequently, a patterned photoresist PR is provided or formed on the stacked metal layer 1400. The photoresist PR may include portions disposed in the display area DA and the peripheral area PA, respectively. The respective portions of the photoresist PR can be formed by exposure and development.

[0116] The stacked metal layer 1400 is patterned by using a photoresist PR as a mask. The patterning of the stacked metal layer 1400 can be performed by an etching process (e.g., a wet etching process). Sublayers of the stacked metal layer 1400, such as the conductive protective layer 1402, metal layer 1403, and bottom metal layer 1404, can be etched using the same etchant.

[0117] By etching the stacked metal layers 1400, such as Figure 7C As shown, a pad 400, an upper electrode 420 of the storage capacitor, a drain electrode 430, and a source electrode 440 can be formed on the substrate 100. A multilayer structure of each of the pad 400, the upper electrode 420 of the storage capacitor, the drain electrode 430, and the source electrode 440 is formed while the sublayers of the stacked metal layer 1400 (e.g., metal thin film 1401, conductive protective layer 1402, metal layer 1403, and bottom metal layer 1404) are simultaneously etched. Therefore, the multilayer structure of each of the pad 400, the upper electrode 420 of the storage capacitor, the drain electrode 430, and the source electrode 440 includes the same number of sublayers. Adjacent sublayers can be in direct contact with each other without the need for a separate layer with insulating properties between them. The sublayers of pad 400 (metal thin film 401, conductive protective layer 402, metal layer 403 and bottom metal layer 404), the sublayers 421, 422, 423 and 424 of the upper electrode 420 of the storage capacitor, the sublayers 431, 432, 433 and 434 of the drain electrode 430, and the sublayer of the source electrode 440 may each comprise the same material as the metal thin film 1401, the conductive protective layer 1402, the metal layer 1403 and the bottom metal layer 1404.

[0118] Although the conductive protective layer 1402 of the stacked metal layer 1400 includes a material with a high etch selectivity difference from other sublayers (e.g., adjacent sublayers) of the stacked metal layer 1400, such as a transparent conductive oxide, each of the pads 400, the upper electrode 420 of the storage capacitor, the drain electrode 430, and the source electrode 440 formed by etching the stacked metal layer 1400 includes, for example, a transparent conductive oxide. Figure 7CThe side surface shown has a positively tapered inclined surface. In one embodiment, each of, for example, pad 400, the upper electrode 420 of the storage capacitor, the drain electrode 430, and the source electrode 440 may have an approximately trapezoidal cross-sectional shape. In one embodiment, the width of each sublayer of, for example, pad 400 may gradually increase in the direction from the top surface of pad 400 to the bottom surface of pad 400. The width of conductive protective layer 402 may be greater than the width of metal film 401, the width of metal layer 403 may be greater than the width of conductive protective layer 402, and the width of bottom metal layer 404 may be greater than the width of metal layer 403. Hereinafter, the width of each layer may be defined as the width when viewed from a top plan view or cross-sectional view in the thickness direction (or z-axis direction) of the stacked metal layers 1400. In this case, the width of each layer may be greater than the width of its bottom surface than its upper surface. In such an embodiment, the width of each sublayer of the upper electrode 420, drain electrode 430, and source electrode 440 of the storage capacitor may gradually increase in the downward direction.

[0119] The following will refer to Figures 8A to 8C The process of etching the stacked metal layer 1400 is described in detail. For example... Figure 8A As shown, after a photoresist PR is provided or formed on the stacked metal layer 1400, etching, such as an etching process using an etchant, is performed. The etching process can be performed from the top of the stacked metal layer 1400 toward the bottom of the stacked metal layer 1400. After a portion of the metal film 1401 is etched, the conductive protective layer 1402 can also be etched. When the metal film 1401 is disposed on the conductive protective layer 1402, experiments have shown that the etching rate of the conductive protective layer 1402 is faster than when the metal film 1401 is not disposed on the conductive protective layer 1402. This phenomenon may occur because when the metal film 1401 disposed on the conductive protective layer 1402 is continuously exposed to the etchant, etching is performed simultaneously in both the a and b directions, and etching in the a direction affects etching in the b direction.

[0120] An etching process using an etchant is also performed on the metal layer 1403 and the bottom metal layer 1404 disposed below the conductive protective layer 1402. For example... Figure 8C As shown, the stacked metal layer 1400 (as pad 400) that has been etched can have a positive tapered side surface.

[0121] Figure 10 and Figure 11 This is a view of a scanning electron microscope (“SEM”) image of pad 400 according to some embodiments, such as Embodiment 1 and Embodiment 2. Figure 10 and Figure 11As shown, the side surface of pad 400 may include a positively tapered inclined surface. Table 1 below lists the specifications of the sublayers of pad 400 according to Embodiments 1 and 2.

[0122] Table 1

[0123]

[0124] Conversely, as a comparative example, in the case where pads are formed by etching a stack of metal layers that do not include a metal film, due to... Figure 12 The difference in etch selectivity between the conductive protective layer 42, which includes TCO, and other sublayers (e.g., metal layer 43 and bottom metal layer 44) forms a tip T in the conductive protective layer 42, wherein the tip T protrudes further in the width direction than the side surfaces of metal layer 43 and bottom metal layer 44. Figure 12 This is a view of the SEM image of the pads based on the comparison example. The specifications of the sublayers of the pads based on the comparison example are listed in Table 2 below.

[0125] Table 2

[0126]

[0127] The above is for reference only. Figure 7D , Figure 10 and Figure 11 The taper angle of the side surface of the described pad 400 can be, for example, an acute angle of about 70° or less, about 60° or less, or about 50° or less. Similarly, Figure 7D The upper electrode 420, drain electrode 430, and source electrode 440 of the storage capacitor shown may also have a positive conical side surface.

[0128] refer to Figure 7E After providing or forming the pad 400, the upper electrode 420 of the storage capacitor, the drain electrode 430, and the source electrode 440, an inorganic insulating layer PVX and an organic insulating layer OL can be provided or formed. The inorganic insulating layer PVX can have a single-layer or multi-layer structure comprising inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride. The organic insulating layer OL can comprise an organic insulating material such as PI.

[0129] A first via PVX-H is formed in the inorganic insulating layer PVX to expose the central portion of the pad 400. The process of forming the first via PVX-H can be performed before forming the organic insulating layer OL. Because the first via PVX-H overlaps with the central portion of the pad 400, the edges of the pad 400 can be covered by the inorganic insulating layer PVX. As described above, because the pad 400 includes a positively tapered side surface, the inorganic insulating layer PVX can have a relatively constant thickness. As a comparative example, in the pad 400 having… Figure 12 In the case of the structure shown, for example, when the conductive protective layer 42 contained in the pad 400 has a tip T, the tip T may cause a defect in the stepped coverage of the inorganic insulating layer PVX.

[0130] The second hole OL-H can be formed to penetrate the organic insulating layer OL to overlap with the central portion of the pad 400. In an embodiment, as... Figure 7E As shown, the size of the second aperture OL-H can be smaller than the size of the first aperture PVX-H, but is not limited thereto. Alternatively, the size of the second aperture OL-H can be substantially the same as the size of the first aperture PVX-H. Alternatively, the size of the second aperture OL-H can be larger than the size of the first aperture PVX-H.

[0131] Pixel electrodes 510 may be provided or formed on an organic insulating layer OL, and the pixel electrodes 510 are located in the display area DA. Pixel electrodes 510 may include TCO such as ITO, IZO, ZnO, In2O3, and / or AZO. In an alternative embodiment, pixel electrodes 510 may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or combinations thereof (e.g., compounds or alloys). In another alternative embodiment, pixel electrodes 510 may further include a layer comprising ITO, IZO, ZnO, or In2O3 above / below the reflective layer. In one embodiment, for example, pixel electrodes 510 may have a three-layer structure in which an ITO layer, an Ag layer, and an ITO layer are stacked.

[0132] Pixel electrode 510 can be provided or formed by forming a material layer constituting pixel electrode 510 and subsequently etching that material layer. Pixel electrode 510 can be formed, for example, by wet etching. Unlike drain electrode 430, source electrode 440, and the upper electrode 420 of the storage capacitor, pad 400 is exposed through the first via PVX-H and the second via OL-H. Therefore, the portion of pad 400 exposed through the first via PVX-H and the second via OL-H can be removed by etching pixel electrode 510. In such an embodiment, as... Figure 7E As shown, a third hole 401H is formed while removing the metal film 401 in the sublayer of the pad 400. Figure 9A and Figure 9B This is a cross-sectional view showing the formation of a third hole 401H in the metal film 401 of the pad 400.

[0133] During the manufacturing process of display devices, such as Figure 9AAs shown, pad 400 is exposed through the first hole PVX-H and the second hole OL-H. The exposed portion of the metal film 401 can be removed by the etchant E used during the etching process of the pixel electrode 510 as described above, or by an ashing process using oxygen (O2), wherein the ashing process can be performed separately from the etching of the pixel electrode 510. Therefore, as... Figure 9B As shown, the metal thin film 401 may include a third hole 401H that overlaps with the first hole PVX-H and the second hole OL-H.

[0134] The third hole 401H can pass through the top surface of the metal film 401 to the bottom surface of the metal film 401, but does not pass through the conductive protective layer 402 below the metal film 401. The width of the third hole 401H can be substantially the same as the width of a hole with a small width (e.g., the second hole OL-H in the first hole PVX-H and the second hole OL-H).

[0135] In an embodiment, such as Figure 7E As shown, the third hole 401H can be formed as a thin metal film 401 passing through the pad 400. Figure 7E In this embodiment, the drain electrode 430 and source electrode 440 of the thin-film transistor and / or the upper electrode 420 of the storage capacitor can be covered by an insulating layer, such as an organic insulating layer OL, prior to an etching or ashing process. Therefore, unlike the metal thin film 401 of the pad 400, no holes are formed through the uppermost sublayer of the multiple layers constituting the drain electrode 430, source electrode 440, and / or the upper electrode 420 of the storage capacitor. The uppermost sublayer of the drain electrode 430, source electrode 440, and / or the upper electrode 420 of the storage capacitor, comprising the same material as the metal thin film 401, can completely cover the top surface of the sublayers below.

[0136] refer to Figure 7F After the pixel electrode 510 is formed, a pixel defining layer 150 is provided or formed therein with openings to overlap with the pixel electrode 510. The pixel defining layer 150 with openings can expose the top surface of the pixel electrode 510 and can cover the edges of the pixel electrode 510. The pixel defining layer 150 may include an organic insulating material. Alternatively, the pixel defining layer 150 may include an inorganic insulating material. Alternatively, the pixel defining layer 150 may include both organic and inorganic insulating materials.

[0137] An intermediate layer 520 is provided or formed on the pixel defining layer 150. The intermediate layer 520 includes an emission layer 522. The intermediate layer 520 may include a first functional layer 521 below the emission layer 522 and / or a second functional layer 523 on the emission layer 522. The intermediate layer 520 may be formed by an evaporation process, such as thermal deposition.

[0138] The first functional layer 521 may have a single-layer or multi-layer structure. In one embodiment, for example, when the first functional layer 521 comprises a polymer material, the first functional layer 521 may be a hole transport layer (“HTL”) with a single-layer structure. The first functional layer 521 may include poly(3,4)-ethylene-dihydroxythiophene (“PEDOT”) or polyaniline (“PANI”). In embodiments where the first functional layer 521 comprises a low molecular weight material, the first functional layer 521 may include a hole injection layer (“HIL”) and a hole transport layer (HTL).

[0139] The emitting layer 522 may include a polymer or a low molecular weight organic material for emitting light of a predetermined color.

[0140] Optionally, a second functional layer 523 may be provided. In one embodiment, for example, where the first functional layer 521 and the emitter layer 522 comprise a polymer material, a second functional layer 523 is desirable. The second functional layer 523 may have a single-layer structure or a multilayer structure. The second functional layer 523 may include an electron transport layer (“ETL”) and / or an electron injection layer (“EIL”).

[0141] An emission layer 522 of the intermediate layer 520 can be provided or set for each pixel. Each of the first functional layer 521 and the second functional layer 523 of the intermediate layer 520 can be formed as a single unit to cover multiple pixels.

[0142] The counter electrode 530 may include a conductive material having a low work function. In one embodiment, for example, the counter electrode 530 may include a (semi-)transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, or combinations thereof (e.g., alloys). Alternatively, the counter electrode 530 may further include a layer comprising ITO, IZO, ZnO, or In2O3 on the (semi-)transparent layer comprising the above-described materials.

[0143] An organic light-emitting diode (OLED) with a multi-layer structure is covered by an encapsulation layer 600, which includes a pixel electrode 510, an intermediate layer 520, and a counter electrode 530.

[0144] The encapsulation layer 600 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In an embodiment, the encapsulation layer 600 may include a first inorganic encapsulation layer 610, an organic encapsulation layer 620, and a second inorganic encapsulation layer 630 stacked in sequence.

[0145] The first inorganic encapsulation layer 610 and the second inorganic encapsulation layer 630 may include at least one inorganic insulating material. The inorganic insulating material may include alumina, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The organic encapsulation layer 620 may include a polymer-based material. The polymer-based material may include acrylic resins, epoxy resins, polyimide, and / or polyethylene. Acrylic resins may include, for example, polymethyl methacrylate and polyacrylic acid.

[0146] refer to Figure 7G The electronic structure 920 can be electrically connected to the pad 400 via the conductive material layer 910. The electronic structure 920 may include a data driver capable of providing data signals to each pixel. In an embodiment, the electronic structure 920 may include the aforementioned data driver, wiring for providing a first power supply voltage and / or a second power supply voltage, and a circuit structure capable of providing various control signals to the pixels. The electronic structure 920 may be in the form of an integrated circuit (“IC”) or a flexible printed circuit board (“FPCB”).

[0147] The conductive material layer 910 may include bumps contained within the electronic structure 920. In one embodiment, for example, bumps provided to the lower end of the electronic structure 920 may directly contact the pad 400, and thus the electronic structure 920 may be electrically connected to the pad 400. Alternatively, the conductive material layer 910 may include a conductive adhesive layer such as an anisotropic conductive film. In such an embodiment, the bumps of the electronic structure 920 may contact conductive balls, which are anisotropic conductive films contained within the conductive material layer 910, and the conductive balls may contact the pad 400 so that the electronic structure 920 may be electrically connected to the pad 400.

[0148] Figure 13 and Figure 14 This is a cross-sectional view of the display device according to an embodiment, and the structure of the peripheral region PA of the display device is the same as described above.

[0149] In an embodiment, such as Figure 13 As shown, the FPCB is electrically connected to the pad 400 via a conductive material layer 910 including an anisotropic conductive film. The FPCB may include data drivers, wiring, and pixel structures. In alternative embodiments, such as Figure 14 As shown, an IC in chip form, including a data driver, is electrically connected to pads 400 via a conductive material layer 910. In such an embodiment, the conductive material layer 910 may include bumps of the IC corresponding to a portion of the IC, or an anisotropic conductive film comprising conductive balls. The IC may include not only the aforementioned data driver, but also wiring and circuitry for applying power supply voltages.

[0150] Figure 13A portion of the FPCB can be disposed on the front surface of the substrate 100 and connected to the pads 400, and the remainder of the FPCB can be bent toward the bottom surface of the substrate 100. Compared to the FPCB, Figure 14 The IC shown is compact and can be located only on the front surface of the substrate 100.

[0151] Figure 15 and Figure 16 This is a cross-sectional view of a display device according to an embodiment.

[0152] In an embodiment, the organic light-emitting diodes (OLEDs) arranged in the display area DA of the display device can emit light of different colors. In an embodiment, such as... Figure 15 As shown, the display device includes an L that emits red light. R Organic light-emitting diodes (OLEDs) and green light-emitting LEDs G Organic light-emitting diodes (OLEDs) and blue light-emitting LEDs B Organic light-emitting diodes (OLEDs).

[0153] In alternative embodiments, such as Figure 16 As shown, the organic light-emitting diode (OLED) of the display device can emit blue light. B The color conversion optical layer 700 can transfer some blue light emitted by the organic light-emitting diode (OLED) supplied to the corresponding pixel from the OLED. B Converted to red light L R Or green light L G .

[0154] The color conversion optical layer 700 includes a blue light conversion optical layer (L) that converts blue light... B Convert to red light L R A first color converter 731 is provided. Light converted by the first color converter 731 has enhanced color purity while passing through a red color filter 741 and can be emitted to the outside. The first color converter 731 may include quantum dots and scattering particles. The quantum dots may have a core-shell structure including a core comprising a nanocrystal and a shell surrounding the core. The core of the quantum dots may include one of group II-VI compounds, group III-V compounds, group IV-VI compounds, group IV elements, group IV compounds, and / or combinations thereof. The scattering particles may include TiO2.

[0155] The color conversion optical layer 700 includes a blue light conversion optical layer (L) that converts blue light... B Convert to green light L G The second color converter 732. The second color converter 732 processes blue light emitted from the organic light-emitting diode OLED. BThe conversion is performed, and the converted light, while passing through the green color filter 742, has improved color purity and can be emitted externally. The second color converter 732 may include quantum dots and scattering particles. The quantum dots may have a core-shell structure comprising a core and a shell, the core comprising a nanocrystal and the shell surrounding the core. The core of the quantum dots may include one of group II-VI compounds, group III-V compounds, group IV-VI compounds, group IV elements, group IV compounds, and combinations thereof. The size and / or structure of the quantum dots in the second color converter 732 may differ from the size and / or structure of the quantum dots in the first color converter 731.

[0156] Blue light emitted from organic light-emitting diodes (OLEDs) B It can achieve improved color purity while passing through the transmission section 733 and the blue filter 743, and can be emitted to the outside. The transmission section 733 includes scattering particles such as TiO2 and can improve light efficiency.

[0157] In one embodiment, a light-blocking portion 750 is provided between two adjacent portions of the first color converter 731, the second color converter 732, and the transmission portion 733, and / or between two adjacent portions of the red color filter 741, the green color filter 742, and the blue color filter 743. The light-blocking portion 750 may include a black matrix.

[0158] Figures 17 to 19 This is a view of an electronic device using a display device according to an embodiment.

[0159] Display devices including the above structures can be as follows: Figure 17 The television set 1A shown can be as follows: Figure 18 The laptop computer or foldable tablet PC (“PC”) 1B shown may be, for example, Figure 19 The portable display device 1C of the mobile phone shown is illustrated. Alternatively, the display device can be applied to a display unit provided to an artificial intelligence speaker. In this document, embodiments of the display device described herein can be included in an electronic device capable of displaying a predetermined image.

[0160] In embodiments of the display device, the number of manufacturing processes and manufacturing time of the pads can be minimized, and a display device including high-quality pads can be provided.

[0161] Although this disclosure has been specifically shown and described with reference to its embodiments, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit or scope of this disclosure as defined herein.

Claims

1. A display device, wherein, The display device includes: The substrate includes a display area and a peripheral area outside the display area; Multiple display elements are arranged in the display area; and The pads are located in the peripheral area and have a multi-layer structure. The multilayer structure of the pads includes: A metal layer comprising at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu; A conductive protective layer on the top surface of the metal layer, the conductive protective layer comprising a transparent conductive oxide; and A thin metal film on the top surface of the conductive protective layer, the thin metal film comprising at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu. The top layer of the pads is the metal film. The pad includes a positively conical inclined surface, and The width of the conductive protective layer is greater than the width of the metal film, and the width of the metal layer is greater than the width of the conductive protective layer.

2. The display device according to claim 1, wherein The thickness of the metal layer is greater than the thickness of the conductive protective layer, and The thickness of the metal layer is greater than the thickness of the metal film.

3. The display device according to claim 1, wherein... The thickness of the metal film is 300 Å or less.

4. The display device according to claim 1, wherein The metal thin film includes: Metal sublayers, including metallic elements; and A metal oxide sublayer, on which an oxide of the metal element of the metal sublayer is disposed and comprising the metal sublayer.

5. The display device according to claim 1, wherein, The display device further includes: An insulating layer covers the edges of the multilayer structure of the pads. This defines holes that penetrate the insulating layer to overlap with the multilayer structure of the pads.

6. The display device according to claim 5, wherein The insulating layer includes an inorganic insulating layer and an organic insulating layer; as well as The pores in the insulating layer include: The first hole is defined to penetrate the inorganic insulating layer to overlap with the multilayer structure of the pad; as well as The second hole is defined to penetrate the organic insulating layer to overlap with the multilayer structure of the pad and the first hole.

7. The display device according to claim 5, wherein A third hole is defined, which extends through the metal film of the multilayer structure to overlap with the hole of the insulating layer.

8. The display device according to claim 7, wherein The metal thin film includes: Metallic sublayer, including the first metallic element; as well as A metal oxide sublayer, on the top surface of the metal sublayer and comprising an oxide of the first metal element of the metal sublayer.

9. The display device according to claim 1, wherein The multilayer structure of the pads further includes: The bottom metal layer on the bottom surface of the metal layer.

10. A display device, wherein, The display device includes: The substrate includes a display area and a peripheral area outside the display area; Display elements are located in the display area; Pixel circuitry, including thin-film transistors and storage capacitors, wherein the thin-film transistors and the storage capacitors are electrically connected to the display element; and The pads are located in the peripheral region and have a positively tapered side surface. The pads described herein have a multi-layered structure, and The multilayer structure of the pads includes: A metal layer comprising at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu; A conductive layer, on the top surface of the metal layer, comprising a transparent conductive oxide; and A metal thin film, on the top surface of the conductive layer, comprises at least one of Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, and Cu, and The top layer of the pads is the metal film. Wherein, the width of the conductive layer is greater than the width of the metal film, and the width of the metal layer is greater than the width of the conductive layer.

11. The display device according to claim 10, wherein The metal thin film includes: Metal sublayers, including metallic elements; and A metal oxide sublayer, on the top surface of the metal sublayer and comprising the oxide of the metal element of the metal sublayer.

12. The display device according to claim 11, wherein, The display device further includes: An insulating layer covers the edges of the pads. This defines holes that penetrate the insulating layer to overlap with the multilayer structure of the pads.

13. The display device according to claim 12, wherein A hole is defined that passes through the metal film of the multilayer structure to correspond to the hole of the insulating layer.

14. The display device according to claim 10, wherein At least one of the electrodes of the thin-film transistor and the storage capacitor includes the same number of sublayers as the multilayer structure of the pad.

15. The display device according to claim 10, wherein The metal layer is on the bottom surface of the conductive layer and has a thickness equal to or greater than 1 / 2 the thickness of the pad.

16. The display device according to claim 15, wherein, The display device further includes: The bottom conductive layer on the bottom surface of the conductive layer, and The bottom conductive layer comprises a metal element that is different from the metal element of the metal layer.

Images